From 7a8afb2b6659f88881139fcbcb02de5476952152 Mon Sep 17 00:00:00 2001 From: joshua Date: Mon, 16 May 2022 11:00:23 -0400 Subject: Yes --- verilog/alu/obj_dir/Valu__Syms.cpp | 26 -------------------------- 1 file changed, 26 deletions(-) delete mode 100644 verilog/alu/obj_dir/Valu__Syms.cpp (limited to 'verilog/alu/obj_dir/Valu__Syms.cpp') diff --git a/verilog/alu/obj_dir/Valu__Syms.cpp b/verilog/alu/obj_dir/Valu__Syms.cpp deleted file mode 100644 index bd9fdd1..0000000 --- a/verilog/alu/obj_dir/Valu__Syms.cpp +++ /dev/null @@ -1,26 +0,0 @@ -// Verilated -*- C++ -*- -// DESCRIPTION: Verilator output: Symbol table implementation internals - -#include "Valu__Syms.h" -#include "Valu.h" -#include "Valu___024root.h" - -// FUNCTIONS -Valu__Syms::~Valu__Syms() -{ -} - -Valu__Syms::Valu__Syms(VerilatedContext* contextp, const char* namep,Valu* modelp) - : VerilatedSyms{contextp} - // Setup internal state of the Syms class - , __Vm_modelp{modelp} - // Setup module instances - , TOP(namep) -{ - // Configure time unit / time precision - _vm_contextp__->timeunit(-6); - _vm_contextp__->timeprecision(-9); - // Setup each module's pointers to their submodules - // Setup each module's pointer back to symbol table (for public functions) - TOP.__Vconfigure(this, true); -} -- cgit v1.2.3