From b8936029065835366e9e057a219c0c5194db8662 Mon Sep 17 00:00:00 2001 From: joshua Date: Sat, 14 May 2022 23:30:38 -0500 Subject: Verilog update --- verilog/alu/obj_dir/Valu__Trace__0__Slow.cpp | 74 ++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 verilog/alu/obj_dir/Valu__Trace__0__Slow.cpp (limited to 'verilog/alu/obj_dir/Valu__Trace__0__Slow.cpp') diff --git a/verilog/alu/obj_dir/Valu__Trace__0__Slow.cpp b/verilog/alu/obj_dir/Valu__Trace__0__Slow.cpp new file mode 100644 index 0000000..25d47f5 --- /dev/null +++ b/verilog/alu/obj_dir/Valu__Trace__0__Slow.cpp @@ -0,0 +1,74 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Tracing implementation internals +#include "verilated_vcd_c.h" +#include "Valu__Syms.h" + + +VL_ATTR_COLD void Valu___024root__trace_init_sub__TOP__0(Valu___024root* vlSelf, VerilatedVcd* tracep) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root__trace_init_sub__TOP__0\n"); ); + // Init + const int c = vlSymsp->__Vm_baseCode; + // Body + tracep->declBus(c+1,"in1", false,-1, 31,0); + tracep->declBus(c+2,"in2", false,-1, 31,0); + tracep->declBus(c+3,"op", false,-1, 3,0); + tracep->declBus(c+4,"out", false,-1, 31,0); + tracep->pushNamePrefix("alu "); + tracep->declBus(c+1,"in1", false,-1, 31,0); + tracep->declBus(c+2,"in2", false,-1, 31,0); + tracep->declBus(c+3,"op", false,-1, 3,0); + tracep->declBus(c+4,"out", false,-1, 31,0); + tracep->declBus(c+6,"diff", false,-1, 31,0); + tracep->declBus(c+5,"result", false,-1, 31,0); + tracep->popNamePrefix(1); +} + +VL_ATTR_COLD void Valu___024root__trace_init_top(Valu___024root* vlSelf, VerilatedVcd* tracep) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root__trace_init_top\n"); ); + // Body + Valu___024root__trace_init_sub__TOP__0(vlSelf, tracep); +} + +VL_ATTR_COLD void Valu___024root__trace_full_top_0(void* voidSelf, VerilatedVcd* tracep); +void Valu___024root__trace_chg_top_0(void* voidSelf, VerilatedVcd* tracep); +void Valu___024root__trace_cleanup(void* voidSelf, VerilatedVcd* /*unused*/); + +VL_ATTR_COLD void Valu___024root__trace_register(Valu___024root* vlSelf, VerilatedVcd* tracep) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root__trace_register\n"); ); + // Body + tracep->addFullCb(&Valu___024root__trace_full_top_0, vlSelf); + tracep->addChgCb(&Valu___024root__trace_chg_top_0, vlSelf); + tracep->addCleanupCb(&Valu___024root__trace_cleanup, vlSelf); +} + +VL_ATTR_COLD void Valu___024root__trace_full_sub_0(Valu___024root* vlSelf, VerilatedVcd* tracep); + +VL_ATTR_COLD void Valu___024root__trace_full_top_0(void* voidSelf, VerilatedVcd* tracep) { + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root__trace_full_top_0\n"); ); + // Init + Valu___024root* const __restrict vlSelf VL_ATTR_UNUSED = static_cast(voidSelf); + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + // Body + Valu___024root__trace_full_sub_0((&vlSymsp->TOP), tracep); +} + +VL_ATTR_COLD void Valu___024root__trace_full_sub_0(Valu___024root* vlSelf, VerilatedVcd* tracep) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root__trace_full_sub_0\n"); ); + // Init + vluint32_t* const oldp VL_ATTR_UNUSED = tracep->oldp(vlSymsp->__Vm_baseCode); + // Body + tracep->fullIData(oldp+1,(vlSelf->in1),32); + tracep->fullIData(oldp+2,(vlSelf->in2),32); + tracep->fullCData(oldp+3,(vlSelf->op),4); + tracep->fullIData(oldp+4,(vlSelf->out),32); + tracep->fullIData(oldp+5,(vlSelf->alu__DOT__result),32); + tracep->fullIData(oldp+6,(0U),32); +} -- cgit v1.2.3