From b8936029065835366e9e057a219c0c5194db8662 Mon Sep 17 00:00:00 2001 From: joshua Date: Sat, 14 May 2022 23:30:38 -0500 Subject: Verilog update --- verilog/alu/obj_dir/Valu | Bin 0 -> 148968 bytes verilog/alu/obj_dir/Valu.cpp | 118 +++++++++++++++++++++ verilog/alu/obj_dir/Valu.h | 73 +++++++++++++ verilog/alu/obj_dir/Valu.mk | 68 ++++++++++++ verilog/alu/obj_dir/Valu__ALL.a | Bin 0 -> 17172 bytes verilog/alu/obj_dir/Valu__ALL.cpp | 9 ++ verilog/alu/obj_dir/Valu__ALL.d | 13 +++ verilog/alu/obj_dir/Valu__ALL.o | Bin 0 -> 15296 bytes verilog/alu/obj_dir/Valu__Syms.cpp | 26 +++++ verilog/alu/obj_dir/Valu__Syms.h | 39 +++++++ verilog/alu/obj_dir/Valu__Trace__0.cpp | 42 ++++++++ verilog/alu/obj_dir/Valu__Trace__0__Slow.cpp | 74 +++++++++++++ verilog/alu/obj_dir/Valu___024root.h | 34 ++++++ .../Valu___024root__DepSet_ha59b247d__0.cpp | 117 ++++++++++++++++++++ .../Valu___024root__DepSet_ha59b247d__0__Slow.cpp | 41 +++++++ verilog/alu/obj_dir/Valu___024root__Slow.cpp | 25 +++++ verilog/alu/obj_dir/Valu__ver.d | 1 + verilog/alu/obj_dir/Valu__verFiles.dat | 19 ++++ verilog/alu/obj_dir/Valu_classes.mk | 54 ++++++++++ verilog/alu/obj_dir/tbalu.d | 9 ++ verilog/alu/obj_dir/tbalu.o | Bin 0 -> 9696 bytes verilog/alu/obj_dir/verilated.d | 9 ++ verilog/alu/obj_dir/verilated.o | Bin 0 -> 146256 bytes verilog/alu/obj_dir/verilated_vcd_c.d | 11 ++ verilog/alu/obj_dir/verilated_vcd_c.o | Bin 0 -> 68520 bytes 25 files changed, 782 insertions(+) create mode 100755 verilog/alu/obj_dir/Valu create mode 100644 verilog/alu/obj_dir/Valu.cpp create mode 100644 verilog/alu/obj_dir/Valu.h create mode 100644 verilog/alu/obj_dir/Valu.mk create mode 100644 verilog/alu/obj_dir/Valu__ALL.a create mode 100644 verilog/alu/obj_dir/Valu__ALL.cpp create mode 100644 verilog/alu/obj_dir/Valu__ALL.d create mode 100644 verilog/alu/obj_dir/Valu__ALL.o create mode 100644 verilog/alu/obj_dir/Valu__Syms.cpp create mode 100644 verilog/alu/obj_dir/Valu__Syms.h create mode 100644 verilog/alu/obj_dir/Valu__Trace__0.cpp create mode 100644 verilog/alu/obj_dir/Valu__Trace__0__Slow.cpp create mode 100644 verilog/alu/obj_dir/Valu___024root.h create mode 100644 verilog/alu/obj_dir/Valu___024root__DepSet_ha59b247d__0.cpp create mode 100644 verilog/alu/obj_dir/Valu___024root__DepSet_ha59b247d__0__Slow.cpp create mode 100644 verilog/alu/obj_dir/Valu___024root__Slow.cpp create mode 100644 verilog/alu/obj_dir/Valu__ver.d create mode 100644 verilog/alu/obj_dir/Valu__verFiles.dat create mode 100644 verilog/alu/obj_dir/Valu_classes.mk create mode 100644 verilog/alu/obj_dir/tbalu.d create mode 100644 verilog/alu/obj_dir/tbalu.o create mode 100644 verilog/alu/obj_dir/verilated.d create mode 100644 verilog/alu/obj_dir/verilated.o create mode 100644 verilog/alu/obj_dir/verilated_vcd_c.d create mode 100644 verilog/alu/obj_dir/verilated_vcd_c.o (limited to 'verilog/alu/obj_dir') diff --git a/verilog/alu/obj_dir/Valu b/verilog/alu/obj_dir/Valu new file mode 100755 index 0000000..de4fc59 Binary files /dev/null and b/verilog/alu/obj_dir/Valu differ diff --git a/verilog/alu/obj_dir/Valu.cpp b/verilog/alu/obj_dir/Valu.cpp new file mode 100644 index 0000000..7d020e4 --- /dev/null +++ b/verilog/alu/obj_dir/Valu.cpp @@ -0,0 +1,118 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Model implementation (design independent parts) + +#include "Valu.h" +#include "Valu__Syms.h" +#include "verilated_vcd_c.h" + +//============================================================ +// Constructors + +Valu::Valu(VerilatedContext* _vcontextp__, const char* _vcname__) + : vlSymsp{new Valu__Syms(_vcontextp__, _vcname__, this)} + , op{vlSymsp->TOP.op} + , in1{vlSymsp->TOP.in1} + , in2{vlSymsp->TOP.in2} + , out{vlSymsp->TOP.out} + , rootp{&(vlSymsp->TOP)} +{ +} + +Valu::Valu(const char* _vcname__) + : Valu(nullptr, _vcname__) +{ +} + +//============================================================ +// Destructor + +Valu::~Valu() { + delete vlSymsp; +} + +//============================================================ +// Evaluation loop + +void Valu___024root___eval_initial(Valu___024root* vlSelf); +void Valu___024root___eval_settle(Valu___024root* vlSelf); +void Valu___024root___eval(Valu___024root* vlSelf); +#ifdef VL_DEBUG +void Valu___024root___eval_debug_assertions(Valu___024root* vlSelf); +#endif // VL_DEBUG +void Valu___024root___final(Valu___024root* vlSelf); + +static void _eval_initial_loop(Valu__Syms* __restrict vlSymsp) { + vlSymsp->__Vm_didInit = true; + Valu___024root___eval_initial(&(vlSymsp->TOP)); + // Evaluate till stable + vlSymsp->__Vm_activity = true; + do { + VL_DEBUG_IF(VL_DBG_MSGF("+ Initial loop\n");); + Valu___024root___eval_settle(&(vlSymsp->TOP)); + Valu___024root___eval(&(vlSymsp->TOP)); + } while (0); +} + +void Valu::eval_step() { + VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate Valu::eval_step\n"); ); +#ifdef VL_DEBUG + // Debug assertions + Valu___024root___eval_debug_assertions(&(vlSymsp->TOP)); +#endif // VL_DEBUG + // Initialize + if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) _eval_initial_loop(vlSymsp); + // Evaluate till stable + vlSymsp->__Vm_activity = true; + do { + VL_DEBUG_IF(VL_DBG_MSGF("+ Clock loop\n");); + Valu___024root___eval(&(vlSymsp->TOP)); + } while (0); + // Evaluate cleanup +} + +//============================================================ +// Utilities + +VerilatedContext* Valu::contextp() const { + return vlSymsp->_vm_contextp__; +} + +const char* Valu::name() const { + return vlSymsp->name(); +} + +//============================================================ +// Invoke final blocks + +VL_ATTR_COLD void Valu::final() { + Valu___024root___final(&(vlSymsp->TOP)); +} + +//============================================================ +// Trace configuration + +void Valu___024root__trace_init_top(Valu___024root* vlSelf, VerilatedVcd* tracep); + +VL_ATTR_COLD static void trace_init(void* voidSelf, VerilatedVcd* tracep, uint32_t code) { + // Callback from tracep->open() + Valu___024root* const __restrict vlSelf VL_ATTR_UNUSED = static_cast(voidSelf); + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + if (!vlSymsp->_vm_contextp__->calcUnusedSigs()) { + VL_FATAL_MT(__FILE__, __LINE__, __FILE__, + "Turning on wave traces requires Verilated::traceEverOn(true) call before time 0."); + } + vlSymsp->__Vm_baseCode = code; + tracep->scopeEscape(' '); + tracep->pushNamePrefix(std::string{vlSymsp->name()} + ' '); + Valu___024root__trace_init_top(vlSelf, tracep); + tracep->popNamePrefix(); + tracep->scopeEscape('.'); +} + +VL_ATTR_COLD void Valu___024root__trace_register(Valu___024root* vlSelf, VerilatedVcd* tracep); + +VL_ATTR_COLD void Valu::trace(VerilatedVcdC* tfp, int levels, int options) { + if (false && levels && options) {} // Prevent unused + tfp->spTrace()->addInitCb(&trace_init, &(vlSymsp->TOP)); + Valu___024root__trace_register(&(vlSymsp->TOP), tfp->spTrace()); +} diff --git a/verilog/alu/obj_dir/Valu.h b/verilog/alu/obj_dir/Valu.h new file mode 100644 index 0000000..57738b5 --- /dev/null +++ b/verilog/alu/obj_dir/Valu.h @@ -0,0 +1,73 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Primary model header +// +// This header should be included by all source files instantiating the design. +// The class here is then constructed to instantiate the design. +// See the Verilator manual for examples. + +#ifndef VERILATED_VALU_H_ +#define VERILATED_VALU_H_ // guard + +#include "verilated.h" + +class Valu__Syms; +class Valu___024root; +class VerilatedVcdC; + +// This class is the main interface to the Verilated model +class Valu VL_NOT_FINAL { + private: + // Symbol table holding complete model state (owned by this class) + Valu__Syms* const vlSymsp; + + public: + + // PORTS + // The application code writes and reads these signals to + // propagate new values into/out from the Verilated model. + VL_IN8(&op,3,0); + VL_IN(&in1,31,0); + VL_IN(&in2,31,0); + VL_OUT(&out,31,0); + + // CELLS + // Public to allow access to /* verilator public */ items. + // Otherwise the application code can consider these internals. + + // Root instance pointer to allow access to model internals, + // including inlined /* verilator public_flat_* */ items. + Valu___024root* const rootp; + + // CONSTRUCTORS + /// Construct the model; called by application code + /// If contextp is null, then the model will use the default global context + /// If name is "", then makes a wrapper with a + /// single model invisible with respect to DPI scope names. + explicit Valu(VerilatedContext* contextp, const char* name = "TOP"); + explicit Valu(const char* name = "TOP"); + /// Destroy the model; called (often implicitly) by application code + virtual ~Valu(); + private: + VL_UNCOPYABLE(Valu); ///< Copying not allowed + + public: + // API METHODS + /// Evaluate the model. Application must call when inputs change. + void eval() { eval_step(); } + /// Evaluate when calling multiple units/models per time step. + void eval_step(); + /// Evaluate at end of a timestep for tracing, when using eval_step(). + /// Application must call after all eval() and before time changes. + void eval_end_step() {} + /// Simulation complete, run final blocks. Application must call on completion. + void final(); + /// Trace signals in the model; called by application code + void trace(VerilatedVcdC* tfp, int levels, int options = 0); + /// Return current simulation context for this model. + /// Used to get to e.g. simulation time via contextp()->time() + VerilatedContext* contextp() const; + /// Retrieve name of this model instance (as passed to constructor). + const char* name() const; +} VL_ATTR_ALIGNED(VL_CACHE_LINE_BYTES); + +#endif // guard diff --git a/verilog/alu/obj_dir/Valu.mk b/verilog/alu/obj_dir/Valu.mk new file mode 100644 index 0000000..15a2c2f --- /dev/null +++ b/verilog/alu/obj_dir/Valu.mk @@ -0,0 +1,68 @@ +# Verilated -*- Makefile -*- +# DESCRIPTION: Verilator output: Makefile for building Verilated archive or executable +# +# Execute this makefile from the object directory: +# make -f Valu.mk + +default: Valu + +### Constants... +# Perl executable (from $PERL) +PERL = perl +# Path to Verilator kit (from $VERILATOR_ROOT) +VERILATOR_ROOT = /usr/share/verilator +# SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE) +SYSTEMC_INCLUDE ?= +# SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR) +SYSTEMC_LIBDIR ?= + +### Switches... +# C++ code coverage 0/1 (from --prof-c) +VM_PROFC = 0 +# SystemC output mode? 0/1 (from --sc) +VM_SC = 0 +# Legacy or SystemC output mode? 0/1 (from --sc) +VM_SP_OR_SC = $(VM_SC) +# Deprecated +VM_PCLI = 1 +# Deprecated: SystemC architecture to find link library path (from $SYSTEMC_ARCH) +VM_SC_TARGET_ARCH = linux + +### Vars... +# Design prefix (from --prefix) +VM_PREFIX = Valu +# Module prefix (from --prefix) +VM_MODPREFIX = Valu +# User CFLAGS (from -CFLAGS on Verilator command line) +VM_USER_CFLAGS = \ + +# User LDLIBS (from -LDFLAGS on Verilator command line) +VM_USER_LDLIBS = \ + +# User .cpp files (from .cpp's on Verilator command line) +VM_USER_CLASSES = \ + tbalu \ + +# User .cpp directories (from .cpp's on Verilator command line) +VM_USER_DIR = \ + . \ + + +### Default rules... +# Include list of all generated classes +include Valu_classes.mk +# Include global rules +include $(VERILATOR_ROOT)/include/verilated.mk + +### Executable rules... (from --exe) +VPATH += $(VM_USER_DIR) + +tbalu.o: tbalu.cpp + $(OBJCACHE) $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(OPT_FAST) -c -o $@ $< + +### Link rules... (from --exe) +Valu: $(VK_USER_OBJS) $(VK_GLOBAL_OBJS) $(VM_PREFIX)__ALL.a $(VM_HIER_LIBS) + $(LINK) $(LDFLAGS) $^ $(LOADLIBES) $(LDLIBS) $(LIBS) $(SC_LIBS) -o $@ + + +# Verilated -*- Makefile -*- diff --git a/verilog/alu/obj_dir/Valu__ALL.a b/verilog/alu/obj_dir/Valu__ALL.a new file mode 100644 index 0000000..4ad5286 Binary files /dev/null and b/verilog/alu/obj_dir/Valu__ALL.a differ diff --git a/verilog/alu/obj_dir/Valu__ALL.cpp b/verilog/alu/obj_dir/Valu__ALL.cpp new file mode 100644 index 0000000..ed815ee --- /dev/null +++ b/verilog/alu/obj_dir/Valu__ALL.cpp @@ -0,0 +1,9 @@ +// DESCRIPTION: Generated by verilator_includer via makefile +#define VL_INCLUDE_OPT include +#include "Valu.cpp" +#include "Valu___024root__DepSet_ha59b247d__0.cpp" +#include "Valu__Trace__0.cpp" +#include "Valu___024root__Slow.cpp" +#include "Valu___024root__DepSet_ha59b247d__0__Slow.cpp" +#include "Valu__Syms.cpp" +#include "Valu__Trace__0__Slow.cpp" diff --git a/verilog/alu/obj_dir/Valu__ALL.d b/verilog/alu/obj_dir/Valu__ALL.d new file mode 100644 index 0000000..636205f --- /dev/null +++ b/verilog/alu/obj_dir/Valu__ALL.d @@ -0,0 +1,13 @@ +Valu__ALL.o: Valu__ALL.cpp Valu.cpp Valu.h \ + /usr/share/verilator/include/verilated.h \ + /usr/share/verilator/include/verilatedos.h \ + /usr/share/verilator/include/verilated_config.h \ + /usr/share/verilator/include/verilated_types.h \ + /usr/share/verilator/include/verilated_funcs.h Valu__Syms.h \ + Valu___024root.h /usr/share/verilator/include/verilated_vcd_c.h \ + /usr/share/verilator/include/verilated.h \ + /usr/share/verilator/include/verilated_trace.h \ + /usr/share/verilator/include/verilated_trace_defs.h \ + Valu___024root__DepSet_ha59b247d__0.cpp Valu__Trace__0.cpp \ + Valu___024root__Slow.cpp Valu___024root__DepSet_ha59b247d__0__Slow.cpp \ + Valu__Syms.cpp Valu__Trace__0__Slow.cpp diff --git a/verilog/alu/obj_dir/Valu__ALL.o b/verilog/alu/obj_dir/Valu__ALL.o new file mode 100644 index 0000000..1377001 Binary files /dev/null and b/verilog/alu/obj_dir/Valu__ALL.o differ diff --git a/verilog/alu/obj_dir/Valu__Syms.cpp b/verilog/alu/obj_dir/Valu__Syms.cpp new file mode 100644 index 0000000..bd9fdd1 --- /dev/null +++ b/verilog/alu/obj_dir/Valu__Syms.cpp @@ -0,0 +1,26 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Symbol table implementation internals + +#include "Valu__Syms.h" +#include "Valu.h" +#include "Valu___024root.h" + +// FUNCTIONS +Valu__Syms::~Valu__Syms() +{ +} + +Valu__Syms::Valu__Syms(VerilatedContext* contextp, const char* namep,Valu* modelp) + : VerilatedSyms{contextp} + // Setup internal state of the Syms class + , __Vm_modelp{modelp} + // Setup module instances + , TOP(namep) +{ + // Configure time unit / time precision + _vm_contextp__->timeunit(-6); + _vm_contextp__->timeprecision(-9); + // Setup each module's pointers to their submodules + // Setup each module's pointer back to symbol table (for public functions) + TOP.__Vconfigure(this, true); +} diff --git a/verilog/alu/obj_dir/Valu__Syms.h b/verilog/alu/obj_dir/Valu__Syms.h new file mode 100644 index 0000000..e69592b --- /dev/null +++ b/verilog/alu/obj_dir/Valu__Syms.h @@ -0,0 +1,39 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Symbol table internal header +// +// Internal details; most calling programs do not need this header, +// unless using verilator public meta comments. + +#ifndef VERILATED_VALU__SYMS_H_ +#define VERILATED_VALU__SYMS_H_ // guard + +#include "verilated.h" + +// INCLUDE MODEL CLASS + +#include "Valu.h" + +// INCLUDE MODULE CLASSES +#include "Valu___024root.h" + +// SYMS CLASS (contains all model state) +class Valu__Syms final : public VerilatedSyms { + public: + // INTERNAL STATE + Valu* const __Vm_modelp; + bool __Vm_activity = false; ///< Used by trace routines to determine change occurred + uint32_t __Vm_baseCode = 0; ///< Used by trace routines when tracing multiple models + bool __Vm_didInit = false; + + // MODULE INSTANCE STATE + Valu___024root TOP; + + // CONSTRUCTORS + Valu__Syms(VerilatedContext* contextp, const char* namep, Valu* modelp); + ~Valu__Syms(); + + // METHODS + const char* name() { return TOP.name(); } +} VL_ATTR_ALIGNED(VL_CACHE_LINE_BYTES); + +#endif // guard diff --git a/verilog/alu/obj_dir/Valu__Trace__0.cpp b/verilog/alu/obj_dir/Valu__Trace__0.cpp new file mode 100644 index 0000000..4713f0f --- /dev/null +++ b/verilog/alu/obj_dir/Valu__Trace__0.cpp @@ -0,0 +1,42 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Tracing implementation internals +#include "verilated_vcd_c.h" +#include "Valu__Syms.h" + + +void Valu___024root__trace_chg_sub_0(Valu___024root* vlSelf, VerilatedVcd* tracep); + +void Valu___024root__trace_chg_top_0(void* voidSelf, VerilatedVcd* tracep) { + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root__trace_chg_top_0\n"); ); + // Init + Valu___024root* const __restrict vlSelf VL_ATTR_UNUSED = static_cast(voidSelf); + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + if (VL_UNLIKELY(!vlSymsp->__Vm_activity)) return; + // Body + Valu___024root__trace_chg_sub_0((&vlSymsp->TOP), tracep); +} + +void Valu___024root__trace_chg_sub_0(Valu___024root* vlSelf, VerilatedVcd* tracep) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root__trace_chg_sub_0\n"); ); + // Init + vluint32_t* const oldp VL_ATTR_UNUSED = tracep->oldp(vlSymsp->__Vm_baseCode + 1); + // Body + tracep->chgIData(oldp+0,(vlSelf->in1),32); + tracep->chgIData(oldp+1,(vlSelf->in2),32); + tracep->chgCData(oldp+2,(vlSelf->op),4); + tracep->chgIData(oldp+3,(vlSelf->out),32); + tracep->chgIData(oldp+4,(vlSelf->alu__DOT__result),32); +} + +void Valu___024root__trace_cleanup(void* voidSelf, VerilatedVcd* /*unused*/) { + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root__trace_cleanup\n"); ); + // Init + Valu___024root* const __restrict vlSelf VL_ATTR_UNUSED = static_cast(voidSelf); + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VlUnpacked __Vm_traceActivity; + // Body + vlSymsp->__Vm_activity = false; + __Vm_traceActivity[0U] = 0U; +} diff --git a/verilog/alu/obj_dir/Valu__Trace__0__Slow.cpp b/verilog/alu/obj_dir/Valu__Trace__0__Slow.cpp new file mode 100644 index 0000000..25d47f5 --- /dev/null +++ b/verilog/alu/obj_dir/Valu__Trace__0__Slow.cpp @@ -0,0 +1,74 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Tracing implementation internals +#include "verilated_vcd_c.h" +#include "Valu__Syms.h" + + +VL_ATTR_COLD void Valu___024root__trace_init_sub__TOP__0(Valu___024root* vlSelf, VerilatedVcd* tracep) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root__trace_init_sub__TOP__0\n"); ); + // Init + const int c = vlSymsp->__Vm_baseCode; + // Body + tracep->declBus(c+1,"in1", false,-1, 31,0); + tracep->declBus(c+2,"in2", false,-1, 31,0); + tracep->declBus(c+3,"op", false,-1, 3,0); + tracep->declBus(c+4,"out", false,-1, 31,0); + tracep->pushNamePrefix("alu "); + tracep->declBus(c+1,"in1", false,-1, 31,0); + tracep->declBus(c+2,"in2", false,-1, 31,0); + tracep->declBus(c+3,"op", false,-1, 3,0); + tracep->declBus(c+4,"out", false,-1, 31,0); + tracep->declBus(c+6,"diff", false,-1, 31,0); + tracep->declBus(c+5,"result", false,-1, 31,0); + tracep->popNamePrefix(1); +} + +VL_ATTR_COLD void Valu___024root__trace_init_top(Valu___024root* vlSelf, VerilatedVcd* tracep) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root__trace_init_top\n"); ); + // Body + Valu___024root__trace_init_sub__TOP__0(vlSelf, tracep); +} + +VL_ATTR_COLD void Valu___024root__trace_full_top_0(void* voidSelf, VerilatedVcd* tracep); +void Valu___024root__trace_chg_top_0(void* voidSelf, VerilatedVcd* tracep); +void Valu___024root__trace_cleanup(void* voidSelf, VerilatedVcd* /*unused*/); + +VL_ATTR_COLD void Valu___024root__trace_register(Valu___024root* vlSelf, VerilatedVcd* tracep) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root__trace_register\n"); ); + // Body + tracep->addFullCb(&Valu___024root__trace_full_top_0, vlSelf); + tracep->addChgCb(&Valu___024root__trace_chg_top_0, vlSelf); + tracep->addCleanupCb(&Valu___024root__trace_cleanup, vlSelf); +} + +VL_ATTR_COLD void Valu___024root__trace_full_sub_0(Valu___024root* vlSelf, VerilatedVcd* tracep); + +VL_ATTR_COLD void Valu___024root__trace_full_top_0(void* voidSelf, VerilatedVcd* tracep) { + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root__trace_full_top_0\n"); ); + // Init + Valu___024root* const __restrict vlSelf VL_ATTR_UNUSED = static_cast(voidSelf); + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + // Body + Valu___024root__trace_full_sub_0((&vlSymsp->TOP), tracep); +} + +VL_ATTR_COLD void Valu___024root__trace_full_sub_0(Valu___024root* vlSelf, VerilatedVcd* tracep) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root__trace_full_sub_0\n"); ); + // Init + vluint32_t* const oldp VL_ATTR_UNUSED = tracep->oldp(vlSymsp->__Vm_baseCode); + // Body + tracep->fullIData(oldp+1,(vlSelf->in1),32); + tracep->fullIData(oldp+2,(vlSelf->in2),32); + tracep->fullCData(oldp+3,(vlSelf->op),4); + tracep->fullIData(oldp+4,(vlSelf->out),32); + tracep->fullIData(oldp+5,(vlSelf->alu__DOT__result),32); + tracep->fullIData(oldp+6,(0U),32); +} diff --git a/verilog/alu/obj_dir/Valu___024root.h b/verilog/alu/obj_dir/Valu___024root.h new file mode 100644 index 0000000..18b3f2f --- /dev/null +++ b/verilog/alu/obj_dir/Valu___024root.h @@ -0,0 +1,34 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design internal header +// See Valu.h for the primary calling header + +#ifndef VERILATED_VALU___024ROOT_H_ +#define VERILATED_VALU___024ROOT_H_ // guard + +#include "verilated.h" + +class Valu__Syms; +VL_MODULE(Valu___024root) { + public: + + // DESIGN SPECIFIC STATE + VL_IN8(op,3,0); + VL_IN(in1,31,0); + VL_IN(in2,31,0); + VL_OUT(out,31,0); + IData/*31:0*/ alu__DOT__result; + + // INTERNAL VARIABLES + Valu__Syms* vlSymsp; // Symbol table + + // CONSTRUCTORS + Valu___024root(const char* name); + ~Valu___024root(); + VL_UNCOPYABLE(Valu___024root); + + // INTERNAL METHODS + void __Vconfigure(Valu__Syms* symsp, bool first); +} VL_ATTR_ALIGNED(VL_CACHE_LINE_BYTES); + + +#endif // guard diff --git a/verilog/alu/obj_dir/Valu___024root__DepSet_ha59b247d__0.cpp b/verilog/alu/obj_dir/Valu___024root__DepSet_ha59b247d__0.cpp new file mode 100644 index 0000000..99146ec --- /dev/null +++ b/verilog/alu/obj_dir/Valu___024root__DepSet_ha59b247d__0.cpp @@ -0,0 +1,117 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design implementation internals +// See Valu.h for the primary calling header + +#include "verilated.h" + +#include "Valu___024root.h" + +VL_INLINE_OPT void Valu___024root___combo__TOP__0(Valu___024root* vlSelf) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root___combo__TOP__0\n"); ); + // Body + vlSelf->alu__DOT__result = ((8U & (IData)(vlSelf->op)) + ? ((4U & (IData)(vlSelf->op)) + ? ((2U & (IData)(vlSelf->op)) + ? ((1U & (IData)(vlSelf->op)) + ? vlSelf->in1 + : 0U) : + ((1U & (IData)(vlSelf->op)) + ? (((0x1fU + >= vlSelf->in2) + ? (vlSelf->in1 + >> vlSelf->in2) + : 0U) + | ((vlSelf->in1 + >> 0x1fU) + ? + ((IData)(0xffffffffU) + << + ((0x10U + & ((~ + (vlSelf->in2 + >> 4U)) + << 4U)) + | ((8U + & ((~ + (vlSelf->in2 + >> 3U)) + << 3U)) + | ((4U + & ((~ + (vlSelf->in2 + >> 2U)) + << 2U)) + | ((2U + & ((~ + (vlSelf->in2 + >> 1U)) + << 1U)) + | (1U + & (~ vlSelf->in2))))))) + : 0U)) + : 0U)) : 0U) + : ((4U & (IData)(vlSelf->op)) + ? ((2U & (IData)(vlSelf->op)) + ? ((1U & (IData)(vlSelf->op)) + ? (vlSelf->in1 + & vlSelf->in2) + : (vlSelf->in1 + | vlSelf->in2)) + : ((1U & (IData)(vlSelf->op)) + ? ((0x1fU + >= vlSelf->in2) + ? + (vlSelf->in1 + >> vlSelf->in2) + : 0U) + : (vlSelf->in1 + - vlSelf->in2))) + : ((2U & (IData)(vlSelf->op)) + ? ((1U & (IData)(vlSelf->op)) + ? ((vlSelf->in1 + < vlSelf->in2) + ? 1U + : 0U) + : (((vlSelf->in1 + >> 0x1fU) + == + (vlSelf->in2 + >> 0x1fU)) + ? 0U + : + ((vlSelf->in1 + >> 0x1fU) + ? 1U + : 0U))) + : ((1U & (IData)(vlSelf->op)) + ? ((0x1fU + >= vlSelf->in2) + ? + (vlSelf->in1 + >> vlSelf->in2) + : 0U) + : (vlSelf->in1 + + vlSelf->in2))))); + vlSelf->out = vlSelf->alu__DOT__result; +} + +void Valu___024root___eval(Valu___024root* vlSelf) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root___eval\n"); ); + // Body + Valu___024root___combo__TOP__0(vlSelf); +} + +#ifdef VL_DEBUG +void Valu___024root___eval_debug_assertions(Valu___024root* vlSelf) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root___eval_debug_assertions\n"); ); + // Body + if (VL_UNLIKELY((vlSelf->op & 0xf0U))) { + Verilated::overWidthError("op");} +} +#endif // VL_DEBUG diff --git a/verilog/alu/obj_dir/Valu___024root__DepSet_ha59b247d__0__Slow.cpp b/verilog/alu/obj_dir/Valu___024root__DepSet_ha59b247d__0__Slow.cpp new file mode 100644 index 0000000..99dde1e --- /dev/null +++ b/verilog/alu/obj_dir/Valu___024root__DepSet_ha59b247d__0__Slow.cpp @@ -0,0 +1,41 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design implementation internals +// See Valu.h for the primary calling header + +#include "verilated.h" + +#include "Valu___024root.h" + +VL_ATTR_COLD void Valu___024root___eval_initial(Valu___024root* vlSelf) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root___eval_initial\n"); ); +} + +void Valu___024root___combo__TOP__0(Valu___024root* vlSelf); + +VL_ATTR_COLD void Valu___024root___eval_settle(Valu___024root* vlSelf) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root___eval_settle\n"); ); + // Body + Valu___024root___combo__TOP__0(vlSelf); +} + +VL_ATTR_COLD void Valu___024root___final(Valu___024root* vlSelf) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root___final\n"); ); +} + +VL_ATTR_COLD void Valu___024root___ctor_var_reset(Valu___024root* vlSelf) { + if (false && vlSelf) {} // Prevent unused + Valu__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp; + VL_DEBUG_IF(VL_DBG_MSGF("+ Valu___024root___ctor_var_reset\n"); ); + // Body + vlSelf->in1 = VL_RAND_RESET_I(32); + vlSelf->in2 = VL_RAND_RESET_I(32); + vlSelf->op = VL_RAND_RESET_I(4); + vlSelf->out = VL_RAND_RESET_I(32); + vlSelf->alu__DOT__result = VL_RAND_RESET_I(32); +} diff --git a/verilog/alu/obj_dir/Valu___024root__Slow.cpp b/verilog/alu/obj_dir/Valu___024root__Slow.cpp new file mode 100644 index 0000000..7e197c5 --- /dev/null +++ b/verilog/alu/obj_dir/Valu___024root__Slow.cpp @@ -0,0 +1,25 @@ +// Verilated -*- C++ -*- +// DESCRIPTION: Verilator output: Design implementation internals +// See Valu.h for the primary calling header + +#include "verilated.h" + +#include "Valu__Syms.h" +#include "Valu___024root.h" + +void Valu___024root___ctor_var_reset(Valu___024root* vlSelf); + +Valu___024root::Valu___024root(const char* _vcname__) + : VerilatedModule(_vcname__) + { + // Reset structure values + Valu___024root___ctor_var_reset(this); +} + +void Valu___024root::__Vconfigure(Valu__Syms* _vlSymsp, bool first) { + if (false && first) {} // Prevent unused + this->vlSymsp = _vlSymsp; +} + +Valu___024root::~Valu___024root() { +} diff --git a/verilog/alu/obj_dir/Valu__ver.d b/verilog/alu/obj_dir/Valu__ver.d new file mode 100644 index 0000000..050f4a2 --- /dev/null +++ b/verilog/alu/obj_dir/Valu__ver.d @@ -0,0 +1 @@ +obj_dir/Valu.cpp obj_dir/Valu.h obj_dir/Valu.mk obj_dir/Valu__Syms.cpp obj_dir/Valu__Syms.h obj_dir/Valu__Trace__0.cpp obj_dir/Valu__Trace__0__Slow.cpp obj_dir/Valu___024root.h obj_dir/Valu___024root__DepSet_ha59b247d__0.cpp obj_dir/Valu___024root__DepSet_ha59b247d__0__Slow.cpp obj_dir/Valu___024root__Slow.cpp obj_dir/Valu__ver.d obj_dir/Valu_classes.mk : /usr/bin/verilator_bin /usr/bin/verilator_bin alu.v aluOp.vh diff --git a/verilog/alu/obj_dir/Valu__verFiles.dat b/verilog/alu/obj_dir/Valu__verFiles.dat new file mode 100644 index 0000000..9886e43 --- /dev/null +++ b/verilog/alu/obj_dir/Valu__verFiles.dat @@ -0,0 +1,19 @@ +# DESCRIPTION: Verilator output: Timestamp data for --skip-identical. Delete at will. +C "-Wall --cc --exe --build tbalu.cpp alu.v --trace" +S 8301864 49571880 1647534899 665184882 1647204701 0 "/usr/bin/verilator_bin" +S 826 47450694 1650399377 438046012 1650399377 438046012 "alu.v" +S 391 47450690 1650315291 577169333 1650315291 577169333 "aluOp.vh" +T 3738 47972485 1650399379 228051294 1650399379 228051294 "obj_dir/Valu.cpp" +T 2663 47972468 1650399379 228051294 1650399379 228051294 "obj_dir/Valu.h" +T 1808 47972982 1650399379 228051294 1650399379 228051294 "obj_dir/Valu.mk" +T 735 47972353 1650399379 228051294 1650399379 228051294 "obj_dir/Valu__Syms.cpp" +T 1073 47972356 1650399379 228051294 1650399379 228051294 "obj_dir/Valu__Syms.h" +T 1816 47972973 1650399379 228051294 1650399379 228051294 "obj_dir/Valu__Trace__0.cpp" +T 3410 47972972 1650399379 228051294 1650399379 228051294 "obj_dir/Valu__Trace__0__Slow.cpp" +T 765 47972494 1650399379 228051294 1650399379 228051294 "obj_dir/Valu___024root.h" +T 6435 47972971 1650399379 228051294 1650399379 228051294 "obj_dir/Valu___024root__DepSet_ha59b247d__0.cpp" +T 1597 47972817 1650399379 228051294 1650399379 228051294 "obj_dir/Valu___024root__DepSet_ha59b247d__0__Slow.cpp" +T 630 47972816 1650399379 228051294 1650399379 228051294 "obj_dir/Valu___024root__Slow.cpp" +T 421 47972983 1650399379 228051294 1650399379 228051294 "obj_dir/Valu__ver.d" +T 0 0 1650399379 228051294 1650399379 228051294 "obj_dir/Valu__verFiles.dat" +T 1735 47972979 1650399379 228051294 1650399379 228051294 "obj_dir/Valu_classes.mk" diff --git a/verilog/alu/obj_dir/Valu_classes.mk b/verilog/alu/obj_dir/Valu_classes.mk new file mode 100644 index 0000000..ba99411 --- /dev/null +++ b/verilog/alu/obj_dir/Valu_classes.mk @@ -0,0 +1,54 @@ +# Verilated -*- Makefile -*- +# DESCRIPTION: Verilator output: Make include file with class lists +# +# This file lists generated Verilated files, for including in higher level makefiles. +# See Valu.mk for the caller. + +### Switches... +# C11 constructs required? 0/1 (always on now) +VM_C11 = 1 +# Coverage output mode? 0/1 (from --coverage) +VM_COVERAGE = 0 +# Parallel builds? 0/1 (from --output-split) +VM_PARALLEL_BUILDS = 0 +# Threaded output mode? 0/1/N threads (from --threads) +VM_THREADS = 0 +# Tracing output mode? 0/1 (from --trace/--trace-fst) +VM_TRACE = 1 +# Tracing output mode in FST format? 0/1 (from --trace-fst) +VM_TRACE_FST = 0 +# Tracing threaded output mode? 0/1/N threads (from --trace-thread) +VM_TRACE_THREADS = 0 +# Separate FST writer thread? 0/1 (from --trace-fst with --trace-thread > 0) +VM_TRACE_FST_WRITER_THREAD = 0 + +### Object file lists... +# Generated module classes, fast-path, compile with highest optimization +VM_CLASSES_FAST += \ + Valu \ + Valu___024root__DepSet_ha59b247d__0 \ + +# Generated module classes, non-fast-path, compile with low/medium optimization +VM_CLASSES_SLOW += \ + Valu___024root__Slow \ + Valu___024root__DepSet_ha59b247d__0__Slow \ + +# Generated support classes, fast-path, compile with highest optimization +VM_SUPPORT_FAST += \ + Valu__Trace__0 \ + +# Generated support classes, non-fast-path, compile with low/medium optimization +VM_SUPPORT_SLOW += \ + Valu__Syms \ + Valu__Trace__0__Slow \ + +# Global classes, need linked once per executable, fast-path, compile with highest optimization +VM_GLOBAL_FAST += \ + verilated \ + verilated_vcd_c \ + +# Global classes, need linked once per executable, non-fast-path, compile with low/medium optimization +VM_GLOBAL_SLOW += \ + + +# Verilated -*- Makefile -*- diff --git a/verilog/alu/obj_dir/tbalu.d b/verilog/alu/obj_dir/tbalu.d new file mode 100644 index 0000000..4964d6f --- /dev/null +++ b/verilog/alu/obj_dir/tbalu.d @@ -0,0 +1,9 @@ +tbalu.o: ../tbalu.cpp /usr/share/verilator/include/verilated.h \ + /usr/share/verilator/include/verilatedos.h \ + /usr/share/verilator/include/verilated_config.h \ + /usr/share/verilator/include/verilated_types.h \ + /usr/share/verilator/include/verilated_funcs.h \ + /usr/share/verilator/include/verilated_vcd_c.h \ + /usr/share/verilator/include/verilated.h \ + /usr/share/verilator/include/verilated_trace.h \ + /usr/share/verilator/include/verilated_trace_defs.h Valu.h ../aluOp.h diff --git a/verilog/alu/obj_dir/tbalu.o b/verilog/alu/obj_dir/tbalu.o new file mode 100644 index 0000000..1612e2b Binary files /dev/null and b/verilog/alu/obj_dir/tbalu.o differ diff --git a/verilog/alu/obj_dir/verilated.d b/verilog/alu/obj_dir/verilated.d new file mode 100644 index 0000000..7f4c5e4 --- /dev/null +++ b/verilog/alu/obj_dir/verilated.d @@ -0,0 +1,9 @@ +verilated.o: /usr/share/verilator/include/verilated.cpp \ + /usr/share/verilator/include/verilatedos.h \ + /usr/share/verilator/include/verilated_imp.h \ + /usr/share/verilator/include/verilated.h \ + /usr/share/verilator/include/verilated_config.h \ + /usr/share/verilator/include/verilated_types.h \ + /usr/share/verilator/include/verilated_funcs.h \ + /usr/share/verilator/include/verilated_syms.h \ + /usr/share/verilator/include/verilated_sym_props.h diff --git a/verilog/alu/obj_dir/verilated.o b/verilog/alu/obj_dir/verilated.o new file mode 100644 index 0000000..a226a8b Binary files /dev/null and b/verilog/alu/obj_dir/verilated.o differ diff --git a/verilog/alu/obj_dir/verilated_vcd_c.d b/verilog/alu/obj_dir/verilated_vcd_c.d new file mode 100644 index 0000000..667485f --- /dev/null +++ b/verilog/alu/obj_dir/verilated_vcd_c.d @@ -0,0 +1,11 @@ +verilated_vcd_c.o: /usr/share/verilator/include/verilated_vcd_c.cpp \ + /usr/share/verilator/include/verilatedos.h \ + /usr/share/verilator/include/verilated.h \ + /usr/share/verilator/include/verilated_config.h \ + /usr/share/verilator/include/verilated_types.h \ + /usr/share/verilator/include/verilated_funcs.h \ + /usr/share/verilator/include/verilated_vcd_c.h \ + /usr/share/verilator/include/verilated_trace.h \ + /usr/share/verilator/include/verilated_trace_defs.h \ + /usr/share/verilator/include/verilated_trace_imp.cpp \ + /usr/share/verilator/include/verilated_intrinsics.h diff --git a/verilog/alu/obj_dir/verilated_vcd_c.o b/verilog/alu/obj_dir/verilated_vcd_c.o new file mode 100644 index 0000000..469c75e Binary files /dev/null and b/verilog/alu/obj_dir/verilated_vcd_c.o differ -- cgit v1.2.3