From b8936029065835366e9e057a219c0c5194db8662 Mon Sep 17 00:00:00 2001 From: joshua Date: Sat, 14 May 2022 23:30:38 -0500 Subject: Verilog update --- verilog/alu/v6/obj_dir/Valu6__ALL.d | 13 +++++++++++++ 1 file changed, 13 insertions(+) create mode 100644 verilog/alu/v6/obj_dir/Valu6__ALL.d (limited to 'verilog/alu/v6/obj_dir/Valu6__ALL.d') diff --git a/verilog/alu/v6/obj_dir/Valu6__ALL.d b/verilog/alu/v6/obj_dir/Valu6__ALL.d new file mode 100644 index 0000000..0dd5496 --- /dev/null +++ b/verilog/alu/v6/obj_dir/Valu6__ALL.d @@ -0,0 +1,13 @@ +Valu6__ALL.o: Valu6__ALL.cpp Valu6.cpp Valu6.h \ + /usr/share/verilator/include/verilated.h \ + /usr/share/verilator/include/verilatedos.h \ + /usr/share/verilator/include/verilated_config.h \ + /usr/share/verilator/include/verilated_types.h \ + /usr/share/verilator/include/verilated_funcs.h Valu6__Syms.h \ + Valu6___024root.h /usr/share/verilator/include/verilated_vcd_c.h \ + /usr/share/verilator/include/verilated.h \ + /usr/share/verilator/include/verilated_trace.h \ + /usr/share/verilator/include/verilated_trace_defs.h \ + Valu6___024root__DepSet_he7565067__0.cpp Valu6__Trace__0.cpp \ + Valu6___024root__Slow.cpp Valu6___024root__DepSet_he7565067__0__Slow.cpp \ + Valu6__Syms.cpp Valu6__Trace__0__Slow.cpp -- cgit v1.2.3