From 18d1ae8dd266a6aa126479a742e0e6f257d5f8a9 Mon Sep 17 00:00:00 2001 From: joshua Date: Mon, 16 May 2022 11:02:27 -0400 Subject: revised gitignore --- verilog/alu/v6/obj_dir/Valu6___024root__Slow.cpp | 25 ------------------------ 1 file changed, 25 deletions(-) delete mode 100644 verilog/alu/v6/obj_dir/Valu6___024root__Slow.cpp (limited to 'verilog/alu/v6/obj_dir/Valu6___024root__Slow.cpp') diff --git a/verilog/alu/v6/obj_dir/Valu6___024root__Slow.cpp b/verilog/alu/v6/obj_dir/Valu6___024root__Slow.cpp deleted file mode 100644 index 4167b09..0000000 --- a/verilog/alu/v6/obj_dir/Valu6___024root__Slow.cpp +++ /dev/null @@ -1,25 +0,0 @@ -// Verilated -*- C++ -*- -// DESCRIPTION: Verilator output: Design implementation internals -// See Valu6.h for the primary calling header - -#include "verilated.h" - -#include "Valu6__Syms.h" -#include "Valu6___024root.h" - -void Valu6___024root___ctor_var_reset(Valu6___024root* vlSelf); - -Valu6___024root::Valu6___024root(Valu6__Syms* symsp, const char* name) - : VerilatedModule{name} - , vlSymsp{symsp} - { - // Reset structure values - Valu6___024root___ctor_var_reset(this); -} - -void Valu6___024root::__Vconfigure(bool first) { - if (false && first) {} // Prevent unused -} - -Valu6___024root::~Valu6___024root() { -} -- cgit v1.2.3