/verilog/

• ../
• Makefile
• alu.v
• computer-architecture-parts.drawio
• data_mem.mem
• datapath.v
• decode.v
• fpu
• hazard.v
• immediate.v
• instr_mem.mem
• memory.v
• pc.v
• regfile.v
• riscv-processor.drawio
• tbalu.cpp
• tbalu.h
• tbdatapath.cpp
• tbdatapath.h