feat: added TB support + primitives for flipflops, initial fetch stage (not complete), mem initialization for imem complete

2 files changed, 42 insertions, 0 deletions

diff --git a/core/rtl/core.sv b/core/rtl/core.sv
new file mode 100644
index 0000000..5f64e7a
--- /dev/null
+++ b/core/rtl/core.sv
@@ -0,0 +1,22 @@
+module core
+(
+  input  logic clk,
+  input  logic rst_l,
+  // Instruction mem interface
+  output logic [63:0] if_imem_addr_IF,
+  input  logic [63:0] imem_id_instr_ID
+
+  // Data mem interface 
+);
+
+fetch fetch0 (
+  .clk(clk),
+  .rst_l(rst_l),
+  .if_imem_addr_IF(if_imem_addr_IF)
+);
+
+always @ (posedge clk) begin
+  $display("Instruction: %x", imem_id_instr_ID);
+end
+
+endmodule
diff --git a/core/rtl/fetch.sv b/core/rtl/fetch.sv
new file mode 100644
index 0000000..7cbff6a
--- /dev/null
+++ b/core/rtl/fetch.sv
@@ -0,0 +1,20 @@
+module fetch
+(
+  input  logic clk,
+  input  logic rst_l,
+
+  // IMEM interface
+  output logic [63:0] if_imem_addr_IF
+);
+
+logic [63:0] pc_IF;
+logic [63:0] pcNxt_IF;
+
+assign if_imem_addr_IF = pc_IF; // Always fetch PC from IMEM, truncate addresses to be 64 bit aligned?
+
+// Program Counter (PC)
+assign pcNxt_IF = pc_IF + 64'd4;
+
+AFFR #(.WIDTH(64)) ff_IF_pc ( .clk(clk), .rst_l(rst_l), .en(1'b1), .q(pc_IF), .d(pcNxt_IF) );
+
+endmodule