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authorJoshua Yun <joshua@joshuayun.com>2025-03-25 00:29:30 -0500
committerJoshua Yun <joshua@joshuayun.com>2025-03-25 00:29:30 -0500
commit86021b3616c24efe38d8869b45d201bf24fe9a07 (patch)
tree445ec3b30de9451604f12c96c18fdbb975fbaf66 /core/tb
parent6bd9f4f7ab48576d3fda98bef915162a7436866d (diff)
downloadriscv-processor-86021b3616c24efe38d8869b45d201bf24fe9a07.tar.gz
feat: initial completion of decode stage, fix: removed hardcoded path for riscv assembly files in TB
Diffstat (limited to 'core/tb')
-rw-r--r--core/tb/core_tb_imem.sv2
1 files changed, 1 insertions, 1 deletions
diff --git a/core/tb/core_tb_imem.sv b/core/tb/core_tb_imem.sv
index 6d3fa92..740be8a 100644
--- a/core/tb/core_tb_imem.sv
+++ b/core/tb/core_tb_imem.sv
@@ -21,7 +21,7 @@ logic [7:0] imem [0:(1<<(ADDR_WIDTH))-1];
// Fill up memory using the $fopen and $fread syscalls
initial begin
- assembly_file = $fopen("/home/joshua/Personal/riscv-linux/core/tb/riscv_arithmetic_basic_test_0.bin", "rb");
+ assembly_file = $fopen("../../../core/testcode/riscv_arithmetic_basic_test_0.bin", "rb");
status_file = $fread( imem, assembly_file );
if (status_file == 0) begin
$ferror( assembly_file, error_message_file );