diff options
Diffstat (limited to 'core/pkg')
| -rwxr-xr-x[-rw-r--r--] | core/pkg/riscv_types.sv | 32 |
1 files changed, 25 insertions, 7 deletions
diff --git a/core/pkg/riscv_types.sv b/core/pkg/riscv_types.sv index 59c1f74..d95ebc5 100644..100755 --- a/core/pkg/riscv_types.sv +++ b/core/pkg/riscv_types.sv @@ -19,12 +19,6 @@ package riscv_types; INSTR_TYPE_CSR = 7'b1110011 // I control and status register } opcode_t; - typedef enum logic [1:0] { - MEM_OP_LOAD, - MEM_OP_STORE, - MEM_OP_NONE - } mem_op_t; - typedef enum logic [2:0] { BEQ = 0, BNE = 1, @@ -34,7 +28,6 @@ package riscv_types; BGEU = 5 } br_op_t; - //------------ // ALU Control //------------ @@ -58,4 +51,29 @@ package riscv_types; alu_sel_op_2_t rs2Sel; } alu_op_t; + //------------- + // Memory Types + //------------- + typedef enum logic [1:0] { + MEM_OP_LOAD, + MEM_OP_STORE, + MEM_OP_NONE + } mem_op_t; + + typedef enum logic [1:0] { + MEM_SIZE_1B, + MEM_SIZE_2B, + MEM_SIZE_4B + } mem_op_size_t; + + //----------------- + // Write Back Types + //----------------- + typedef enum logic [1:0] { + PC, + MEM, + ALU, + NONE + } rd_data_sel_t; + endpackage |