From 6bd9f4f7ab48576d3fda98bef915162a7436866d Mon Sep 17 00:00:00 2001 From: Joshua Yun Date: Sat, 15 Mar 2025 23:09:39 -0500 Subject: feat: More setting up, got a janky decode stage that prints out the instruction it receives, added dump options to fusesoc, changed instr width back th 32 from 64 --- README.md | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'README.md') diff --git a/README.md b/README.md index fa6d52d..d5b6327 100644 --- a/README.md +++ b/README.md @@ -1,3 +1,5 @@ # RISCV_Linux -Building a project with fusesoc +Running core testbench + + fusesoc run --target sim bingchao:riscv:cpu -- cgit v1.2.3