From 59fd8c25ee1452452cb564d6fe4163b7a9394aef Mon Sep 17 00:00:00 2001
From: Joshua Yun <joshua@joshuayun.com>
Date: Sat, 15 Mar 2025 17:35:52 -0500
Subject: feat: added TB support + primitives for flipflops, initial fetch
 stage (not complete), mem initialization for imem complete

---
 primitives/primitives.core | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
 create mode 100644 primitives/primitives.core

(limited to 'primitives/primitives.core')

diff --git a/primitives/primitives.core b/primitives/primitives.core
new file mode 100644
index 0000000..72a19d7
--- /dev/null
+++ b/primitives/primitives.core
@@ -0,0 +1,16 @@
+CAPI=2:
+name: bingchao:riscv:primitives:1.0.0
+description: "RTL Primitives for the RISC-V Processor"
+
+filesets:
+  rtl:
+    files:
+      - rtl/AFF.sv
+      - rtl/AFFR.sv
+    file_type: systemVerilogSource
+
+targets:
+  default: &default
+    filesets:
+      - rtl
+    toplevel: top
-- 
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