From 59fd8c25ee1452452cb564d6fe4163b7a9394aef Mon Sep 17 00:00:00 2001
From: Joshua Yun <joshua@joshuayun.com>
Date: Sat, 15 Mar 2025 17:35:52 -0500
Subject: feat: added TB support + primitives for flipflops, initial fetch
 stage (not complete), mem initialization for imem complete

---
 primitives/rtl/AFF.sv  | 19 +++++++++++++++++++
 primitives/rtl/AFFR.sv | 22 ++++++++++++++++++++++
 2 files changed, 41 insertions(+)
 create mode 100644 primitives/rtl/AFF.sv
 create mode 100644 primitives/rtl/AFFR.sv

(limited to 'primitives/rtl')

diff --git a/primitives/rtl/AFF.sv b/primitives/rtl/AFF.sv
new file mode 100644
index 0000000..15789bf
--- /dev/null
+++ b/primitives/rtl/AFF.sv
@@ -0,0 +1,19 @@
+// AFF # ( .WIDTH/.DTYPE() ) ff_ ( .q(), .d(), .en(), .clk() );
+module AFF
+#(
+  parameter      WIDTH = 1,
+  parameter type DTYPE = logic [WIDTH-1:0]
+)
+(
+  input  logic clk,
+  input  logic en,
+
+  input  DTYPE d,
+  output DTYPE q
+);
+
+always_ff @(posedge clk) begin
+  if (en) q <= d;
+end
+
+endmodule
diff --git a/primitives/rtl/AFFR.sv b/primitives/rtl/AFFR.sv
new file mode 100644
index 0000000..012717d
--- /dev/null
+++ b/primitives/rtl/AFFR.sv
@@ -0,0 +1,22 @@
+// AFFR # ( .WIDTH/.DTYPE() ) ff_ ( .q(), .d(), .en(), .clk() , .rst_l );
+module AFFR
+#(
+  parameter                         WIDTH      = 1,
+  parameter type                    DTYPE      = logic [WIDTH-1:0],
+  parameter logic [$bits(DTYPE)-1:0] RST_VALUE = '0
+)
+(
+  input  logic clk,
+  input  logic en,
+  input  logic rst_l,
+
+  input  DTYPE d,
+  output DTYPE q
+);
+
+always_ff @(posedge clk) begin
+  if      (~rst_l)  q <= DTYPE'(RST_VALUE);
+  else if (en)      q <= d;
+end
+
+endmodule
-- 
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