module core
(
  input  logic clk,
  input  logic rst_l,
  // Instruction mem interface
  output logic [63:0] if_imem_addr_IF,
  input  logic [63:0] imem_id_instr_ID

  // Data mem interface 
);

fetch fetch0 (
  .clk(clk),
  .rst_l(rst_l),
  .if_imem_addr_IF(if_imem_addr_IF)
);

always @ (posedge clk) begin
  $display("Instruction: %x", imem_id_instr_ID);
end

endmodule