From 13d946fe67c56411bf22ea97ad323bf4d4f66ec6 Mon Sep 17 00:00:00 2001 From: Joshua Yun Date: Wed, 10 Jul 2024 00:19:30 -0500 Subject: Updated projects --- projects/riscv/411-improvements.html | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 projects/riscv/411-improvements.html (limited to 'projects/riscv/411-improvements.html') diff --git a/projects/riscv/411-improvements.html b/projects/riscv/411-improvements.html new file mode 100644 index 0000000..fe1c5d6 --- /dev/null +++ b/projects/riscv/411-improvements.html @@ -0,0 +1,27 @@ + + + + + Joshua's Website + + + + + + +

Class Processor Improvements

+ <-Back +

+ My groupmates and I made a Out of Order processor with a LSU, GShare Branch predictor, and Early branch resolution that supports RISCV-IM. + I will be writing about the further improvments that I make to the processor. +

+ -- cgit v1.2.3