path: root/verilog/alu/v4/aluOp.h

#ifndef ALU_OP
#define ALU_OP

#define ADD             0
#define SUB             8
#define XOR             4
#define OR              6
#define AND             7
#define SLL             1
#define SRL             5
#define SRA             13
#define SLT             2
#define SLTU            3
#define NONE            15

#endif