path: root/verilog/alu/v6/obj_dir/Valu6___024root__Slow.cpp

// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See Valu6.h for the primary calling header

#include "verilated.h"

#include "Valu6__Syms.h"
#include "Valu6___024root.h"

void Valu6___024root___ctor_var_reset(Valu6___024root* vlSelf);

Valu6___024root::Valu6___024root(Valu6__Syms* symsp, const char* name)
    : VerilatedModule{name}
    , vlSymsp{symsp}
 {
    // Reset structure values
    Valu6___024root___ctor_var_reset(this);
}

void Valu6___024root::__Vconfigure(bool first) {
    if (false && first) {}  // Prevent unused
}

Valu6___024root::~Valu6___024root() {
}