blob: 7030a1c55259bef7afa8eafccd7b76dfe67f3ad8 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
|
`default_nettype none
`timescale 1us/1ns
module rightshifter
(
input wire [31:0] shift,
input wire [31:0] number,
output wire [31:0] shifted
);
always @ (*)
begin
if (number[5] == 1'b1)
begin
shifted = {32{number[31]}};
end
else
begin
if (number[4] == 1'b1)
begin
shifted = {{16{number[31]}}, number[31:16]}
end
if (number[3] == 1'b1)
begin
shifted = {{8{number[31]}}, number[31:8]}
end
if (number[2] == 1'b1)
begin
shifted = {{4{number[31]}}, number[31:4]}
end
if (number[1] == 1'b1)
begin
shifted = {{2{number[31]}}, number[31:2]}
end
if (number[0] == 1'b1)
begin
shifted = {number[31], number[31:1]}
end
end
end
endmodule
|
