feat: added TB support + primitives for flipflops, initial fetch stage (not complete), mem initialization for imem complete

1 files changed, 16 insertions, 0 deletions

diff --git a/primitives/primitives.core b/primitives/primitives.core
new file mode 100644
index 0000000..72a19d7
--- /dev/null
+++ b/primitives/primitives.core
@@ -0,0 +1,16 @@
+CAPI=2:
+name: bingchao:riscv:primitives:1.0.0
+description: "RTL Primitives for the RISC-V Processor"
+
+filesets:
+  rtl:
+    files:
+      - rtl/AFF.sv
+      - rtl/AFFR.sv
+    file_type: systemVerilogSource
+
+targets:
+  default: &default
+    filesets:
+      - rtl
+    toplevel: top