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diff --git a/projects/riscv/411-improvements.html b/projects/riscv/411-improvements.html new file mode 100644 index 0000000..fe1c5d6 --- /dev/null +++ b/projects/riscv/411-improvements.html @@ -0,0 +1,27 @@ +<!DOCTYPE HTML> +<html lang="en"> +<head> + <meta charset="UTF-8"> + <title>Joshua's Website</title> + <link rel="shortcut icon" href="../../favicon.ico"> + <link rel="stylesheet" href="../../style.css"> +</head> +<body> + <div class="menu"> + <h4> + <a class="menuitem" href="../../index.html">Home</a> + <a class="menuitem" href="../projects.html">Projects</a> + <a class="menuitem" href="../../trips/trips.html">Trips</a> + <a class="menuitem" href="../../ruby/ruby.html">Ruby (Images)</a> + <a class="menuitem" href="../../other/other.html">Other</a> + <a class="menuitem" href="../../about.html">About</a> + </h4> + </div> + + <h2 class="title">Class Processor Improvements</h2> + <a class="back" href=riscv.html><-Back</a> + <p> + My groupmates and I made a Out of Order processor with a LSU, GShare Branch predictor, and Early branch resolution that supports RISCV-IM. + I will be writing about the further improvments that I make to the processor. + </p> +</body> |