summaryrefslogblamecommitdiff
path: root/verilog/alu/v4/aluOp.vh
blob: b6e916f234e1c22fb4083eb783f109e443a6f0db (plain) (tree)
1
2
3
4
5
6
7
8
9
10
11
12
13

              
 









                               

                               
      
`ifndef ALU_OP
`define ALU_OP

`define ADD             4'b0000
`define SUB             4'b1000
`define XOR             4'b0100
`define OR              4'b0110
`define AND             4'b0111
`define SLL             4'b0001
`define SRL             4'b0101
`define SRA             4'b1101
`define SLT             4'b0010
`define SLTU            4'b0011
`define NONE            4'b1111

`endif