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authorjoshua <joshua@joshuayun.com>2022-05-16 11:02:27 -0400
committerjoshua <joshua@joshuayun.com>2022-05-16 11:02:27 -0400
commit18d1ae8dd266a6aa126479a742e0e6f257d5f8a9 (patch)
treec18f3db13e81644ed7cf6530328c0bebaf0b234a /verilog/alu/v6/obj_dir/Valu6__ALL.cpp
parent7a8afb2b6659f88881139fcbcb02de5476952152 (diff)
downloadriscv-processor-inorder-18d1ae8dd266a6aa126479a742e0e6f257d5f8a9.tar.gz
revised gitignore
Diffstat (limited to 'verilog/alu/v6/obj_dir/Valu6__ALL.cpp')
-rw-r--r--verilog/alu/v6/obj_dir/Valu6__ALL.cpp9
1 files changed, 0 insertions, 9 deletions
diff --git a/verilog/alu/v6/obj_dir/Valu6__ALL.cpp b/verilog/alu/v6/obj_dir/Valu6__ALL.cpp
deleted file mode 100644
index 4e6f1a1..0000000
--- a/verilog/alu/v6/obj_dir/Valu6__ALL.cpp
+++ /dev/null
@@ -1,9 +0,0 @@
-// DESCRIPTION: Generated by verilator_includer via makefile
-#define VL_INCLUDE_OPT include
-#include "Valu6.cpp"
-#include "Valu6___024root__DepSet_he7565067__0.cpp"
-#include "Valu6__Trace__0.cpp"
-#include "Valu6___024root__Slow.cpp"
-#include "Valu6___024root__DepSet_he7565067__0__Slow.cpp"
-#include "Valu6__Syms.cpp"
-#include "Valu6__Trace__0__Slow.cpp"