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| author | functionpointersuss <joshua@joshuayun.com> | 2023-12-23 10:23:39 +0800 |
|---|---|---|
| committer | functionpointersuss <joshua@joshuayun.com> | 2023-12-23 10:23:39 +0800 |
| commit | 5b04327dfa7a3005819045c9cc19e558e86d59d5 (patch) | |
| tree | 7cc3ae2e9d5ed5129fcf0bc85c3d2fb600594489 /multiplier/hdl/full_adder.sv | |
| parent | c2f4f7dad93d68d2757b86ff28c1058982c22da5 (diff) | |
| download | riscv-processor-5b04327dfa7a3005819045c9cc19e558e86d59d5.tar.gz | |
renamed to sv
Diffstat (limited to 'multiplier/hdl/full_adder.sv')
| -rw-r--r-- | multiplier/hdl/full_adder.sv | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/multiplier/hdl/full_adder.sv b/multiplier/hdl/full_adder.sv new file mode 100644 index 0000000..1238aa7 --- /dev/null +++ b/multiplier/hdl/full_adder.sv @@ -0,0 +1,12 @@ +module full_adder ( + input logic a, + input logic b, + input logic c, + output logic sum, + output logic carry +); + +assign sum = a ^ b ^ c; +assign carry = (a & b) | (c & (a ^ b)); + +endmodule |