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all: tree test
tree:
./gen_wallace.py 32 -a
test:
verilator --trace --cc --exe --build -j 0 -Wall tb_multiplier.cpp multiplier.v
./obj_dir/Vmultiplier
synth:
yosys -p "read_verilog multiplier.v ; hierarchy -top multiplier -libdir . ; synth_ecp5"
clean:
rm -rf log_* obj_dir
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