Yes

1 files changed, 91 insertions, 180 deletions

diff --git a/verilog/alu/v6/obj_dir/Valu6.cpp b/verilog/alu/v6/obj_dir/Valu6.cpp
index 2e02259..75840d5 100644
--- a/verilog/alu/v6/obj_dir/Valu6.cpp
+++ b/verilog/alu/v6/obj_dir/Valu6.cpp
@@ -1,207 +1,118 @@
 // Verilated -*- C++ -*-
-// DESCRIPTION: Verilator output: Design implementation internals
-// See Valu6.h for the primary calling header
+// DESCRIPTION: Verilator output: Model implementation (design independent parts)
 
 #include "Valu6.h"
 #include "Valu6__Syms.h"
+#include "verilated_vcd_c.h"
 
-//==========
+//============================================================
+// Constructors
+
+Valu6::Valu6(VerilatedContext* _vcontextp__, const char* _vcname__)
+    : vlSymsp{new Valu6__Syms(_vcontextp__, _vcname__, this)}
+    , alu_op_i{vlSymsp->TOP.alu_op_i}
+    , alu_in_1{vlSymsp->TOP.alu_in_1}
+    , alu_in_2{vlSymsp->TOP.alu_in_2}
+    , alu_output{vlSymsp->TOP.alu_output}
+    , rootp{&(vlSymsp->TOP)}
+{
+}
+
+Valu6::Valu6(const char* _vcname__)
+    : Valu6(nullptr, _vcname__)
+{
+}
+
+//============================================================
+// Destructor
+
+Valu6::~Valu6() {
+    delete vlSymsp;
+}
+
+//============================================================
+// Evaluation loop
+
+void Valu6___024root___eval_initial(Valu6___024root* vlSelf);
+void Valu6___024root___eval_settle(Valu6___024root* vlSelf);
+void Valu6___024root___eval(Valu6___024root* vlSelf);
+#ifdef VL_DEBUG
+void Valu6___024root___eval_debug_assertions(Valu6___024root* vlSelf);
+#endif  // VL_DEBUG
+void Valu6___024root___final(Valu6___024root* vlSelf);
+
+static void _eval_initial_loop(Valu6__Syms* __restrict vlSymsp) {
+    vlSymsp->__Vm_didInit = true;
+    Valu6___024root___eval_initial(&(vlSymsp->TOP));
+    // Evaluate till stable
+    vlSymsp->__Vm_activity = true;
+    do {
+        VL_DEBUG_IF(VL_DBG_MSGF("+ Initial loop\n"););
+        Valu6___024root___eval_settle(&(vlSymsp->TOP));
+        Valu6___024root___eval(&(vlSymsp->TOP));
+    } while (0);
+}
 
 void Valu6::eval_step() {
-    VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate Valu6::eval\n"); );
-    Valu6__Syms* __restrict vlSymsp = this->__VlSymsp;  // Setup global symbol table
-    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+    VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate Valu6::eval_step\n"); );
 #ifdef VL_DEBUG
     // Debug assertions
-    _eval_debug_assertions();
+    Valu6___024root___eval_debug_assertions(&(vlSymsp->TOP));
 #endif  // VL_DEBUG
     // Initialize
     if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) _eval_initial_loop(vlSymsp);
     // Evaluate till stable
-    int __VclockLoop = 0;
-    QData __Vchange = 1;
+    vlSymsp->__Vm_activity = true;
     do {
         VL_DEBUG_IF(VL_DBG_MSGF("+ Clock loop\n"););
-        vlSymsp->__Vm_activity = true;
-        _eval(vlSymsp);
-        if (VL_UNLIKELY(++__VclockLoop > 100)) {
-            // About to fail, so enable debug to see what's not settling.
-            // Note you must run make with OPT=-DVL_DEBUG for debug prints.
-            int __Vsaved_debug = Verilated::debug();
-            Verilated::debug(1);
-            __Vchange = _change_request(vlSymsp);
-            Verilated::debug(__Vsaved_debug);
-            VL_FATAL_MT("alu6.v", 6, "",
-                "Verilated model didn't converge\n"
-                "- See DIDNOTCONVERGE in the Verilator manual");
-        } else {
-            __Vchange = _change_request(vlSymsp);
-        }
-    } while (VL_UNLIKELY(__Vchange));
+        Valu6___024root___eval(&(vlSymsp->TOP));
+    } while (0);
+    // Evaluate cleanup
 }
 
-void Valu6::_eval_initial_loop(Valu6__Syms* __restrict vlSymsp) {
-    vlSymsp->__Vm_didInit = true;
-    _eval_initial(vlSymsp);
-    vlSymsp->__Vm_activity = true;
-    // Evaluate till stable
-    int __VclockLoop = 0;
-    QData __Vchange = 1;
-    do {
-        _eval_settle(vlSymsp);
-        _eval(vlSymsp);
-        if (VL_UNLIKELY(++__VclockLoop > 100)) {
-            // About to fail, so enable debug to see what's not settling.
-            // Note you must run make with OPT=-DVL_DEBUG for debug prints.
-            int __Vsaved_debug = Verilated::debug();
-            Verilated::debug(1);
-            __Vchange = _change_request(vlSymsp);
-            Verilated::debug(__Vsaved_debug);
-            VL_FATAL_MT("alu6.v", 6, "",
-                "Verilated model didn't DC converge\n"
-                "- See DIDNOTCONVERGE in the Verilator manual");
-        } else {
-            __Vchange = _change_request(vlSymsp);
-        }
-    } while (VL_UNLIKELY(__Vchange));
-}
+//============================================================
+// Utilities
 
-VL_INLINE_OPT void Valu6::_combo__TOP__1(Valu6__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6::_combo__TOP__1\n"); );
-    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Body
-    vlTOPp->alu6__DOT__sum = (vlTOPp->alu_in_1 + ((1U 
-                                                   & (((IData)(vlTOPp->alu_op_i) 
-                                                       >> 3U) 
-                                                      | (((IData)(vlTOPp->alu_op_i) 
-                                                          >> 1U) 
-                                                         & (~ (IData)(vlTOPp->alu_op_i)))))
-                                                   ? 
-                                                  ((IData)(1U) 
-                                                   + 
-                                                   (~ vlTOPp->alu_in_2))
-                                                   : vlTOPp->alu_in_2));
-    vlTOPp->alu_output = ((0U == (7U & (IData)(vlTOPp->alu_op_i)))
-                           ? vlTOPp->alu6__DOT__sum
-                           : ((4U == (7U & (IData)(vlTOPp->alu_op_i)))
-                               ? (vlTOPp->alu_in_1 
-                                  ^ vlTOPp->alu_in_2)
-                               : ((6U == (7U & (IData)(vlTOPp->alu_op_i)))
-                                   ? (vlTOPp->alu_in_1 
-                                      | vlTOPp->alu_in_2)
-                                   : ((7U == (7U & (IData)(vlTOPp->alu_op_i)))
-                                       ? (vlTOPp->alu_in_1 
-                                          & vlTOPp->alu_in_2)
-                                       : ((1U == (7U 
-                                                  & (IData)(vlTOPp->alu_op_i)))
-                                           ? ((0x40U 
-                                               & vlTOPp->alu_in_2)
-                                               ? 0U
-                                               : ((0x1fU 
-                                                   >= 
-                                                   (0x3fU 
-                                                    & vlTOPp->alu_in_2))
-                                                   ? 
-                                                  (vlTOPp->alu_in_1 
-                                                   << 
-                                                   (0x3fU 
-                                                    & vlTOPp->alu_in_2))
-                                                   : 0U))
-                                           : ((5U == 
-                                               (7U 
-                                                & (IData)(vlTOPp->alu_op_i)))
-                                               ? ((
-                                                   (0x1fU 
-                                                    >= 
-                                                    (0x3fU 
-                                                     & vlTOPp->alu_in_2))
-                                                    ? 
-                                                   (vlTOPp->alu_in_1 
-                                                    >> 
-                                                    (0x3fU 
-                                                     & vlTOPp->alu_in_2))
-                                                    : 0U) 
-                                                  | ((8U 
-                                                      & (IData)(vlTOPp->alu_op_i))
-                                                      ? 
-                                                     ((IData)(0xffffffffU) 
-                                                      << 
-                                                      ((0x80000000U 
-                                                        & vlTOPp->alu_in_2)
-                                                        ? 0U
-                                                        : 
-                                                       ((0x10U 
-                                                         & ((~ 
-                                                             (vlTOPp->alu_in_2 
-                                                              >> 4U)) 
-                                                            << 4U)) 
-                                                        | ((8U 
-                                                            & ((~ 
-                                                                (vlTOPp->alu_in_2 
-                                                                 >> 3U)) 
-                                                               << 3U)) 
-                                                           | ((4U 
-                                                               & ((~ 
-                                                                   (vlTOPp->alu_in_2 
-                                                                    >> 2U)) 
-                                                                  << 2U)) 
-                                                              | ((2U 
-                                                                  & ((~ 
-                                                                      (vlTOPp->alu_in_2 
-                                                                       >> 1U)) 
-                                                                     << 1U)) 
-                                                                 | (1U 
-                                                                    & (~ vlTOPp->alu_in_2))))))))
-                                                      : 0U))
-                                               : ((2U 
-                                                   == 
-                                                   (7U 
-                                                    & (IData)(vlTOPp->alu_op_i)))
-                                                   ? 
-                                                  (1U 
-                                                   & (vlTOPp->alu6__DOT__sum 
-                                                      >> 0x1fU))
-                                                   : 
-                                                  ((3U 
-                                                    == 
-                                                    (7U 
-                                                     & (IData)(vlTOPp->alu_op_i)))
-                                                    ? 
-                                                   ((vlTOPp->alu_in_1 
-                                                     < vlTOPp->alu_in_2)
-                                                     ? 1U
-                                                     : 0U)
-                                                    : 0U))))))));
+VerilatedContext* Valu6::contextp() const {
+    return vlSymsp->_vm_contextp__;
 }
 
-void Valu6::_eval(Valu6__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6::_eval\n"); );
-    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Body
-    vlTOPp->_combo__TOP__1(vlSymsp);
+const char* Valu6::name() const {
+    return vlSymsp->name();
 }
 
-VL_INLINE_OPT QData Valu6::_change_request(Valu6__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6::_change_request\n"); );
-    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Body
-    return (vlTOPp->_change_request_1(vlSymsp));
+//============================================================
+// Invoke final blocks
+
+VL_ATTR_COLD void Valu6::final() {
+    Valu6___024root___final(&(vlSymsp->TOP));
 }
 
-VL_INLINE_OPT QData Valu6::_change_request_1(Valu6__Syms* __restrict vlSymsp) {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6::_change_request_1\n"); );
-    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    // Body
-    // Change detection
-    QData __req = false;  // Logically a bool
-    return __req;
+//============================================================
+// Trace configuration
+
+void Valu6___024root__trace_init_top(Valu6___024root* vlSelf, VerilatedVcd* tracep);
+
+VL_ATTR_COLD static void trace_init(void* voidSelf, VerilatedVcd* tracep, uint32_t code) {
+    // Callback from tracep->open()
+    Valu6___024root* const __restrict vlSelf VL_ATTR_UNUSED = static_cast<Valu6___024root*>(voidSelf);
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    if (!vlSymsp->_vm_contextp__->calcUnusedSigs()) {
+        VL_FATAL_MT(__FILE__, __LINE__, __FILE__,
+            "Turning on wave traces requires Verilated::traceEverOn(true) call before time 0.");
+    }
+    vlSymsp->__Vm_baseCode = code;
+    tracep->scopeEscape(' ');
+    tracep->pushNamePrefix(std::string{vlSymsp->name()} + ' ');
+    Valu6___024root__trace_init_top(vlSelf, tracep);
+    tracep->popNamePrefix();
+    tracep->scopeEscape('.');
 }
 
-#ifdef VL_DEBUG
-void Valu6::_eval_debug_assertions() {
-    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6::_eval_debug_assertions\n"); );
-    // Body
-    if (VL_UNLIKELY((alu_op_i & 0xf0U))) {
-        Verilated::overWidthError("alu_op_i");}
+VL_ATTR_COLD void Valu6___024root__trace_register(Valu6___024root* vlSelf, VerilatedVcd* tracep);
+
+VL_ATTR_COLD void Valu6::trace(VerilatedVcdC* tfp, int levels, int options) {
+    if (false && levels && options) {}  // Prevent unused
+    tfp->spTrace()->addInitCb(&trace_init, &(vlSymsp->TOP));
+    Valu6___024root__trace_register(&(vlSymsp->TOP), tfp->spTrace());
 }
-#endif  // VL_DEBUG