Verilog update

1 files changed, 36 insertions, 0 deletions

diff --git a/verilog/alu/v6/obj_dir/Valu6___024root.h b/verilog/alu/v6/obj_dir/Valu6___024root.h
new file mode 100644
index 0000000..f568bf9
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6___024root.h
@@ -0,0 +1,36 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Design internal header
+// See Valu6.h for the primary calling header
+
+#ifndef VERILATED_VALU6___024ROOT_H_
+#define VERILATED_VALU6___024ROOT_H_  // guard
+
+#include "verilated.h"
+
+class Valu6__Syms;
+VL_MODULE(Valu6___024root) {
+  public:
+
+    // DESIGN SPECIFIC STATE
+    VL_IN8(alu_op_i,3,0);
+    VL_OUT8(debugop,3,0);
+    VL_IN(alu_in_1,31,0);
+    VL_IN(alu_in_2,31,0);
+    VL_OUT(alu_output,31,0);
+    VL_OUT(debugsum,31,0);
+    IData/*31:0*/ alu6__DOT__sum;
+
+    // INTERNAL VARIABLES
+    Valu6__Syms* vlSymsp;  // Symbol table
+
+    // CONSTRUCTORS
+    Valu6___024root(const char* name);
+    ~Valu6___024root();
+    VL_UNCOPYABLE(Valu6___024root);
+
+    // INTERNAL METHODS
+    void __Vconfigure(Valu6__Syms* symsp, bool first);
+} VL_ATTR_ALIGNED(VL_CACHE_LINE_BYTES);
+
+
+#endif  // guard