Verilog update

28 files changed, 1254 insertions, 0 deletions

diff --git a/verilog/alu/v6/obj_dir/Valu6 b/verilog/alu/v6/obj_dir/Valu6
new file mode 100755
index 0000000..1614e40
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6
diff --git a/verilog/alu/v6/obj_dir/Valu6.cpp b/verilog/alu/v6/obj_dir/Valu6.cpp
new file mode 100644
index 0000000..2e02259
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6.cpp
@@ -0,0 +1,207 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Design implementation internals
+// See Valu6.h for the primary calling header
+
+#include "Valu6.h"
+#include "Valu6__Syms.h"
+
+//==========
+
+void Valu6::eval_step() {
+    VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate Valu6::eval\n"); );
+    Valu6__Syms* __restrict vlSymsp = this->__VlSymsp;  // Setup global symbol table
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+#ifdef VL_DEBUG
+    // Debug assertions
+    _eval_debug_assertions();
+#endif  // VL_DEBUG
+    // Initialize
+    if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) _eval_initial_loop(vlSymsp);
+    // Evaluate till stable
+    int __VclockLoop = 0;
+    QData __Vchange = 1;
+    do {
+        VL_DEBUG_IF(VL_DBG_MSGF("+ Clock loop\n"););
+        vlSymsp->__Vm_activity = true;
+        _eval(vlSymsp);
+        if (VL_UNLIKELY(++__VclockLoop > 100)) {
+            // About to fail, so enable debug to see what's not settling.
+            // Note you must run make with OPT=-DVL_DEBUG for debug prints.
+            int __Vsaved_debug = Verilated::debug();
+            Verilated::debug(1);
+            __Vchange = _change_request(vlSymsp);
+            Verilated::debug(__Vsaved_debug);
+            VL_FATAL_MT("alu6.v", 6, "",
+                "Verilated model didn't converge\n"
+                "- See DIDNOTCONVERGE in the Verilator manual");
+        } else {
+            __Vchange = _change_request(vlSymsp);
+        }
+    } while (VL_UNLIKELY(__Vchange));
+}
+
+void Valu6::_eval_initial_loop(Valu6__Syms* __restrict vlSymsp) {
+    vlSymsp->__Vm_didInit = true;
+    _eval_initial(vlSymsp);
+    vlSymsp->__Vm_activity = true;
+    // Evaluate till stable
+    int __VclockLoop = 0;
+    QData __Vchange = 1;
+    do {
+        _eval_settle(vlSymsp);
+        _eval(vlSymsp);
+        if (VL_UNLIKELY(++__VclockLoop > 100)) {
+            // About to fail, so enable debug to see what's not settling.
+            // Note you must run make with OPT=-DVL_DEBUG for debug prints.
+            int __Vsaved_debug = Verilated::debug();
+            Verilated::debug(1);
+            __Vchange = _change_request(vlSymsp);
+            Verilated::debug(__Vsaved_debug);
+            VL_FATAL_MT("alu6.v", 6, "",
+                "Verilated model didn't DC converge\n"
+                "- See DIDNOTCONVERGE in the Verilator manual");
+        } else {
+            __Vchange = _change_request(vlSymsp);
+        }
+    } while (VL_UNLIKELY(__Vchange));
+}
+
+VL_INLINE_OPT void Valu6::_combo__TOP__1(Valu6__Syms* __restrict vlSymsp) {
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6::_combo__TOP__1\n"); );
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+    // Body
+    vlTOPp->alu6__DOT__sum = (vlTOPp->alu_in_1 + ((1U 
+                                                   & (((IData)(vlTOPp->alu_op_i) 
+                                                       >> 3U) 
+                                                      | (((IData)(vlTOPp->alu_op_i) 
+                                                          >> 1U) 
+                                                         & (~ (IData)(vlTOPp->alu_op_i)))))
+                                                   ? 
+                                                  ((IData)(1U) 
+                                                   + 
+                                                   (~ vlTOPp->alu_in_2))
+                                                   : vlTOPp->alu_in_2));
+    vlTOPp->alu_output = ((0U == (7U & (IData)(vlTOPp->alu_op_i)))
+                           ? vlTOPp->alu6__DOT__sum
+                           : ((4U == (7U & (IData)(vlTOPp->alu_op_i)))
+                               ? (vlTOPp->alu_in_1 
+                                  ^ vlTOPp->alu_in_2)
+                               : ((6U == (7U & (IData)(vlTOPp->alu_op_i)))
+                                   ? (vlTOPp->alu_in_1 
+                                      | vlTOPp->alu_in_2)
+                                   : ((7U == (7U & (IData)(vlTOPp->alu_op_i)))
+                                       ? (vlTOPp->alu_in_1 
+                                          & vlTOPp->alu_in_2)
+                                       : ((1U == (7U 
+                                                  & (IData)(vlTOPp->alu_op_i)))
+                                           ? ((0x40U 
+                                               & vlTOPp->alu_in_2)
+                                               ? 0U
+                                               : ((0x1fU 
+                                                   >= 
+                                                   (0x3fU 
+                                                    & vlTOPp->alu_in_2))
+                                                   ? 
+                                                  (vlTOPp->alu_in_1 
+                                                   << 
+                                                   (0x3fU 
+                                                    & vlTOPp->alu_in_2))
+                                                   : 0U))
+                                           : ((5U == 
+                                               (7U 
+                                                & (IData)(vlTOPp->alu_op_i)))
+                                               ? ((
+                                                   (0x1fU 
+                                                    >= 
+                                                    (0x3fU 
+                                                     & vlTOPp->alu_in_2))
+                                                    ? 
+                                                   (vlTOPp->alu_in_1 
+                                                    >> 
+                                                    (0x3fU 
+                                                     & vlTOPp->alu_in_2))
+                                                    : 0U) 
+                                                  | ((8U 
+                                                      & (IData)(vlTOPp->alu_op_i))
+                                                      ? 
+                                                     ((IData)(0xffffffffU) 
+                                                      << 
+                                                      ((0x80000000U 
+                                                        & vlTOPp->alu_in_2)
+                                                        ? 0U
+                                                        : 
+                                                       ((0x10U 
+                                                         & ((~ 
+                                                             (vlTOPp->alu_in_2 
+                                                              >> 4U)) 
+                                                            << 4U)) 
+                                                        | ((8U 
+                                                            & ((~ 
+                                                                (vlTOPp->alu_in_2 
+                                                                 >> 3U)) 
+                                                               << 3U)) 
+                                                           | ((4U 
+                                                               & ((~ 
+                                                                   (vlTOPp->alu_in_2 
+                                                                    >> 2U)) 
+                                                                  << 2U)) 
+                                                              | ((2U 
+                                                                  & ((~ 
+                                                                      (vlTOPp->alu_in_2 
+                                                                       >> 1U)) 
+                                                                     << 1U)) 
+                                                                 | (1U 
+                                                                    & (~ vlTOPp->alu_in_2))))))))
+                                                      : 0U))
+                                               : ((2U 
+                                                   == 
+                                                   (7U 
+                                                    & (IData)(vlTOPp->alu_op_i)))
+                                                   ? 
+                                                  (1U 
+                                                   & (vlTOPp->alu6__DOT__sum 
+                                                      >> 0x1fU))
+                                                   : 
+                                                  ((3U 
+                                                    == 
+                                                    (7U 
+                                                     & (IData)(vlTOPp->alu_op_i)))
+                                                    ? 
+                                                   ((vlTOPp->alu_in_1 
+                                                     < vlTOPp->alu_in_2)
+                                                     ? 1U
+                                                     : 0U)
+                                                    : 0U))))))));
+}
+
+void Valu6::_eval(Valu6__Syms* __restrict vlSymsp) {
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6::_eval\n"); );
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+    // Body
+    vlTOPp->_combo__TOP__1(vlSymsp);
+}
+
+VL_INLINE_OPT QData Valu6::_change_request(Valu6__Syms* __restrict vlSymsp) {
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6::_change_request\n"); );
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+    // Body
+    return (vlTOPp->_change_request_1(vlSymsp));
+}
+
+VL_INLINE_OPT QData Valu6::_change_request_1(Valu6__Syms* __restrict vlSymsp) {
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6::_change_request_1\n"); );
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+    // Body
+    // Change detection
+    QData __req = false;  // Logically a bool
+    return __req;
+}
+
+#ifdef VL_DEBUG
+void Valu6::_eval_debug_assertions() {
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6::_eval_debug_assertions\n"); );
+    // Body
+    if (VL_UNLIKELY((alu_op_i & 0xf0U))) {
+        Verilated::overWidthError("alu_op_i");}
+}
+#endif  // VL_DEBUG
diff --git a/verilog/alu/v6/obj_dir/Valu6.h b/verilog/alu/v6/obj_dir/Valu6.h
new file mode 100644
index 0000000..9cddec9
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6.h
@@ -0,0 +1,102 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Primary design header
+//
+// This header should be included by all source files instantiating the design.
+// The class here is then constructed to instantiate the design.
+// See the Verilator manual for examples.
+
+#ifndef _VALU6_H_
+#define _VALU6_H_  // guard
+
+#include "verilated_heavy.h"
+
+//==========
+
+class Valu6__Syms;
+class Valu6_VerilatedVcd;
+
+
+//----------
+
+VL_MODULE(Valu6) {
+  public:
+    
+    // PORTS
+    // The application code writes and reads these signals to
+    // propagate new values into/out from the Verilated model.
+    VL_IN8(alu_op_i,3,0);
+    VL_IN(alu_in_1,31,0);
+    VL_IN(alu_in_2,31,0);
+    VL_OUT(alu_output,31,0);
+    
+    // LOCAL SIGNALS
+    // Internals; generally not touched by application code
+    IData/*31:0*/ alu6__DOT__sum;
+    
+    // LOCAL VARIABLES
+    // Internals; generally not touched by application code
+    CData/*0:0*/ __Vm_traceActivity[1];
+    
+    // INTERNAL VARIABLES
+    // Internals; generally not touched by application code
+    Valu6__Syms* __VlSymsp;  // Symbol table
+    
+    // CONSTRUCTORS
+  private:
+    VL_UNCOPYABLE(Valu6);  ///< Copying not allowed
+  public:
+    /// Construct the model; called by application code
+    /// The special name  may be used to make a wrapper with a
+    /// single model invisible with respect to DPI scope names.
+    Valu6(const char* name = "TOP");
+    /// Destroy the model; called (often implicitly) by application code
+    ~Valu6();
+    /// Trace signals in the model; called by application code
+    void trace(VerilatedVcdC* tfp, int levels, int options = 0);
+    
+    // API METHODS
+    /// Evaluate the model.  Application must call when inputs change.
+    void eval() { eval_step(); }
+    /// Evaluate when calling multiple units/models per time step.
+    void eval_step();
+    /// Evaluate at end of a timestep for tracing, when using eval_step().
+    /// Application must call after all eval() and before time changes.
+    void eval_end_step() {}
+    /// Simulation complete, run final blocks.  Application must call on completion.
+    void final();
+    
+    // INTERNAL METHODS
+    static void _eval_initial_loop(Valu6__Syms* __restrict vlSymsp);
+    void __Vconfigure(Valu6__Syms* symsp, bool first);
+  private:
+    static QData _change_request(Valu6__Syms* __restrict vlSymsp);
+    static QData _change_request_1(Valu6__Syms* __restrict vlSymsp);
+  public:
+    static void _combo__TOP__1(Valu6__Syms* __restrict vlSymsp);
+  private:
+    void _ctor_var_reset() VL_ATTR_COLD;
+  public:
+    static void _eval(Valu6__Syms* __restrict vlSymsp);
+  private:
+#ifdef VL_DEBUG
+    void _eval_debug_assertions();
+#endif  // VL_DEBUG
+  public:
+    static void _eval_initial(Valu6__Syms* __restrict vlSymsp) VL_ATTR_COLD;
+    static void _eval_settle(Valu6__Syms* __restrict vlSymsp) VL_ATTR_COLD;
+  private:
+    static void traceChgSub0(void* userp, VerilatedVcd* tracep);
+    static void traceChgTop0(void* userp, VerilatedVcd* tracep);
+    static void traceCleanup(void* userp, VerilatedVcd* /*unused*/);
+    static void traceFullSub0(void* userp, VerilatedVcd* tracep) VL_ATTR_COLD;
+    static void traceFullTop0(void* userp, VerilatedVcd* tracep) VL_ATTR_COLD;
+    static void traceInitSub0(void* userp, VerilatedVcd* tracep) VL_ATTR_COLD;
+    static void traceInitTop(void* userp, VerilatedVcd* tracep) VL_ATTR_COLD;
+    void traceRegister(VerilatedVcd* tracep) VL_ATTR_COLD;
+    static void traceInit(void* userp, VerilatedVcd* tracep, uint32_t code) VL_ATTR_COLD;
+} VL_ATTR_ALIGNED(VL_CACHE_LINE_BYTES);
+
+//----------
+
+
+#endif  // guard
diff --git a/verilog/alu/v6/obj_dir/Valu6.mk b/verilog/alu/v6/obj_dir/Valu6.mk
new file mode 100644
index 0000000..d782d11
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6.mk
@@ -0,0 +1,66 @@
+# Verilated -*- Makefile -*-
+# DESCRIPTION: Verilator output: Makefile for building Verilated archive or executable
+#
+# Execute this makefile from the object directory:
+#    make -f Valu6.mk
+
+default: Valu6
+
+### Constants...
+# Perl executable (from $PERL)
+PERL = perl
+# Path to Verilator kit (from $VERILATOR_ROOT)
+VERILATOR_ROOT = /usr/share/verilator
+# SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE)
+SYSTEMC_INCLUDE ?= 
+# SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR)
+SYSTEMC_LIBDIR ?= 
+
+### Switches...
+# SystemC output mode?  0/1 (from --sc)
+VM_SC = 0
+# Legacy or SystemC output mode?  0/1 (from --sc)
+VM_SP_OR_SC = $(VM_SC)
+# Deprecated
+VM_PCLI = 1
+# Deprecated: SystemC architecture to find link library path (from $SYSTEMC_ARCH)
+VM_SC_TARGET_ARCH = linux
+
+### Vars...
+# Design prefix (from --prefix)
+VM_PREFIX = Valu6
+# Module prefix (from --prefix)
+VM_MODPREFIX = Valu6
+# User CFLAGS (from -CFLAGS on Verilator command line)
+VM_USER_CFLAGS = \
+
+# User LDLIBS (from -LDFLAGS on Verilator command line)
+VM_USER_LDLIBS = \
+
+# User .cpp files (from .cpp's on Verilator command line)
+VM_USER_CLASSES = \
+	tbalu \
+
+# User .cpp directories (from .cpp's on Verilator command line)
+VM_USER_DIR = \
+	. \
+
+
+### Default rules...
+# Include list of all generated classes
+include Valu6_classes.mk
+# Include global rules
+include $(VERILATOR_ROOT)/include/verilated.mk
+
+### Executable rules... (from --exe)
+VPATH += $(VM_USER_DIR)
+
+tbalu.o: tbalu.cpp
+	$(OBJCACHE) $(CXX) $(CXXFLAGS) $(CPPFLAGS) $(OPT_FAST) -c -o $@ $<
+
+### Link rules... (from --exe)
+Valu6: $(VK_USER_OBJS) $(VK_GLOBAL_OBJS) $(VM_PREFIX)__ALL.a $(VM_HIER_LIBS)
+	$(LINK) $(LDFLAGS) $^ $(LOADLIBES) $(LDLIBS) $(LIBS) $(SC_LIBS) -o $@
+
+
+# Verilated -*- Makefile -*-
diff --git a/verilog/alu/v6/obj_dir/Valu6__ALL.a b/verilog/alu/v6/obj_dir/Valu6__ALL.a
new file mode 100644
index 0000000..b05f397
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6__ALL.a
diff --git a/verilog/alu/v6/obj_dir/Valu6__ALL.cpp b/verilog/alu/v6/obj_dir/Valu6__ALL.cpp
new file mode 100644
index 0000000..4e6f1a1
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6__ALL.cpp
@@ -0,0 +1,9 @@
+// DESCRIPTION: Generated by verilator_includer via makefile
+#define VL_INCLUDE_OPT include
+#include "Valu6.cpp"
+#include "Valu6___024root__DepSet_he7565067__0.cpp"
+#include "Valu6__Trace__0.cpp"
+#include "Valu6___024root__Slow.cpp"
+#include "Valu6___024root__DepSet_he7565067__0__Slow.cpp"
+#include "Valu6__Syms.cpp"
+#include "Valu6__Trace__0__Slow.cpp"
diff --git a/verilog/alu/v6/obj_dir/Valu6__ALL.d b/verilog/alu/v6/obj_dir/Valu6__ALL.d
new file mode 100644
index 0000000..0dd5496
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6__ALL.d
@@ -0,0 +1,13 @@
+Valu6__ALL.o: Valu6__ALL.cpp Valu6.cpp Valu6.h \
+ /usr/share/verilator/include/verilated.h \
+ /usr/share/verilator/include/verilatedos.h \
+ /usr/share/verilator/include/verilated_config.h \
+ /usr/share/verilator/include/verilated_types.h \
+ /usr/share/verilator/include/verilated_funcs.h Valu6__Syms.h \
+ Valu6___024root.h /usr/share/verilator/include/verilated_vcd_c.h \
+ /usr/share/verilator/include/verilated.h \
+ /usr/share/verilator/include/verilated_trace.h \
+ /usr/share/verilator/include/verilated_trace_defs.h \
+ Valu6___024root__DepSet_he7565067__0.cpp Valu6__Trace__0.cpp \
+ Valu6___024root__Slow.cpp Valu6___024root__DepSet_he7565067__0__Slow.cpp \
+ Valu6__Syms.cpp Valu6__Trace__0__Slow.cpp
diff --git a/verilog/alu/v6/obj_dir/Valu6__ALL.o b/verilog/alu/v6/obj_dir/Valu6__ALL.o
new file mode 100644
index 0000000..93f9ee6
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6__ALL.o
diff --git a/verilog/alu/v6/obj_dir/Valu6__Slow.cpp b/verilog/alu/v6/obj_dir/Valu6__Slow.cpp
new file mode 100644
index 0000000..6cd030d
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6__Slow.cpp
@@ -0,0 +1,61 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Design implementation internals
+// See Valu6.h for the primary calling header
+
+#include "Valu6.h"
+#include "Valu6__Syms.h"
+
+//==========
+
+VL_CTOR_IMP(Valu6) {
+    Valu6__Syms* __restrict vlSymsp = __VlSymsp = new Valu6__Syms(this, name());
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+    // Reset internal values
+    
+    // Reset structure values
+    _ctor_var_reset();
+}
+
+void Valu6::__Vconfigure(Valu6__Syms* vlSymsp, bool first) {
+    if (false && first) {}  // Prevent unused
+    this->__VlSymsp = vlSymsp;
+    if (false && this->__VlSymsp) {}  // Prevent unused
+    Verilated::timeunit(-6);
+    Verilated::timeprecision(-9);
+}
+
+Valu6::~Valu6() {
+    VL_DO_CLEAR(delete __VlSymsp, __VlSymsp = nullptr);
+}
+
+void Valu6::_eval_initial(Valu6__Syms* __restrict vlSymsp) {
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6::_eval_initial\n"); );
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+}
+
+void Valu6::final() {
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6::final\n"); );
+    // Variables
+    Valu6__Syms* __restrict vlSymsp = this->__VlSymsp;
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+}
+
+void Valu6::_eval_settle(Valu6__Syms* __restrict vlSymsp) {
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6::_eval_settle\n"); );
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+    // Body
+    vlTOPp->_combo__TOP__1(vlSymsp);
+}
+
+void Valu6::_ctor_var_reset() {
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6::_ctor_var_reset\n"); );
+    // Body
+    alu_in_1 = VL_RAND_RESET_I(32);
+    alu_in_2 = VL_RAND_RESET_I(32);
+    alu_op_i = VL_RAND_RESET_I(4);
+    alu_output = VL_RAND_RESET_I(32);
+    alu6__DOT__sum = VL_RAND_RESET_I(32);
+    for (int __Vi0=0; __Vi0<1; ++__Vi0) {
+        __Vm_traceActivity[__Vi0] = VL_RAND_RESET_I(1);
+    }
+}
diff --git a/verilog/alu/v6/obj_dir/Valu6__Syms.cpp b/verilog/alu/v6/obj_dir/Valu6__Syms.cpp
new file mode 100644
index 0000000..c9b82af
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6__Syms.cpp
@@ -0,0 +1,27 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Symbol table implementation internals
+
+#include "Valu6__Syms.h"
+#include "Valu6.h"
+
+
+
+// FUNCTIONS
+Valu6__Syms::~Valu6__Syms()
+{
+}
+
+Valu6__Syms::Valu6__Syms(Valu6* topp, const char* namep)
+    // Setup locals
+    : __Vm_namep(namep)
+    , __Vm_activity(false)
+    , __Vm_baseCode(0)
+    , __Vm_didInit(false)
+    // Setup submodule names
+{
+    // Pointer to top level
+    TOPp = topp;
+    // Setup each module's pointers to their submodules
+    // Setup each module's pointer back to symbol table (for public functions)
+    TOPp->__Vconfigure(this, true);
+}
diff --git a/verilog/alu/v6/obj_dir/Valu6__Syms.h b/verilog/alu/v6/obj_dir/Valu6__Syms.h
new file mode 100644
index 0000000..dcbc3c1
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6__Syms.h
@@ -0,0 +1,37 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Symbol table internal header
+//
+// Internal details; most calling programs do not need this header,
+// unless using verilator public meta comments.
+
+#ifndef _VALU6__SYMS_H_
+#define _VALU6__SYMS_H_  // guard
+
+#include "verilated_heavy.h"
+
+// INCLUDE MODULE CLASSES
+#include "Valu6.h"
+
+// SYMS CLASS
+class Valu6__Syms : public VerilatedSyms {
+  public:
+    
+    // LOCAL STATE
+    const char* __Vm_namep;
+    bool __Vm_activity;  ///< Used by trace routines to determine change occurred
+    uint32_t __Vm_baseCode;  ///< Used by trace routines when tracing multiple models
+    bool __Vm_didInit;
+    
+    // SUBCELL STATE
+    Valu6*                         TOPp;
+    
+    // CREATORS
+    Valu6__Syms(Valu6* topp, const char* namep);
+    ~Valu6__Syms();
+    
+    // METHODS
+    inline const char* name() { return __Vm_namep; }
+    
+} VL_ATTR_ALIGNED(VL_CACHE_LINE_BYTES);
+
+#endif  // guard
diff --git a/verilog/alu/v6/obj_dir/Valu6__Trace.cpp b/verilog/alu/v6/obj_dir/Valu6__Trace.cpp
new file mode 100644
index 0000000..e2e3658
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6__Trace.cpp
@@ -0,0 +1,76 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Tracing implementation internals
+#include "verilated_vcd_c.h"
+#include "Valu6__Syms.h"
+
+
+void Valu6::traceChgTop0(void* userp, VerilatedVcd* tracep) {
+    Valu6__Syms* __restrict vlSymsp = static_cast<Valu6__Syms*>(userp);
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+    // Variables
+    if (VL_UNLIKELY(!vlSymsp->__Vm_activity)) return;
+    // Body
+    {
+        vlTOPp->traceChgSub0(userp, tracep);
+    }
+}
+
+void Valu6::traceChgSub0(void* userp, VerilatedVcd* tracep) {
+    Valu6__Syms* __restrict vlSymsp = static_cast<Valu6__Syms*>(userp);
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+    vluint32_t* const oldp = tracep->oldp(vlSymsp->__Vm_baseCode + 1);
+    if (false && oldp) {}  // Prevent unused
+    // Body
+    {
+        tracep->chgIData(oldp+0,(vlTOPp->alu_in_1),32);
+        tracep->chgIData(oldp+1,(vlTOPp->alu_in_2),32);
+        tracep->chgCData(oldp+2,(vlTOPp->alu_op_i),4);
+        tracep->chgIData(oldp+3,(vlTOPp->alu_output),32);
+        tracep->chgIData(oldp+4,(((IData)(1U) + (~ vlTOPp->alu_in_2))),32);
+        tracep->chgIData(oldp+5,(vlTOPp->alu6__DOT__sum),32);
+        tracep->chgIData(oldp+6,((((0x1fU >= (0x3fU 
+                                              & vlTOPp->alu_in_2))
+                                    ? (vlTOPp->alu_in_1 
+                                       >> (0x3fU & vlTOPp->alu_in_2))
+                                    : 0U) | ((8U & (IData)(vlTOPp->alu_op_i))
+                                              ? ((IData)(0xffffffffU) 
+                                                 << 
+                                                 ((0x80000000U 
+                                                   & vlTOPp->alu_in_2)
+                                                   ? 0U
+                                                   : 
+                                                  ((0x10U 
+                                                    & ((~ 
+                                                        (vlTOPp->alu_in_2 
+                                                         >> 4U)) 
+                                                       << 4U)) 
+                                                   | ((8U 
+                                                       & ((~ 
+                                                           (vlTOPp->alu_in_2 
+                                                            >> 3U)) 
+                                                          << 3U)) 
+                                                      | ((4U 
+                                                          & ((~ 
+                                                              (vlTOPp->alu_in_2 
+                                                               >> 2U)) 
+                                                             << 2U)) 
+                                                         | ((2U 
+                                                             & ((~ 
+                                                                 (vlTOPp->alu_in_2 
+                                                                  >> 1U)) 
+                                                                << 1U)) 
+                                                            | (1U 
+                                                               & (~ vlTOPp->alu_in_2))))))))
+                                              : 0U))),32);
+    }
+}
+
+void Valu6::traceCleanup(void* userp, VerilatedVcd* /*unused*/) {
+    Valu6__Syms* __restrict vlSymsp = static_cast<Valu6__Syms*>(userp);
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+    // Body
+    {
+        vlSymsp->__Vm_activity = false;
+        vlTOPp->__Vm_traceActivity[0U] = 0U;
+    }
+}
diff --git a/verilog/alu/v6/obj_dir/Valu6__Trace__0.cpp b/verilog/alu/v6/obj_dir/Valu6__Trace__0.cpp
new file mode 100644
index 0000000..b2933ac
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6__Trace__0.cpp
@@ -0,0 +1,77 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Tracing implementation internals
+#include "verilated_vcd_c.h"
+#include "Valu6__Syms.h"
+
+
+void Valu6___024root__trace_chg_sub_0(Valu6___024root* vlSelf, VerilatedVcd* tracep);
+
+void Valu6___024root__trace_chg_top_0(void* voidSelf, VerilatedVcd* tracep) {
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6___024root__trace_chg_top_0\n"); );
+    // Init
+    Valu6___024root* const __restrict vlSelf VL_ATTR_UNUSED = static_cast<Valu6___024root*>(voidSelf);
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    if (VL_UNLIKELY(!vlSymsp->__Vm_activity)) return;
+    // Body
+    Valu6___024root__trace_chg_sub_0((&vlSymsp->TOP), tracep);
+}
+
+void Valu6___024root__trace_chg_sub_0(Valu6___024root* vlSelf, VerilatedVcd* tracep) {
+    if (false && vlSelf) {}  // Prevent unused
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6___024root__trace_chg_sub_0\n"); );
+    // Init
+    vluint32_t* const oldp VL_ATTR_UNUSED = tracep->oldp(vlSymsp->__Vm_baseCode + 1);
+    // Body
+    tracep->chgIData(oldp+0,(vlSelf->alu_in_1),32);
+    tracep->chgIData(oldp+1,(vlSelf->alu_in_2),32);
+    tracep->chgCData(oldp+2,(vlSelf->alu_op_i),4);
+    tracep->chgIData(oldp+3,(vlSelf->alu_output),32);
+    tracep->chgIData(oldp+4,(vlSelf->debugsum),32);
+    tracep->chgCData(oldp+5,(vlSelf->debugop),4);
+    tracep->chgIData(oldp+6,(((IData)(1U) + (~ vlSelf->alu_in_2))),32);
+    tracep->chgIData(oldp+7,(vlSelf->alu6__DOT__sum),32);
+    tracep->chgIData(oldp+8,((((0x1fU >= (0x3fU & vlSelf->alu_in_2))
+                                ? (vlSelf->alu_in_1 
+                                   >> (0x3fU & vlSelf->alu_in_2))
+                                : 0U) | ((8U & (IData)(vlSelf->alu_op_i))
+                                          ? ((IData)(0xffffffffU) 
+                                             << ((vlSelf->alu_in_2 
+                                                  >> 0x1fU)
+                                                  ? 0U
+                                                  : 
+                                                 ((0x10U 
+                                                   & ((~ 
+                                                       (vlSelf->alu_in_2 
+                                                        >> 4U)) 
+                                                      << 4U)) 
+                                                  | ((8U 
+                                                      & ((~ 
+                                                          (vlSelf->alu_in_2 
+                                                           >> 3U)) 
+                                                         << 3U)) 
+                                                     | ((4U 
+                                                         & ((~ 
+                                                             (vlSelf->alu_in_2 
+                                                              >> 2U)) 
+                                                            << 2U)) 
+                                                        | ((2U 
+                                                            & ((~ 
+                                                                (vlSelf->alu_in_2 
+                                                                 >> 1U)) 
+                                                               << 1U)) 
+                                                           | (1U 
+                                                              & (~ vlSelf->alu_in_2))))))))
+                                          : 0U))),32);
+}
+
+void Valu6___024root__trace_cleanup(void* voidSelf, VerilatedVcd* /*unused*/) {
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6___024root__trace_cleanup\n"); );
+    // Init
+    Valu6___024root* const __restrict vlSelf VL_ATTR_UNUSED = static_cast<Valu6___024root*>(voidSelf);
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    VlUnpacked<CData/*0:0*/, 1> __Vm_traceActivity;
+    // Body
+    vlSymsp->__Vm_activity = false;
+    __Vm_traceActivity[0U] = 0U;
+}
diff --git a/verilog/alu/v6/obj_dir/Valu6__Trace__0__Slow.cpp b/verilog/alu/v6/obj_dir/Valu6__Trace__0__Slow.cpp
new file mode 100644
index 0000000..83ce895
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6__Trace__0__Slow.cpp
@@ -0,0 +1,113 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Tracing implementation internals
+#include "verilated_vcd_c.h"
+#include "Valu6__Syms.h"
+
+
+VL_ATTR_COLD void Valu6___024root__trace_init_sub__TOP__0(Valu6___024root* vlSelf, VerilatedVcd* tracep) {
+    if (false && vlSelf) {}  // Prevent unused
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6___024root__trace_init_sub__TOP__0\n"); );
+    // Init
+    const int c = vlSymsp->__Vm_baseCode;
+    // Body
+    tracep->declBus(c+1,"alu_in_1", false,-1, 31,0);
+    tracep->declBus(c+2,"alu_in_2", false,-1, 31,0);
+    tracep->declBus(c+3,"alu_op_i", false,-1, 3,0);
+    tracep->declBus(c+4,"alu_output", false,-1, 31,0);
+    tracep->declBus(c+5,"debugsum", false,-1, 31,0);
+    tracep->declBus(c+6,"debugop", false,-1, 3,0);
+    tracep->pushNamePrefix("alu6 ");
+    tracep->declBus(c+1,"alu_in_1", false,-1, 31,0);
+    tracep->declBus(c+2,"alu_in_2", false,-1, 31,0);
+    tracep->declBus(c+3,"alu_op_i", false,-1, 3,0);
+    tracep->declBus(c+4,"alu_output", false,-1, 31,0);
+    tracep->declBus(c+5,"debugsum", false,-1, 31,0);
+    tracep->declBus(c+6,"debugop", false,-1, 3,0);
+    tracep->declBus(c+7,"complement2", false,-1, 31,0);
+    tracep->declBus(c+8,"sum", false,-1, 31,0);
+    tracep->declBus(c+9,"right", false,-1, 31,0);
+    tracep->popNamePrefix(1);
+}
+
+VL_ATTR_COLD void Valu6___024root__trace_init_top(Valu6___024root* vlSelf, VerilatedVcd* tracep) {
+    if (false && vlSelf) {}  // Prevent unused
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6___024root__trace_init_top\n"); );
+    // Body
+    Valu6___024root__trace_init_sub__TOP__0(vlSelf, tracep);
+}
+
+VL_ATTR_COLD void Valu6___024root__trace_full_top_0(void* voidSelf, VerilatedVcd* tracep);
+void Valu6___024root__trace_chg_top_0(void* voidSelf, VerilatedVcd* tracep);
+void Valu6___024root__trace_cleanup(void* voidSelf, VerilatedVcd* /*unused*/);
+
+VL_ATTR_COLD void Valu6___024root__trace_register(Valu6___024root* vlSelf, VerilatedVcd* tracep) {
+    if (false && vlSelf) {}  // Prevent unused
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6___024root__trace_register\n"); );
+    // Body
+    tracep->addFullCb(&Valu6___024root__trace_full_top_0, vlSelf);
+    tracep->addChgCb(&Valu6___024root__trace_chg_top_0, vlSelf);
+    tracep->addCleanupCb(&Valu6___024root__trace_cleanup, vlSelf);
+}
+
+VL_ATTR_COLD void Valu6___024root__trace_full_sub_0(Valu6___024root* vlSelf, VerilatedVcd* tracep);
+
+VL_ATTR_COLD void Valu6___024root__trace_full_top_0(void* voidSelf, VerilatedVcd* tracep) {
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6___024root__trace_full_top_0\n"); );
+    // Init
+    Valu6___024root* const __restrict vlSelf VL_ATTR_UNUSED = static_cast<Valu6___024root*>(voidSelf);
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    // Body
+    Valu6___024root__trace_full_sub_0((&vlSymsp->TOP), tracep);
+}
+
+VL_ATTR_COLD void Valu6___024root__trace_full_sub_0(Valu6___024root* vlSelf, VerilatedVcd* tracep) {
+    if (false && vlSelf) {}  // Prevent unused
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6___024root__trace_full_sub_0\n"); );
+    // Init
+    vluint32_t* const oldp VL_ATTR_UNUSED = tracep->oldp(vlSymsp->__Vm_baseCode);
+    // Body
+    tracep->fullIData(oldp+1,(vlSelf->alu_in_1),32);
+    tracep->fullIData(oldp+2,(vlSelf->alu_in_2),32);
+    tracep->fullCData(oldp+3,(vlSelf->alu_op_i),4);
+    tracep->fullIData(oldp+4,(vlSelf->alu_output),32);
+    tracep->fullIData(oldp+5,(vlSelf->debugsum),32);
+    tracep->fullCData(oldp+6,(vlSelf->debugop),4);
+    tracep->fullIData(oldp+7,(((IData)(1U) + (~ vlSelf->alu_in_2))),32);
+    tracep->fullIData(oldp+8,(vlSelf->alu6__DOT__sum),32);
+    tracep->fullIData(oldp+9,((((0x1fU >= (0x3fU & vlSelf->alu_in_2))
+                                 ? (vlSelf->alu_in_1 
+                                    >> (0x3fU & vlSelf->alu_in_2))
+                                 : 0U) | ((8U & (IData)(vlSelf->alu_op_i))
+                                           ? ((IData)(0xffffffffU) 
+                                              << ((vlSelf->alu_in_2 
+                                                   >> 0x1fU)
+                                                   ? 0U
+                                                   : 
+                                                  ((0x10U 
+                                                    & ((~ 
+                                                        (vlSelf->alu_in_2 
+                                                         >> 4U)) 
+                                                       << 4U)) 
+                                                   | ((8U 
+                                                       & ((~ 
+                                                           (vlSelf->alu_in_2 
+                                                            >> 3U)) 
+                                                          << 3U)) 
+                                                      | ((4U 
+                                                          & ((~ 
+                                                              (vlSelf->alu_in_2 
+                                                               >> 2U)) 
+                                                             << 2U)) 
+                                                         | ((2U 
+                                                             & ((~ 
+                                                                 (vlSelf->alu_in_2 
+                                                                  >> 1U)) 
+                                                                << 1U)) 
+                                                            | (1U 
+                                                               & (~ vlSelf->alu_in_2))))))))
+                                           : 0U))),32);
+}
diff --git a/verilog/alu/v6/obj_dir/Valu6__Trace__Slow.cpp b/verilog/alu/v6/obj_dir/Valu6__Trace__Slow.cpp
new file mode 100644
index 0000000..89bdf46
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6__Trace__Slow.cpp
@@ -0,0 +1,127 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Tracing implementation internals
+#include "verilated_vcd_c.h"
+#include "Valu6__Syms.h"
+
+
+//======================
+
+void Valu6::trace(VerilatedVcdC* tfp, int, int) {
+    tfp->spTrace()->addInitCb(&traceInit, __VlSymsp);
+    traceRegister(tfp->spTrace());
+}
+
+void Valu6::traceInit(void* userp, VerilatedVcd* tracep, uint32_t code) {
+    // Callback from tracep->open()
+    Valu6__Syms* __restrict vlSymsp = static_cast<Valu6__Syms*>(userp);
+    if (!Verilated::calcUnusedSigs()) {
+        VL_FATAL_MT(__FILE__, __LINE__, __FILE__,
+                        "Turning on wave traces requires Verilated::traceEverOn(true) call before time 0.");
+    }
+    vlSymsp->__Vm_baseCode = code;
+    tracep->module(vlSymsp->name());
+    tracep->scopeEscape(' ');
+    Valu6::traceInitTop(vlSymsp, tracep);
+    tracep->scopeEscape('.');
+}
+
+//======================
+
+
+void Valu6::traceInitTop(void* userp, VerilatedVcd* tracep) {
+    Valu6__Syms* __restrict vlSymsp = static_cast<Valu6__Syms*>(userp);
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+    // Body
+    {
+        vlTOPp->traceInitSub0(userp, tracep);
+    }
+}
+
+void Valu6::traceInitSub0(void* userp, VerilatedVcd* tracep) {
+    Valu6__Syms* __restrict vlSymsp = static_cast<Valu6__Syms*>(userp);
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+    const int c = vlSymsp->__Vm_baseCode;
+    if (false && tracep && c) {}  // Prevent unused
+    // Body
+    {
+        tracep->declBus(c+1,"alu_in_1", false,-1, 31,0);
+        tracep->declBus(c+2,"alu_in_2", false,-1, 31,0);
+        tracep->declBus(c+3,"alu_op_i", false,-1, 3,0);
+        tracep->declBus(c+4,"alu_output", false,-1, 31,0);
+        tracep->declBus(c+1,"alu6 alu_in_1", false,-1, 31,0);
+        tracep->declBus(c+2,"alu6 alu_in_2", false,-1, 31,0);
+        tracep->declBus(c+3,"alu6 alu_op_i", false,-1, 3,0);
+        tracep->declBus(c+4,"alu6 alu_output", false,-1, 31,0);
+        tracep->declBus(c+5,"alu6 complement2", false,-1, 31,0);
+        tracep->declBus(c+6,"alu6 sum", false,-1, 31,0);
+        tracep->declBus(c+7,"alu6 right", false,-1, 31,0);
+    }
+}
+
+void Valu6::traceRegister(VerilatedVcd* tracep) {
+    // Body
+    {
+        tracep->addFullCb(&traceFullTop0, __VlSymsp);
+        tracep->addChgCb(&traceChgTop0, __VlSymsp);
+        tracep->addCleanupCb(&traceCleanup, __VlSymsp);
+    }
+}
+
+void Valu6::traceFullTop0(void* userp, VerilatedVcd* tracep) {
+    Valu6__Syms* __restrict vlSymsp = static_cast<Valu6__Syms*>(userp);
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+    // Body
+    {
+        vlTOPp->traceFullSub0(userp, tracep);
+    }
+}
+
+void Valu6::traceFullSub0(void* userp, VerilatedVcd* tracep) {
+    Valu6__Syms* __restrict vlSymsp = static_cast<Valu6__Syms*>(userp);
+    Valu6* const __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
+    vluint32_t* const oldp = tracep->oldp(vlSymsp->__Vm_baseCode);
+    if (false && oldp) {}  // Prevent unused
+    // Body
+    {
+        tracep->fullIData(oldp+1,(vlTOPp->alu_in_1),32);
+        tracep->fullIData(oldp+2,(vlTOPp->alu_in_2),32);
+        tracep->fullCData(oldp+3,(vlTOPp->alu_op_i),4);
+        tracep->fullIData(oldp+4,(vlTOPp->alu_output),32);
+        tracep->fullIData(oldp+5,(((IData)(1U) + (~ vlTOPp->alu_in_2))),32);
+        tracep->fullIData(oldp+6,(vlTOPp->alu6__DOT__sum),32);
+        tracep->fullIData(oldp+7,((((0x1fU >= (0x3fU 
+                                               & vlTOPp->alu_in_2))
+                                     ? (vlTOPp->alu_in_1 
+                                        >> (0x3fU & vlTOPp->alu_in_2))
+                                     : 0U) | ((8U & (IData)(vlTOPp->alu_op_i))
+                                               ? ((IData)(0xffffffffU) 
+                                                  << 
+                                                  ((0x80000000U 
+                                                    & vlTOPp->alu_in_2)
+                                                    ? 0U
+                                                    : 
+                                                   ((0x10U 
+                                                     & ((~ 
+                                                         (vlTOPp->alu_in_2 
+                                                          >> 4U)) 
+                                                        << 4U)) 
+                                                    | ((8U 
+                                                        & ((~ 
+                                                            (vlTOPp->alu_in_2 
+                                                             >> 3U)) 
+                                                           << 3U)) 
+                                                       | ((4U 
+                                                           & ((~ 
+                                                               (vlTOPp->alu_in_2 
+                                                                >> 2U)) 
+                                                              << 2U)) 
+                                                          | ((2U 
+                                                              & ((~ 
+                                                                  (vlTOPp->alu_in_2 
+                                                                   >> 1U)) 
+                                                                 << 1U)) 
+                                                             | (1U 
+                                                                & (~ vlTOPp->alu_in_2))))))))
+                                               : 0U))),32);
+    }
+}
diff --git a/verilog/alu/v6/obj_dir/Valu6___024root.h b/verilog/alu/v6/obj_dir/Valu6___024root.h
new file mode 100644
index 0000000..f568bf9
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6___024root.h
@@ -0,0 +1,36 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Design internal header
+// See Valu6.h for the primary calling header
+
+#ifndef VERILATED_VALU6___024ROOT_H_
+#define VERILATED_VALU6___024ROOT_H_  // guard
+
+#include "verilated.h"
+
+class Valu6__Syms;
+VL_MODULE(Valu6___024root) {
+  public:
+
+    // DESIGN SPECIFIC STATE
+    VL_IN8(alu_op_i,3,0);
+    VL_OUT8(debugop,3,0);
+    VL_IN(alu_in_1,31,0);
+    VL_IN(alu_in_2,31,0);
+    VL_OUT(alu_output,31,0);
+    VL_OUT(debugsum,31,0);
+    IData/*31:0*/ alu6__DOT__sum;
+
+    // INTERNAL VARIABLES
+    Valu6__Syms* vlSymsp;  // Symbol table
+
+    // CONSTRUCTORS
+    Valu6___024root(const char* name);
+    ~Valu6___024root();
+    VL_UNCOPYABLE(Valu6___024root);
+
+    // INTERNAL METHODS
+    void __Vconfigure(Valu6__Syms* symsp, bool first);
+} VL_ATTR_ALIGNED(VL_CACHE_LINE_BYTES);
+
+
+#endif  // guard
diff --git a/verilog/alu/v6/obj_dir/Valu6___024root__DepSet_he7565067__0.cpp b/verilog/alu/v6/obj_dir/Valu6___024root__DepSet_he7565067__0.cpp
new file mode 100644
index 0000000..afd43c4
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6___024root__DepSet_he7565067__0.cpp
@@ -0,0 +1,137 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Design implementation internals
+// See Valu6.h for the primary calling header
+
+#include "verilated.h"
+
+#include "Valu6___024root.h"
+
+VL_INLINE_OPT void Valu6___024root___combo__TOP__0(Valu6___024root* vlSelf) {
+    if (false && vlSelf) {}  // Prevent unused
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6___024root___combo__TOP__0\n"); );
+    // Body
+    vlSelf->debugop = vlSelf->alu_op_i;
+    vlSelf->alu6__DOT__sum = (vlSelf->alu_in_1 + ((IData)(
+                                                          (((IData)(vlSelf->alu_op_i) 
+                                                            >> 3U) 
+                                                           | (2U 
+                                                              == 
+                                                              (3U 
+                                                               & (IData)(vlSelf->alu_op_i)))))
+                                                   ? 
+                                                  ((IData)(1U) 
+                                                   + 
+                                                   (~ vlSelf->alu_in_2))
+                                                   : vlSelf->alu_in_2));
+    vlSelf->debugsum = vlSelf->alu6__DOT__sum;
+    vlSelf->alu_output = ((0U == (7U & (IData)(vlSelf->alu_op_i)))
+                           ? vlSelf->alu6__DOT__sum
+                           : ((4U == (7U & (IData)(vlSelf->alu_op_i)))
+                               ? (vlSelf->alu_in_1 
+                                  ^ vlSelf->alu_in_2)
+                               : ((6U == (7U & (IData)(vlSelf->alu_op_i)))
+                                   ? (vlSelf->alu_in_1 
+                                      | vlSelf->alu_in_2)
+                                   : ((7U == (7U & (IData)(vlSelf->alu_op_i)))
+                                       ? (vlSelf->alu_in_1 
+                                          & vlSelf->alu_in_2)
+                                       : ((1U == (7U 
+                                                  & (IData)(vlSelf->alu_op_i)))
+                                           ? ((0x40U 
+                                               & vlSelf->alu_in_2)
+                                               ? 0U
+                                               : ((0x1fU 
+                                                   >= 
+                                                   (0x3fU 
+                                                    & vlSelf->alu_in_2))
+                                                   ? 
+                                                  (vlSelf->alu_in_1 
+                                                   << 
+                                                   (0x3fU 
+                                                    & vlSelf->alu_in_2))
+                                                   : 0U))
+                                           : ((5U == 
+                                               (7U 
+                                                & (IData)(vlSelf->alu_op_i)))
+                                               ? ((
+                                                   (0x1fU 
+                                                    >= 
+                                                    (0x3fU 
+                                                     & vlSelf->alu_in_2))
+                                                    ? 
+                                                   (vlSelf->alu_in_1 
+                                                    >> 
+                                                    (0x3fU 
+                                                     & vlSelf->alu_in_2))
+                                                    : 0U) 
+                                                  | ((8U 
+                                                      & (IData)(vlSelf->alu_op_i))
+                                                      ? 
+                                                     ((IData)(0xffffffffU) 
+                                                      << 
+                                                      ((vlSelf->alu_in_2 
+                                                        >> 0x1fU)
+                                                        ? 0U
+                                                        : 
+                                                       ((0x10U 
+                                                         & ((~ 
+                                                             (vlSelf->alu_in_2 
+                                                              >> 4U)) 
+                                                            << 4U)) 
+                                                        | ((8U 
+                                                            & ((~ 
+                                                                (vlSelf->alu_in_2 
+                                                                 >> 3U)) 
+                                                               << 3U)) 
+                                                           | ((4U 
+                                                               & ((~ 
+                                                                   (vlSelf->alu_in_2 
+                                                                    >> 2U)) 
+                                                                  << 2U)) 
+                                                              | ((2U 
+                                                                  & ((~ 
+                                                                      (vlSelf->alu_in_2 
+                                                                       >> 1U)) 
+                                                                     << 1U)) 
+                                                                 | (1U 
+                                                                    & (~ vlSelf->alu_in_2))))))))
+                                                      : 0U))
+                                               : ((2U 
+                                                   == 
+                                                   (7U 
+                                                    & (IData)(vlSelf->alu_op_i)))
+                                                   ? 
+                                                  (vlSelf->alu6__DOT__sum 
+                                                   >> 0x1fU)
+                                                   : 
+                                                  ((3U 
+                                                    == 
+                                                    (7U 
+                                                     & (IData)(vlSelf->alu_op_i)))
+                                                    ? 
+                                                   ((vlSelf->alu_in_1 
+                                                     < vlSelf->alu_in_2)
+                                                     ? 1U
+                                                     : 0U)
+                                                    : 0U))))))));
+}
+
+void Valu6___024root___eval(Valu6___024root* vlSelf) {
+    if (false && vlSelf) {}  // Prevent unused
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6___024root___eval\n"); );
+    // Body
+    Valu6___024root___combo__TOP__0(vlSelf);
+}
+
+#ifdef VL_DEBUG
+void Valu6___024root___eval_debug_assertions(Valu6___024root* vlSelf) {
+    if (false && vlSelf) {}  // Prevent unused
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6___024root___eval_debug_assertions\n"); );
+    // Body
+    if (VL_UNLIKELY((vlSelf->alu_op_i & 0xf0U))) {
+        Verilated::overWidthError("alu_op_i");}
+}
+#endif  // VL_DEBUG
diff --git a/verilog/alu/v6/obj_dir/Valu6___024root__DepSet_he7565067__0__Slow.cpp b/verilog/alu/v6/obj_dir/Valu6___024root__DepSet_he7565067__0__Slow.cpp
new file mode 100644
index 0000000..896483f
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6___024root__DepSet_he7565067__0__Slow.cpp
@@ -0,0 +1,43 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Design implementation internals
+// See Valu6.h for the primary calling header
+
+#include "verilated.h"
+
+#include "Valu6___024root.h"
+
+VL_ATTR_COLD void Valu6___024root___eval_initial(Valu6___024root* vlSelf) {
+    if (false && vlSelf) {}  // Prevent unused
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6___024root___eval_initial\n"); );
+}
+
+void Valu6___024root___combo__TOP__0(Valu6___024root* vlSelf);
+
+VL_ATTR_COLD void Valu6___024root___eval_settle(Valu6___024root* vlSelf) {
+    if (false && vlSelf) {}  // Prevent unused
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6___024root___eval_settle\n"); );
+    // Body
+    Valu6___024root___combo__TOP__0(vlSelf);
+}
+
+VL_ATTR_COLD void Valu6___024root___final(Valu6___024root* vlSelf) {
+    if (false && vlSelf) {}  // Prevent unused
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6___024root___final\n"); );
+}
+
+VL_ATTR_COLD void Valu6___024root___ctor_var_reset(Valu6___024root* vlSelf) {
+    if (false && vlSelf) {}  // Prevent unused
+    Valu6__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
+    VL_DEBUG_IF(VL_DBG_MSGF("+    Valu6___024root___ctor_var_reset\n"); );
+    // Body
+    vlSelf->alu_in_1 = VL_RAND_RESET_I(32);
+    vlSelf->alu_in_2 = VL_RAND_RESET_I(32);
+    vlSelf->alu_op_i = VL_RAND_RESET_I(4);
+    vlSelf->alu_output = VL_RAND_RESET_I(32);
+    vlSelf->debugsum = VL_RAND_RESET_I(32);
+    vlSelf->debugop = VL_RAND_RESET_I(4);
+    vlSelf->alu6__DOT__sum = VL_RAND_RESET_I(32);
+}
diff --git a/verilog/alu/v6/obj_dir/Valu6___024root__Slow.cpp b/verilog/alu/v6/obj_dir/Valu6___024root__Slow.cpp
new file mode 100644
index 0000000..9918041
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6___024root__Slow.cpp
@@ -0,0 +1,25 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Design implementation internals
+// See Valu6.h for the primary calling header
+
+#include "verilated.h"
+
+#include "Valu6__Syms.h"
+#include "Valu6___024root.h"
+
+void Valu6___024root___ctor_var_reset(Valu6___024root* vlSelf);
+
+Valu6___024root::Valu6___024root(const char* _vcname__)
+    : VerilatedModule(_vcname__)
+ {
+    // Reset structure values
+    Valu6___024root___ctor_var_reset(this);
+}
+
+void Valu6___024root::__Vconfigure(Valu6__Syms* _vlSymsp, bool first) {
+    if (false && first) {}  // Prevent unused
+    this->vlSymsp = _vlSymsp;
+}
+
+Valu6___024root::~Valu6___024root() {
+}
diff --git a/verilog/alu/v6/obj_dir/Valu6__ver.d b/verilog/alu/v6/obj_dir/Valu6__ver.d
new file mode 100644
index 0000000..38bf8e0
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6__ver.d
@@ -0,0 +1 @@
+obj_dir/Valu6.cpp obj_dir/Valu6.h obj_dir/Valu6.mk obj_dir/Valu6__Slow.cpp obj_dir/Valu6__Syms.cpp obj_dir/Valu6__Syms.h obj_dir/Valu6__Trace.cpp obj_dir/Valu6__Trace__Slow.cpp obj_dir/Valu6__ver.d obj_dir/Valu6_classes.mk  : /usr/bin/verilator_bin /usr/bin/verilator_bin alu6.v aluOp.vh 
diff --git a/verilog/alu/v6/obj_dir/Valu6__verFiles.dat b/verilog/alu/v6/obj_dir/Valu6__verFiles.dat
new file mode 100644
index 0000000..389cc3d
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6__verFiles.dat
@@ -0,0 +1,16 @@
+# DESCRIPTION: Verilator output: Timestamp data for --skip-identical.  Delete at will.
+C "-Wall --cc --exe --build tbalu.cpp alu6.v --trace"
+S   7544824   425500  1651977992   501242168  1627086909           0 "/usr/bin/verilator_bin"
+S       982   195432  1652382291   705526780  1652382291   704526776 "alu6.v"
+S       369   130885  1652206009   461809710  1652206009   461809710 "aluOp.vh"
+T     10458   130865  1652382292   927532038  1652382292   927532038 "obj_dir/Valu6.cpp"
+T      3600   130864  1652382292   927532038  1652382292   927532038 "obj_dir/Valu6.h"
+T      1760   130873  1652382292   927532038  1652382292   927532038 "obj_dir/Valu6.mk"
+T      1849   195436  1652382292   927532038  1652382292   927532038 "obj_dir/Valu6__Slow.cpp"
+T       617   130862  1652382292   926532034  1652382292   926532034 "obj_dir/Valu6__Syms.cpp"
+T       946   130863  1652382292   926532034  1652382292   926532034 "obj_dir/Valu6__Syms.h"
+T      3801   195435  1652382292   927532038  1652382292   927532038 "obj_dir/Valu6__Trace.cpp"
+T      5706   195434  1652382292   927532038  1652382292   927532038 "obj_dir/Valu6__Trace__Slow.cpp"
+T       289   130861  1652382292   927532038  1652382292   927532038 "obj_dir/Valu6__ver.d"
+T         0        0  1652382292   927532038  1652382292   927532038 "obj_dir/Valu6__verFiles.dat"
+T      1641   130872  1652382292   927532038  1652382292   927532038 "obj_dir/Valu6_classes.mk"
diff --git a/verilog/alu/v6/obj_dir/Valu6_classes.mk b/verilog/alu/v6/obj_dir/Valu6_classes.mk
new file mode 100644
index 0000000..e08ed68
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/Valu6_classes.mk
@@ -0,0 +1,52 @@
+# Verilated -*- Makefile -*-
+# DESCRIPTION: Verilator output: Make include file with class lists
+#
+# This file lists generated Verilated files, for including in higher level makefiles.
+# See Valu6.mk for the caller.
+
+### Switches...
+# C11 constructs required?  0/1 (always on now)
+VM_C11 = 1
+# Coverage output mode?  0/1 (from --coverage)
+VM_COVERAGE = 0
+# Parallel builds?  0/1 (from --output-split)
+VM_PARALLEL_BUILDS = 0
+# Threaded output mode?  0/1/N threads (from --threads)
+VM_THREADS = 0
+# Tracing output mode?  0/1 (from --trace/--trace-fst)
+VM_TRACE = 1
+# Tracing output mode in FST format?  0/1 (from --trace-fst)
+VM_TRACE_FST = 0
+# Tracing threaded output mode?  0/1/N threads (from --trace-thread)
+VM_TRACE_THREADS = 0
+# Separate FST writer thread? 0/1 (from --trace-fst with --trace-thread > 0)
+VM_TRACE_FST_WRITER_THREAD = 0
+
+### Object file lists...
+# Generated module classes, fast-path, compile with highest optimization
+VM_CLASSES_FAST += \
+	Valu6 \
+
+# Generated module classes, non-fast-path, compile with low/medium optimization
+VM_CLASSES_SLOW += \
+	Valu6__Slow \
+
+# Generated support classes, fast-path, compile with highest optimization
+VM_SUPPORT_FAST += \
+	Valu6__Trace \
+
+# Generated support classes, non-fast-path, compile with low/medium optimization
+VM_SUPPORT_SLOW += \
+	Valu6__Syms \
+	Valu6__Trace__Slow \
+
+# Global classes, need linked once per executable, fast-path, compile with highest optimization
+VM_GLOBAL_FAST += \
+	verilated \
+	verilated_vcd_c \
+
+# Global classes, need linked once per executable, non-fast-path, compile with low/medium optimization
+VM_GLOBAL_SLOW += \
+
+
+# Verilated -*- Makefile -*-
diff --git a/verilog/alu/v6/obj_dir/tbalu.d b/verilog/alu/v6/obj_dir/tbalu.d
new file mode 100644
index 0000000..7d7066c
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/tbalu.d
@@ -0,0 +1,9 @@
+tbalu.o: ../tbalu.cpp /usr/share/verilator/include/verilated.h \
+ /usr/share/verilator/include/verilatedos.h \
+ /usr/share/verilator/include/verilated_config.h \
+ /usr/share/verilator/include/verilated_types.h \
+ /usr/share/verilator/include/verilated_funcs.h \
+ /usr/share/verilator/include/verilated_vcd_c.h \
+ /usr/share/verilator/include/verilated.h \
+ /usr/share/verilator/include/verilated_trace.h \
+ /usr/share/verilator/include/verilated_trace_defs.h Valu6.h ../aluOp.h
diff --git a/verilog/alu/v6/obj_dir/tbalu.o b/verilog/alu/v6/obj_dir/tbalu.o
new file mode 100644
index 0000000..f612394
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/tbalu.o
diff --git a/verilog/alu/v6/obj_dir/verilated.d b/verilog/alu/v6/obj_dir/verilated.d
new file mode 100644
index 0000000..7f4c5e4
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/verilated.d
@@ -0,0 +1,9 @@
+verilated.o: /usr/share/verilator/include/verilated.cpp \
+ /usr/share/verilator/include/verilatedos.h \
+ /usr/share/verilator/include/verilated_imp.h \
+ /usr/share/verilator/include/verilated.h \
+ /usr/share/verilator/include/verilated_config.h \
+ /usr/share/verilator/include/verilated_types.h \
+ /usr/share/verilator/include/verilated_funcs.h \
+ /usr/share/verilator/include/verilated_syms.h \
+ /usr/share/verilator/include/verilated_sym_props.h
diff --git a/verilog/alu/v6/obj_dir/verilated.o b/verilog/alu/v6/obj_dir/verilated.o
new file mode 100644
index 0000000..a226a8b
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/verilated.o
diff --git a/verilog/alu/v6/obj_dir/verilated_vcd_c.d b/verilog/alu/v6/obj_dir/verilated_vcd_c.d
new file mode 100644
index 0000000..667485f
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/verilated_vcd_c.d
@@ -0,0 +1,11 @@
+verilated_vcd_c.o: /usr/share/verilator/include/verilated_vcd_c.cpp \
+ /usr/share/verilator/include/verilatedos.h \
+ /usr/share/verilator/include/verilated.h \
+ /usr/share/verilator/include/verilated_config.h \
+ /usr/share/verilator/include/verilated_types.h \
+ /usr/share/verilator/include/verilated_funcs.h \
+ /usr/share/verilator/include/verilated_vcd_c.h \
+ /usr/share/verilator/include/verilated_trace.h \
+ /usr/share/verilator/include/verilated_trace_defs.h \
+ /usr/share/verilator/include/verilated_trace_imp.cpp \
+ /usr/share/verilator/include/verilated_intrinsics.h
diff --git a/verilog/alu/v6/obj_dir/verilated_vcd_c.o b/verilog/alu/v6/obj_dir/verilated_vcd_c.o
new file mode 100644
index 0000000..469c75e
--- /dev/null
+++ b/verilog/alu/v6/obj_dir/verilated_vcd_c.o