diff options
| author | Joshua Yun <jjyun4@illinois.edu> | 2023-08-28 14:42:23 -0500 |
|---|---|---|
| committer | Joshua Yun <jjyun4@illinois.edu> | 2023-08-28 14:42:23 -0500 |
| commit | c1fa3c36da28e9e947f6279329c47777f31fe7a2 (patch) | |
| tree | bd321c8e33200427b23bffe96c7c1bae90d8a044 | |
| parent | d069ea63cce08c0f5c8d7da7f8ab05115bd8d856 (diff) | |
| download | riscv-processor-inorder-master.tar.gz | |
63 files changed, 1148 insertions, 26192 deletions
diff --git a/report/report.pdf b/report/report.pdf Binary files differdeleted file mode 100644 index d9f3a9e..0000000 --- a/report/report.pdf +++ /dev/null diff --git a/report/report.tex b/report/report.tex deleted file mode 100644 index 0daee27..0000000 --- a/report/report.tex +++ /dev/null @@ -1,180 +0,0 @@ -\documentclass[12pt]{article} - -\usepackage[margin=1in]{geometry} -\setlength{\parindent}{0pt} - -\begin{document} -\section {Introduction} -\subsection{Purpose of the Project} -\par -The purpose of this project is to explore how floating point numbers are operated on in a CPU, as well as how different parts of the CPU signal each other to pass information and commands between different parts. -Most FPGAs have their FPU blocks optimized where the code is no longer readable, and understanding how they are implemented at a fundamental level in verilog will also allow the group to write and conceptualize better verilog. -With this project, the implementation will also require me to gain practical experience with either System Verilog or Verilog, allowing me to use those in other projects in the future. -\subsection{Features of the Project} -\par -The two features of the current version of the project are: -\begin{itemize} - \item All RISCV-I ALU operations - \item FPU Addition - \item FPU Subtraction (Incomplete) -\end{itemize} -\section{Design Overview} -\par The main design of the FPU is a simple ALU which (currently) supports two operations of the floating point variety, i.e. adding and subtraction. -The pipeline of the testing to building of the FPU is first it is written in Verilog, test benches are executed to verify its functionality, with a special focus on edge cases. -All the verilog is then checked to make sure that it is synthesizeable, before it is then built onto the FPGA using Yosys and Nextpnr. -\section{Implementation Details} -\subsection{Floating point IEEE-754 Representation} -\par Floating point notation in the IEEE standard is taking advantage of scientific notation to represent numbers both extremely large and small using the same number of bits in the same configuration. -This is done by using the following representation: -\begin{itemize} - \item 1 bit at the beginning to represent sign - \item 8 bits after to represent the exponent, which is the 8 bit value minus 127 - \item 23 bit mantissa at the end, representing the actual value of the number. -\end{itemize} - -An example number would be as follows: -$0\_01111111\_11000000000000000000000$ -This is the number 1.75, since we have 0 bit 1, i.e. positive, 127 for the exponent, meaning $2^{127-127} = 2^0$, and a mantissa of 110000... when combined with a hidden bit, yields $1.11 * 2^0$ or $1.75$ - -\subsection{Algorithm for addition and subtraction} -\par Simply put, the algorithim is as follows: -\begin{itemize} - \item{Pull both numbers' hidden bits in} - \item{Denormalize number with smaller exponent, i.e. make the two numbers have the same exponent} - \item{Negate numbers which are negative} - \item{Add or Subtract (Add two's complement) the numbers} - \item{Renormalize i.e. shift if there is a carry and add to the exp} - \item{Put the sign, new exponent and mantissa into the output} -\end{itemize} -\subsection{Implementation in Verilog} -\par The implementation of the RISCV-I ALU was trivial, and only used the unoptimized verilog arithmetic elements, and so will not be included in this report. (If curious it will be on git.joshuayun.com along with the FPU). -The FPU was implemented using only assign statements, as it is a combinational logic only circuit in most cases, however this does introduce much more complexity into the design, as only ternary operators can be used in assign statements which need choice logic. - -\subsection{Testbench} -\par -The testbench was quite naively implemented, with the group simply trying multiple test cases sequentially without a loop due to the fact that the bench was used mostly as a way to debug the output, rather than a true test of functionality: the code can be found in the appendix or on my git repository (soon @ git.joshuayun.com) - -\subsection{FPGA} -\par The verilog was all synthesized and put onto the Orangecrab using the yosys nextpnr toolchain, however there was not sufficient time to test the true functionality of the FPU on an actual FPGA due to an inability for data to be taken out or display from the FPGA, nor could data be put into the FPGA. - -\section{Results} -\par The verilog on the FPU in the icarus verilog simulator is passing all of the given tests, however it does not fully have NaN, infinity, nor zero functionality. -However, more tests on niche cases, i.e. larger + smaller numbers and certain signed operations may be dysfunctional at the moment. - -\section{Problems and Challenges} -\subsection{Design Problems} -The only major issue with designing and planing out the mechanics of the FPU was the issue of not having the proper knowledge on how exactly to best implement these algorithms, especially when it came to try and deal with adding negative numbers or subtracting positive ones, as it was often not clear how to properly represent negative numbers internally in the FPU, as well as when then carry is used for determining sign or carrying the exponent higher. -\subsection{Debugging} -The major problem encountered in this project mostly dealt with understanding the actual algorithms at the lower levels that the FPUs use, as well as how they would be synthesized in verilog. -Having a small amount of verilog experience meant that the second issue was mitigated, but still was a problem in that there were often many smaller mistakes that were difficult to find which significantly changed the output of the FPU. -It was also difficult having consistent debugging information in the FPU at all times, mostly due to the fact that since the FPUs is a series of combinational logic with assign statements, internal displays could not be used on the ternary operators to determine whether the branching condition was correct or not. - -\section{Future Plans} -The main future plan for this project is the first add most of the NaN and zero functionality to this FPU, as it is lacking even the most basic of operation support other than two non-zero integers. -The next obvious step would then be to implement division and multiplication using the FPU, and this would most likely along with significant amounts of debugging be the completion of the FPU. -Future plans will also include incoroporating this into a RISCV-I processor that I plan to design and synthesize onto an FPGA, along with enough modifications to the control logic and FPU to make it RISCV-IF compliant as well. -\section{References} -\begin{verbatim} -Martin, R., 2021. Computer Organization and Design Unit 7: Floating Point. -[online] Cis.upenn.edu. [Accessed 12 December 2021]. -\end{verbatim} - -\pagebreak -\section{Appendix} -\subsection{Verilog FPU} -\begin{verbatim} -`include "exp_calc.v" -module fpu_2( - input wire add_not, - input wire[31:0] a_in, b_in, - output wire[31:0] out -); - -wire[23:0] a_sig, b_sig, b_shft_sig, a_shft_sig, a_sign_sig, b_sign_sig; -wire[24:0] sig_sum, sig_diff, sig_op, sig_final; -wire[7:0] exp; -wire[7:0] diff, neg_diff; -wire same_sign; - -assign diff = a_in[30:23] - b_in[30:23]; -assign neg_diff = b_in[30:23] - a_in[30:23]; -assign exp = diff[7] ? b_in[30:23] : a_in[30:23]; - -assign same_sign = ~(a_in[31] ^ b_in[31]); - -// Pull hidden bit into sig, if exp 0, no hidden bit -assign a_sig = (|a_in[30:23] ? {1'b1, a_in[22:0]} : {1'b0, a_in[22:0]}); -assign b_sig = (|b_in[30:23] ? {1'b1, b_in[22:0]} : {1'b0, b_in[22:0]}); - -assign a_shft_sig = (diff[7] ? a_sig >> neg_diff : a_sig); -assign b_shft_sig = (diff[7] ? b_sig : b_sig >> diff); - -//2C Invert if Negative and not same signs -assign a_sign_sig = same_sign ? a_shft_sig : -(a_in[31] ? ~(a_shft_sig) + 24'b1 : a_shft_sig); -assign b_sign_sig = same_sign ? b_shft_sig : -(b_in[31] ? ~(b_shft_sig) + 24'b1 : b_shft_sig); - -//Adding -assign sig_sum = a_sign_sig + b_sign_sig; -/* assign sig_sum = a_shft_sig + b_shft_sig; */ -//Subtraction -assign sig_diff = a_shft_sig + ~(b_shft_sig) + 25'b1; - -assign sig_op = add_not ? sig_diff : sig_sum; -assign sig_final = sig_op[24] | same_sign ? sig_op : ~(sig_op) + 24'b1; - - -// Assign exp and mantissa -assign out[31] = a_shft_sig > b_shft_sig ? a_in[31] : b_in[31]; -assign out[30:23] = sig_sum[24] & same_sign ? exp + 8'b1 : (same_sign ? exp : exp); -assign out[22:0] = sig_final[24] & same_sign ? sig_final[23:1] : sig_final[22:0]; - -//assign out = {sig_sum, 7'b0}; -// assign out = {diff, neg_diff, 16'b0}; -/* assign out = {sig_op, 7'b0}; */ - -endmodule -\end{verbatim} - -\subsection{Verilog Testbench} -\begin{verbatim} -`timescale 1us/1ns - -`include "fpu_2.v" - -module fpu_bench; - -reg[31:0] input1, input2; -reg add = 1'b1; -wire[31:0] fpu_output; - -fpu_2 fpu0 (add,input1, input2, fpu_output); - -initial begin - input1=32'b00111111010000000000000000000000; // -.75 - input2=32'b10111111110000000000000000000000; // -1.5 - #5; - $display("\nSum: %16b + %16b\n = %16b",input1,input2,fpu_output); - - input1=32'b00111110100000000000000000000000; //.25 - input2=32'b00111111010000000000000000000000; // .75 - #5; - $display("\nSum: %16b + %16b = %16b",input1,input2,fpu_output); - - input1=32'b01000000000111001100110011001101; // 2.45 - input2=32'b00111111001001100110011001100110; //.65 - #5; - $display("\nSum: %16b + %16b\n = %16b",input1,input2,fpu_output); - - input1=32'b01000000000111001100110011001101; // 2.45 - input2=32'b10111111001001100110011001100110; //.65 - #5; - $display("\nSum: %16b + %16b\n = %16b",input1[22:0],input2[22:0],fpu_output[31:8]); - - - $finish; -end -endmodule -\end{verbatim} -\end{document} diff --git a/verilog/Makefile b/verilog/Makefile new file mode 100644 index 0000000..4775c0d --- /dev/null +++ b/verilog/Makefile @@ -0,0 +1,10 @@ +datapath_test: + verilator --trace --cc --exe --build -j 0 -Wall tbdatapath.cpp datapath.v + ./obj_dir/Vdatapath +datapath_synth: + yosys -p "read_verilog datapath.v ; hierarchy -top datapath -libdir . ; synth_ecp5" +clean: + rm -rf log_* obj_dir +alu_test: + verilator --cc --exe --build -j 0 -Wall tbalu.cpp alu.v + ./obj_dir/Valu diff --git a/verilog/alu.v b/verilog/alu.v new file mode 100644 index 0000000..5a4e6c0 --- /dev/null +++ b/verilog/alu.v @@ -0,0 +1,45 @@ +`default_nettype none +`timescale 1us/1ns + +`define ADDSUB 3'b000 +`define XOR 3'b100 +`define OR 3'b110 +`define AND 3'b111 +`define SLL 3'b001 +`define SR 3'b101 +`define SLT 3'b010 +`define SLTU 3'b011 + +module alu +( +input wire [31:0] A, +input wire[31:0] B, +input wire[4:0] OP, +output reg[31:0] C, +output wire Branch +); + +wire [31:0] sum = A + ({32{(OP[3] | OP[1])}} ^ B) + {31'b0, (OP[3] | OP[1])}; +wire [31:0] right = (A >> B[4:0] | (OP[3] == 0 ? 32'b0 : + (32'hFFFFFFFF << {~B[4] , ~B[3], ~B[2], ~B[1], ~B[0]}))); + +assign Branch = |C; + +always @ (*) begin + case(OP[2:0]) + `ADDSUB: C = sum; + `XOR: C = A ^ B; + `OR: C = A | B; + `AND: C = A & B; + `SLL: C = |B[31:5] ? 32'b0 : A << B[4:0]; + `SR: C = right; + `SLT: C = {31'b0, sum[31]}; + `SLTU: C = {31'b0, A < B}; + default: C = 32'b0; + endcase + if (OP[4]) begin + C = B; + end +end + +endmodule diff --git a/verilog/alu/LUTS b/verilog/alu/LUTS deleted file mode 100644 index 94ec7ce..0000000 --- a/verilog/alu/LUTS +++ /dev/null @@ -1,95 +0,0 @@ -=== alu V1 === - - Number of wires: 1965 - Number of wire bits: 2876 - Number of public wires: 1965 - Number of public wire bits: 2876 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 2269 - CCU2C 32 - L6MUX21 339 - LUT4 1339 - PFUMX 559 - - -=== alu V2 === - - Number of wires: 2094 - Number of wire bits: 3031 - Number of public wires: 2094 - Number of public wire bits: 3031 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 2386 - CCU2C 32 - L6MUX21 374 - LUT4 1385 - PFUMX 595 - - -=== alu3 === - - Number of wires: 2006 - Number of wire bits: 3043 - Number of public wires: 2006 - Number of public wire bits: 3043 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 2317 - CCU2C 48 - L6MUX21 356 - LUT4 1346 - PFUMX 567 - - -=== alu V4 === - - Number of wires: 1746 - Number of wire bits: 2619 - Number of public wires: 1746 - Number of public wire bits: 2619 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 2042 - CCU2C 32 - L6MUX21 297 - LUT4 1218 - PFUMX 495 - - - -=== alu V5 === - - Number of wires: 1728 - Number of wire bits: 2635 - Number of public wires: 1728 - Number of public wire bits: 2635 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 2039 - CCU2C 32 - L6MUX21 295 - LUT4 1223 - PFUMX 489 - - -=== alu6 === - - Number of wires: 871 - Number of wire bits: 1857 - Number of public wires: 871 - Number of public wire bits: 1857 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 1183 - CCU2C 48 - L6MUX21 109 - LUT4 778 - PFUMX 248 diff --git a/verilog/alu/v1/Makefile b/verilog/alu/v1/Makefile deleted file mode 100644 index 74816c7..0000000 --- a/verilog/alu/v1/Makefile +++ /dev/null @@ -1,35 +0,0 @@ -PROJ=alu -VERION:=r0.2 -RM = rm -rf -COPY = cp -a -PATH_SEP = / - - -crab: ${PROJ}.dfu - -dfu: ${PROJ}.dfu - dfu-util -D $< - - -%.json: %.v - yosys -p "read_verilog $<; synth_ecp5 -top ${PROJ} -json $@" - -%_out.config: %.json - nextpnr-ecp5 --json $< --textcfg $@ --25k --package CSFBGA285 --lpf crab.pcf - -%.bit: %_out.config - ecppack --compress --freq 38.8 --input $< --bit $@ - -%.dfu : %.bit - $(COPY) $< $@ - dfu-suffix -v 1209 -p 5af0 -a $@ - -sim: - verilator -Wall --cc --exe --build tbalu.cpp alu.v --trace && ./obj_dir/Valu > out -simclean: - rm -rf obj_dir/* out - -clean: - $(RM) -f ${PROJ}.bit ${PROJ}_out.config ${PROJ}.json ${PROJ}.dfu - -.PHONY: prog clean diff --git a/verilog/alu/v1/alu.v b/verilog/alu/v1/alu.v deleted file mode 100644 index cb66ddb..0000000 --- a/verilog/alu/v1/alu.v +++ /dev/null @@ -1,34 +0,0 @@ -`default_nettype none -`timescale 1us/1ns - -`include "aluOp.vh" - -module alu -( -input wire [31:0] alu_in_1, -input wire[31:0] alu_in_2, -input wire[3:0] alu_op_i, -output wire[31:0] alu_output -); - - -wire [31:0] diff = alu_in_1 - alu_in_2; - -assign alu_output = - alu_op_i == `ADD ? alu_in_1 + alu_in_2 : - alu_op_i == `SUB ? diff : - alu_op_i == `XOR ? alu_in_1 ^ alu_in_2 : - alu_op_i == `OR ? alu_in_1 | alu_in_2 : - alu_op_i == `AND ? alu_in_1 & alu_in_2 : - alu_op_i == `SLL ? alu_in_1 << alu_in_2 : - alu_op_i == `SRL ? alu_in_1 >> alu_in_2 : - alu_op_i == `SLTU ? (alu_in_1 < alu_in_2 ? 32'b1 : 32'b0) : - alu_op_i == `NONE ? alu_in_1 : - alu_op_i == `SLT ? (alu_in_1[31] == alu_in_2[31] ? (diff[31] == 1'b0 ? 32'b0 : 32'b1) : (alu_in_1[31] == 1'b1 ? 32'b1 : 32'b0) ) : - alu_op_i == `SRA ? (alu_in_1 >> alu_in_2) | (alu_in_1[31] == 1'b0 ? 32'b0 : - 32'hFFFFFFFF << ((alu_in_2[4] ? 0 : 5'b10000) + (alu_in_2[3] ? 0 : 5'b01000) + - (alu_in_2[2] ? 0 : 5'b00100) + (alu_in_2[1] ? 0 : 5'b00010) + (alu_in_2[0] ? 0 : 5'b00001)) - ) : - 32'b0; - -endmodule diff --git a/verilog/alu/v1/aluOp.h b/verilog/alu/v1/aluOp.h deleted file mode 100644 index 999dac2..0000000 --- a/verilog/alu/v1/aluOp.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef ALU_OP -#define ALU_OP - -#define ADD 0 -#define SUB 8 -#define XOR 4 -#define OR 6 -#define AND 7 -#define SLL 1 -#define SRL 5 -#define SRA 13 -#define SLT 2 -#define SLTU 3 -#define NONE 15 - -#endif diff --git a/verilog/alu/v1/aluOp.vh b/verilog/alu/v1/aluOp.vh deleted file mode 100644 index b6e916f..0000000 --- a/verilog/alu/v1/aluOp.vh +++ /dev/null @@ -1,16 +0,0 @@ -`ifndef ALU_OP -`define ALU_OP - -`define ADD 4'b0000 -`define SUB 4'b1000 -`define XOR 4'b0100 -`define OR 4'b0110 -`define AND 4'b0111 -`define SLL 4'b0001 -`define SRL 4'b0101 -`define SRA 4'b1101 -`define SLT 4'b0010 -`define SLTU 4'b0011 -`define NONE 4'b1111 - -`endif diff --git a/verilog/alu/v1/crab.pcf b/verilog/alu/v1/crab.pcf deleted file mode 100644 index c0d91c5..0000000 --- a/verilog/alu/v1/crab.pcf +++ /dev/null @@ -1,254 +0,0 @@ -LOCATE COMP "clk48" SITE "A9"; -IOBUF PORT "clk48" IO_TYPE=LVCMOS33; -FREQUENCY PORT "clk48" 48.0 MHz; - -LOCATE COMP "ddram_a[0]" SITE "C4"; -IOBUF PORT "ddram_a[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[1]" SITE "D2"; -IOBUF PORT "ddram_a[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[2]" SITE "D3"; -IOBUF PORT "ddram_a[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[2]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[3]" SITE "A3"; -IOBUF PORT "ddram_a[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[3]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[4]" SITE "A4"; -IOBUF PORT "ddram_a[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[4]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[5]" SITE "D4"; -IOBUF PORT "ddram_a[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[5]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[6]" SITE "C3"; -IOBUF PORT "ddram_a[6]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[6]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[7]" SITE "B2"; -IOBUF PORT "ddram_a[7]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[7]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[8]" SITE "B1"; -IOBUF PORT "ddram_a[8]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[8]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[9]" SITE "D1"; -IOBUF PORT "ddram_a[9]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[9]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[10]" SITE "A7"; -IOBUF PORT "ddram_a[10]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[10]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[11]" SITE "C2"; -IOBUF PORT "ddram_a[11]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[11]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[12]" SITE "B6"; -IOBUF PORT "ddram_a[12]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[12]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[13]" SITE "C1"; -IOBUF PORT "ddram_a[13]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[13]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[14]" SITE "A2"; -IOBUF PORT "ddram_a[14]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[14]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[15]" SITE "C7"; -IOBUF PORT "ddram_a[15]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[15]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[0]" SITE "D6"; -IOBUF PORT "ddram_ba[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[1]" SITE "B7"; -IOBUF PORT "ddram_ba[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[2]" SITE "A6"; -IOBUF PORT "ddram_ba[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[2]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ras_n" SITE "C12"; -IOBUF PORT "ddram_ras_n" SLEWRATE=FAST; -IOBUF PORT "ddram_ras_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_cas_n" SITE "D13"; -IOBUF PORT "ddram_cas_n" SLEWRATE=FAST; -IOBUF PORT "ddram_cas_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_we_n" SITE "B12"; -IOBUF PORT "ddram_we_n" SLEWRATE=FAST; -IOBUF PORT "ddram_we_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_cs_n" SITE "A12"; -IOBUF PORT "ddram_cs_n" SLEWRATE=FAST; -IOBUF PORT "ddram_cs_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dm[0]" SITE "D16"; -IOBUF PORT "ddram_dm[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dm[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dm[1]" SITE "G16"; -IOBUF PORT "ddram_dm[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dm[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dq[0]" SITE "C17"; -IOBUF PORT "ddram_dq[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[0]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[0]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[1]" SITE "D15"; -IOBUF PORT "ddram_dq[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[1]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[1]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[2]" SITE "B17"; -IOBUF PORT "ddram_dq[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[2]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[2]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[3]" SITE "C16"; -IOBUF PORT "ddram_dq[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[3]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[3]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[4]" SITE "A15"; -IOBUF PORT "ddram_dq[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[4]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[4]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[5]" SITE "B13"; -IOBUF PORT "ddram_dq[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[5]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[5]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[6]" SITE "A17"; -IOBUF PORT "ddram_dq[6]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[6]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[6]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[7]" SITE "A13"; -IOBUF PORT "ddram_dq[7]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[7]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[7]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[8]" SITE "F17"; -IOBUF PORT "ddram_dq[8]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[8]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[8]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[9]" SITE "F16"; -IOBUF PORT "ddram_dq[9]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[9]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[9]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[10]" SITE "G15"; -IOBUF PORT "ddram_dq[10]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[10]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[10]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[11]" SITE "F15"; -IOBUF PORT "ddram_dq[11]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[11]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[11]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[12]" SITE "J16"; -IOBUF PORT "ddram_dq[12]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[12]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[12]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[13]" SITE "C18"; -IOBUF PORT "ddram_dq[13]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[13]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[13]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[14]" SITE "H16"; -IOBUF PORT "ddram_dq[14]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[14]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[14]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[15]" SITE "F18"; -IOBUF PORT "ddram_dq[15]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[15]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[15]" TERMINATION=OFF; -LOCATE COMP "ddram_dqs_p[0]" SITE "B15"; -IOBUF PORT "ddram_dqs_p[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dqs_p[0]" IO_TYPE=SSTL135D_I; -IOBUF PORT "ddram_dqs_p[0]" TERMINATION=OFF; -IOBUF PORT "ddram_dqs_p[0]" DIFFRESISTOR=100; -LOCATE COMP "ddram_dqs_p[1]" SITE "G18"; -IOBUF PORT "ddram_dqs_p[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dqs_p[1]" IO_TYPE=SSTL135D_I; -IOBUF PORT "ddram_dqs_p[1]" TERMINATION=OFF; -IOBUF PORT "ddram_dqs_p[1]" DIFFRESISTOR=100; -LOCATE COMP "ddram_clk_p" SITE "J18"; -IOBUF PORT "ddram_clk_p" SLEWRATE=FAST; -IOBUF PORT "ddram_clk_p" IO_TYPE=SSTL135D_I; -LOCATE COMP "ddram_cke" SITE "D18"; -IOBUF PORT "ddram_cke" SLEWRATE=FAST; -IOBUF PORT "ddram_cke" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_odt" SITE "C13"; -IOBUF PORT "ddram_odt" SLEWRATE=FAST; -IOBUF PORT "ddram_odt" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_reset_n" SITE "L18"; -IOBUF PORT "ddram_reset_n" SLEWRATE=FAST; -IOBUF PORT "ddram_reset_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_vccio[0]" SITE "K16"; -IOBUF PORT "ddram_vccio[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[0]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[1]" SITE "D17"; -IOBUF PORT "ddram_vccio[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[1]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[2]" SITE "K15"; -IOBUF PORT "ddram_vccio[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[2]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[3]" SITE "K17"; -IOBUF PORT "ddram_vccio[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[3]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[4]" SITE "B18"; -IOBUF PORT "ddram_vccio[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[4]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[5]" SITE "C6"; -IOBUF PORT "ddram_vccio[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[5]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_gnd[0]" SITE "L15"; -IOBUF PORT "ddram_gnd[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_gnd[0]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_gnd[1]" SITE "L16"; -IOBUF PORT "ddram_gnd[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_gnd[1]" IO_TYPE=SSTL135_II; -LOCATE COMP "rgb_led0_r" SITE "K4"; -IOBUF PORT "rgb_led0_r" IO_TYPE=LVCMOS33; -LOCATE COMP "rgb_led0_g" SITE "M3"; -IOBUF PORT "rgb_led0_g" IO_TYPE=LVCMOS33; -LOCATE COMP "rgb_led0_b" SITE "J3"; -IOBUF PORT "rgb_led0_b" IO_TYPE=LVCMOS33; -LOCATE COMP "gpio_0" SITE "N17"; -IOBUF PORT "gpio_0" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_0" PULLMODE=DOWN; -LOCATE COMP "gpio_1" SITE "M18"; -IOBUF PORT "gpio_1" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_1" PULLMODE=DOWN; -LOCATE COMP "gpio_5" SITE "B10"; -IOBUF PORT "gpio_5" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_5" PULLMODE=DOWN; -LOCATE COMP "gpio_6" SITE "B9"; -IOBUF PORT "gpio_6" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_6" PULLMODE=DOWN; -LOCATE COMP "gpio_9" SITE "C8"; -IOBUF PORT "gpio_9" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_9" PULLMODE=DOWN; -LOCATE COMP "gpio_10" SITE "B8"; -IOBUF PORT "gpio_10" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_10" PULLMODE=DOWN; -LOCATE COMP "gpio_11" SITE "A8"; -IOBUF PORT "gpio_11" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_11" PULLMODE=DOWN; -LOCATE COMP "gpio_12" SITE "H2"; -IOBUF PORT "gpio_12" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_12" PULLMODE=DOWN; -LOCATE COMP "gpio_13" SITE "J2"; -IOBUF PORT "gpio_13" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_13" PULLMODE=DOWN; -LOCATE COMP "gpio_a0" SITE "L4"; -IOBUF PORT "gpio_a0" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a0" PULLMODE=DOWN; -LOCATE COMP "gpio_a1" SITE "N3"; -IOBUF PORT "gpio_a1" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a1" PULLMODE=DOWN; -LOCATE COMP "gpio_a2" SITE "N4"; -IOBUF PORT "gpio_a2" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a2" PULLMODE=DOWN; -LOCATE COMP "gpio_a3" SITE "H4"; -IOBUF PORT "gpio_a3" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a3" PULLMODE=DOWN; -LOCATE COMP "usr_btn" SITE "J17"; -IOBUF PORT "usr_btn" IO_TYPE=SSTL135_I; -LOCATE COMP "rst_n" SITE "V17"; -IOBUF PORT "rst_n" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_cs_n" SITE "U17"; -IOBUF PORT "spiflash4x_cs_n" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[0]" SITE "U18"; -IOBUF PORT "spiflash4x_dq[0]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[1]" SITE "T18"; -IOBUF PORT "spiflash4x_dq[1]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[2]" SITE "R18"; -IOBUF PORT "spiflash4x_dq[2]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[3]" SITE "N18"; -IOBUF PORT "spiflash4x_dq[3]" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_d_p" SITE "N1"; -IOBUF PORT "usb_d_p" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_d_n" SITE "M2"; -IOBUF PORT "usb_d_n" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_pullup" SITE "N2"; -IOBUF PORT "usb_pullup" IO_TYPE=LVCMOS33; diff --git a/verilog/alu/v1/tbalu.cpp b/verilog/alu/v1/tbalu.cpp deleted file mode 100644 index b3947f8..0000000 --- a/verilog/alu/v1/tbalu.cpp +++ /dev/null @@ -1,45 +0,0 @@ -#include <stdlib.h> -#include <iostream> -#include <verilated.h> -#include <verilated_vcd_c.h> -#include "Valu.h" -#include "aluOp.h" -#define OP SRA -#define OPSTR "SRA" -#define SIGN "SRA" -#define LOWER -10 -#define UPPER 0 - -vluint64_t sim_time = 0; - -int main(int argc, char** argv, char** env) { - Valu *dut = new Valu; - - Verilated::traceEverOn(true); - VerilatedVcdC *m_trace = new VerilatedVcdC; - dut->trace(m_trace, 5); - m_trace->open("waveform.vcd"); - - dut->op = OP; - for (dut->in1 = LOWER; (int) dut->in1 < UPPER; dut->in1++) { - for (dut->in2 = 0; (int) dut->in2 < 10; dut->in2++) { - dut->eval(); - std::cout << OPSTR << ": " << (int) dut->in1 << " " << SIGN << " " << (int) dut->in2 << " = " << (int) dut->out << "\n"; - sim_time++; - m_trace->dump(sim_time); - } - } - - for (dut->in1 = 1; (int) dut->in1 < 10; dut->in1++) { - for (dut->in2 = 0; (int) dut->in2 < 10; dut->in2++) { - dut->eval(); - std::cout << OPSTR << ": " << dut->in1 << " " << SIGN << " " << dut->in2 << " = " << dut->out << "\n"; - sim_time++; - m_trace->dump(sim_time); - } - } - - m_trace->close(); - delete dut; - exit(EXIT_SUCCESS); -} diff --git a/verilog/alu/v2/Makefile b/verilog/alu/v2/Makefile deleted file mode 100644 index 6de97ff..0000000 --- a/verilog/alu/v2/Makefile +++ /dev/null @@ -1,35 +0,0 @@ -PROJ=alu2 -VERION:=r0.2 -RM = rm -rf -COPY = cp -a -PATH_SEP = / - - -crab: ${PROJ}.dfu - -dfu: ${PROJ}.dfu - dfu-util -D $< - - -%.json: %.v - yosys -p "read_verilog $<; synth_ecp5 -top ${PROJ} -json $@" - -%_out.config: %.json - nextpnr-ecp5 --json $< --textcfg $@ --25k --package CSFBGA285 --lpf crab.pcf - -%.bit: %_out.config - ecppack --compress --freq 38.8 --input $< --bit $@ - -%.dfu : %.bit - $(COPY) $< $@ - dfu-suffix -v 1209 -p 5af0 -a $@ - -sim: - verilator -Wall --cc --exe --build tbalu.cpp alu.v --trace && ./obj_dir/Valu > out -simclean: - rm -rf obj_dir/* out - -clean: - $(RM) -f ${PROJ}.bit ${PROJ}_out.config ${PROJ}.json ${PROJ}.dfu - -.PHONY: prog clean diff --git a/verilog/alu/v2/alu2.v b/verilog/alu/v2/alu2.v deleted file mode 100644 index d7a0324..0000000 --- a/verilog/alu/v2/alu2.v +++ /dev/null @@ -1,40 +0,0 @@ -`default_nettype none -`timescale 1us/1ns - -`include "aluOp.vh" - -module alu2 -( -input wire [31:0] in1, -input wire[31:0] in2, -input wire[3:0] op, -output wire[31:0] out -); - - -wire [31:0] diff = in1 - in2; -reg [31:0] result; - -always @ (*) -begin - case (op) - `ADD: result = in1 + in2; - `SUB: result = diff; - `XOR: result = in1 ^ in2; - `OR: result = in1 | in2; - `AND: result = in1 & in2; - `SLL: result = in1 << in2; - `SRL: result = in1 >> in2; - `SLTU: result = (in1 < in2 ? 32'b1 : 32'b0); - `NONE: result = in1; - `SLT: result = (in1[31] == in2[31] ? (diff[31] == 1'b0 ? 32'b0 : 32'b1) : (in1[31] == 1'b1 ? 32'b1 : 32'b0) ); - `SRA: result = (in1 >> in2) | (in1[31] == 1'b0 ? 32'b0 : - 32'hFFFFFFFF << ((in2[4] ? 0 : 5'b10000) + (in2[3] ? 0 : 5'b01000) + - (in2[2] ? 0 : 5'b00100) + (in2[1] ? 0 : 5'b00010) + (in2[0] ? 0 : 5'b00001)) - ); - default: result = 32'b0; - endcase -end - -assign out = result; -endmodule diff --git a/verilog/alu/v2/aluOp.h b/verilog/alu/v2/aluOp.h deleted file mode 100644 index 999dac2..0000000 --- a/verilog/alu/v2/aluOp.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef ALU_OP -#define ALU_OP - -#define ADD 0 -#define SUB 8 -#define XOR 4 -#define OR 6 -#define AND 7 -#define SLL 1 -#define SRL 5 -#define SRA 13 -#define SLT 2 -#define SLTU 3 -#define NONE 15 - -#endif diff --git a/verilog/alu/v2/aluOp.vh b/verilog/alu/v2/aluOp.vh deleted file mode 100644 index b6e916f..0000000 --- a/verilog/alu/v2/aluOp.vh +++ /dev/null @@ -1,16 +0,0 @@ -`ifndef ALU_OP -`define ALU_OP - -`define ADD 4'b0000 -`define SUB 4'b1000 -`define XOR 4'b0100 -`define OR 4'b0110 -`define AND 4'b0111 -`define SLL 4'b0001 -`define SRL 4'b0101 -`define SRA 4'b1101 -`define SLT 4'b0010 -`define SLTU 4'b0011 -`define NONE 4'b1111 - -`endif diff --git a/verilog/alu/v2/crab.pcf b/verilog/alu/v2/crab.pcf deleted file mode 100644 index c0d91c5..0000000 --- a/verilog/alu/v2/crab.pcf +++ /dev/null @@ -1,254 +0,0 @@ -LOCATE COMP "clk48" SITE "A9"; -IOBUF PORT "clk48" IO_TYPE=LVCMOS33; -FREQUENCY PORT "clk48" 48.0 MHz; - -LOCATE COMP "ddram_a[0]" SITE "C4"; -IOBUF PORT "ddram_a[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[1]" SITE "D2"; -IOBUF PORT "ddram_a[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[2]" SITE "D3"; -IOBUF PORT "ddram_a[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[2]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[3]" SITE "A3"; -IOBUF PORT "ddram_a[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[3]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[4]" SITE "A4"; -IOBUF PORT "ddram_a[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[4]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[5]" SITE "D4"; -IOBUF PORT "ddram_a[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[5]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[6]" SITE "C3"; -IOBUF PORT "ddram_a[6]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[6]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[7]" SITE "B2"; -IOBUF PORT "ddram_a[7]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[7]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[8]" SITE "B1"; -IOBUF PORT "ddram_a[8]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[8]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[9]" SITE "D1"; -IOBUF PORT "ddram_a[9]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[9]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[10]" SITE "A7"; -IOBUF PORT "ddram_a[10]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[10]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[11]" SITE "C2"; -IOBUF PORT "ddram_a[11]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[11]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[12]" SITE "B6"; -IOBUF PORT "ddram_a[12]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[12]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[13]" SITE "C1"; -IOBUF PORT "ddram_a[13]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[13]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[14]" SITE "A2"; -IOBUF PORT "ddram_a[14]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[14]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[15]" SITE "C7"; -IOBUF PORT "ddram_a[15]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[15]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[0]" SITE "D6"; -IOBUF PORT "ddram_ba[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[1]" SITE "B7"; -IOBUF PORT "ddram_ba[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[2]" SITE "A6"; -IOBUF PORT "ddram_ba[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[2]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ras_n" SITE "C12"; -IOBUF PORT "ddram_ras_n" SLEWRATE=FAST; -IOBUF PORT "ddram_ras_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_cas_n" SITE "D13"; -IOBUF PORT "ddram_cas_n" SLEWRATE=FAST; -IOBUF PORT "ddram_cas_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_we_n" SITE "B12"; -IOBUF PORT "ddram_we_n" SLEWRATE=FAST; -IOBUF PORT "ddram_we_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_cs_n" SITE "A12"; -IOBUF PORT "ddram_cs_n" SLEWRATE=FAST; -IOBUF PORT "ddram_cs_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dm[0]" SITE "D16"; -IOBUF PORT "ddram_dm[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dm[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dm[1]" SITE "G16"; -IOBUF PORT "ddram_dm[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dm[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dq[0]" SITE "C17"; -IOBUF PORT "ddram_dq[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[0]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[0]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[1]" SITE "D15"; -IOBUF PORT "ddram_dq[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[1]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[1]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[2]" SITE "B17"; -IOBUF PORT "ddram_dq[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[2]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[2]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[3]" SITE "C16"; -IOBUF PORT "ddram_dq[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[3]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[3]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[4]" SITE "A15"; -IOBUF PORT "ddram_dq[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[4]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[4]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[5]" SITE "B13"; -IOBUF PORT "ddram_dq[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[5]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[5]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[6]" SITE "A17"; -IOBUF PORT "ddram_dq[6]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[6]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[6]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[7]" SITE "A13"; -IOBUF PORT "ddram_dq[7]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[7]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[7]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[8]" SITE "F17"; -IOBUF PORT "ddram_dq[8]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[8]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[8]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[9]" SITE "F16"; -IOBUF PORT "ddram_dq[9]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[9]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[9]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[10]" SITE "G15"; -IOBUF PORT "ddram_dq[10]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[10]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[10]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[11]" SITE "F15"; -IOBUF PORT "ddram_dq[11]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[11]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[11]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[12]" SITE "J16"; -IOBUF PORT "ddram_dq[12]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[12]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[12]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[13]" SITE "C18"; -IOBUF PORT "ddram_dq[13]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[13]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[13]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[14]" SITE "H16"; -IOBUF PORT "ddram_dq[14]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[14]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[14]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[15]" SITE "F18"; -IOBUF PORT "ddram_dq[15]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[15]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[15]" TERMINATION=OFF; -LOCATE COMP "ddram_dqs_p[0]" SITE "B15"; -IOBUF PORT "ddram_dqs_p[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dqs_p[0]" IO_TYPE=SSTL135D_I; -IOBUF PORT "ddram_dqs_p[0]" TERMINATION=OFF; -IOBUF PORT "ddram_dqs_p[0]" DIFFRESISTOR=100; -LOCATE COMP "ddram_dqs_p[1]" SITE "G18"; -IOBUF PORT "ddram_dqs_p[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dqs_p[1]" IO_TYPE=SSTL135D_I; -IOBUF PORT "ddram_dqs_p[1]" TERMINATION=OFF; -IOBUF PORT "ddram_dqs_p[1]" DIFFRESISTOR=100; -LOCATE COMP "ddram_clk_p" SITE "J18"; -IOBUF PORT "ddram_clk_p" SLEWRATE=FAST; -IOBUF PORT "ddram_clk_p" IO_TYPE=SSTL135D_I; -LOCATE COMP "ddram_cke" SITE "D18"; -IOBUF PORT "ddram_cke" SLEWRATE=FAST; -IOBUF PORT "ddram_cke" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_odt" SITE "C13"; -IOBUF PORT "ddram_odt" SLEWRATE=FAST; -IOBUF PORT "ddram_odt" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_reset_n" SITE "L18"; -IOBUF PORT "ddram_reset_n" SLEWRATE=FAST; -IOBUF PORT "ddram_reset_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_vccio[0]" SITE "K16"; -IOBUF PORT "ddram_vccio[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[0]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[1]" SITE "D17"; -IOBUF PORT "ddram_vccio[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[1]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[2]" SITE "K15"; -IOBUF PORT "ddram_vccio[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[2]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[3]" SITE "K17"; -IOBUF PORT "ddram_vccio[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[3]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[4]" SITE "B18"; -IOBUF PORT "ddram_vccio[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[4]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[5]" SITE "C6"; -IOBUF PORT "ddram_vccio[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[5]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_gnd[0]" SITE "L15"; -IOBUF PORT "ddram_gnd[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_gnd[0]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_gnd[1]" SITE "L16"; -IOBUF PORT "ddram_gnd[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_gnd[1]" IO_TYPE=SSTL135_II; -LOCATE COMP "rgb_led0_r" SITE "K4"; -IOBUF PORT "rgb_led0_r" IO_TYPE=LVCMOS33; -LOCATE COMP "rgb_led0_g" SITE "M3"; -IOBUF PORT "rgb_led0_g" IO_TYPE=LVCMOS33; -LOCATE COMP "rgb_led0_b" SITE "J3"; -IOBUF PORT "rgb_led0_b" IO_TYPE=LVCMOS33; -LOCATE COMP "gpio_0" SITE "N17"; -IOBUF PORT "gpio_0" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_0" PULLMODE=DOWN; -LOCATE COMP "gpio_1" SITE "M18"; -IOBUF PORT "gpio_1" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_1" PULLMODE=DOWN; -LOCATE COMP "gpio_5" SITE "B10"; -IOBUF PORT "gpio_5" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_5" PULLMODE=DOWN; -LOCATE COMP "gpio_6" SITE "B9"; -IOBUF PORT "gpio_6" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_6" PULLMODE=DOWN; -LOCATE COMP "gpio_9" SITE "C8"; -IOBUF PORT "gpio_9" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_9" PULLMODE=DOWN; -LOCATE COMP "gpio_10" SITE "B8"; -IOBUF PORT "gpio_10" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_10" PULLMODE=DOWN; -LOCATE COMP "gpio_11" SITE "A8"; -IOBUF PORT "gpio_11" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_11" PULLMODE=DOWN; -LOCATE COMP "gpio_12" SITE "H2"; -IOBUF PORT "gpio_12" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_12" PULLMODE=DOWN; -LOCATE COMP "gpio_13" SITE "J2"; -IOBUF PORT "gpio_13" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_13" PULLMODE=DOWN; -LOCATE COMP "gpio_a0" SITE "L4"; -IOBUF PORT "gpio_a0" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a0" PULLMODE=DOWN; -LOCATE COMP "gpio_a1" SITE "N3"; -IOBUF PORT "gpio_a1" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a1" PULLMODE=DOWN; -LOCATE COMP "gpio_a2" SITE "N4"; -IOBUF PORT "gpio_a2" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a2" PULLMODE=DOWN; -LOCATE COMP "gpio_a3" SITE "H4"; -IOBUF PORT "gpio_a3" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a3" PULLMODE=DOWN; -LOCATE COMP "usr_btn" SITE "J17"; -IOBUF PORT "usr_btn" IO_TYPE=SSTL135_I; -LOCATE COMP "rst_n" SITE "V17"; -IOBUF PORT "rst_n" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_cs_n" SITE "U17"; -IOBUF PORT "spiflash4x_cs_n" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[0]" SITE "U18"; -IOBUF PORT "spiflash4x_dq[0]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[1]" SITE "T18"; -IOBUF PORT "spiflash4x_dq[1]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[2]" SITE "R18"; -IOBUF PORT "spiflash4x_dq[2]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[3]" SITE "N18"; -IOBUF PORT "spiflash4x_dq[3]" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_d_p" SITE "N1"; -IOBUF PORT "usb_d_p" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_d_n" SITE "M2"; -IOBUF PORT "usb_d_n" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_pullup" SITE "N2"; -IOBUF PORT "usb_pullup" IO_TYPE=LVCMOS33; diff --git a/verilog/alu/v2/tbalu.cpp b/verilog/alu/v2/tbalu.cpp deleted file mode 100644 index b3947f8..0000000 --- a/verilog/alu/v2/tbalu.cpp +++ /dev/null @@ -1,45 +0,0 @@ -#include <stdlib.h> -#include <iostream> -#include <verilated.h> -#include <verilated_vcd_c.h> -#include "Valu.h" -#include "aluOp.h" -#define OP SRA -#define OPSTR "SRA" -#define SIGN "SRA" -#define LOWER -10 -#define UPPER 0 - -vluint64_t sim_time = 0; - -int main(int argc, char** argv, char** env) { - Valu *dut = new Valu; - - Verilated::traceEverOn(true); - VerilatedVcdC *m_trace = new VerilatedVcdC; - dut->trace(m_trace, 5); - m_trace->open("waveform.vcd"); - - dut->op = OP; - for (dut->in1 = LOWER; (int) dut->in1 < UPPER; dut->in1++) { - for (dut->in2 = 0; (int) dut->in2 < 10; dut->in2++) { - dut->eval(); - std::cout << OPSTR << ": " << (int) dut->in1 << " " << SIGN << " " << (int) dut->in2 << " = " << (int) dut->out << "\n"; - sim_time++; - m_trace->dump(sim_time); - } - } - - for (dut->in1 = 1; (int) dut->in1 < 10; dut->in1++) { - for (dut->in2 = 0; (int) dut->in2 < 10; dut->in2++) { - dut->eval(); - std::cout << OPSTR << ": " << dut->in1 << " " << SIGN << " " << dut->in2 << " = " << dut->out << "\n"; - sim_time++; - m_trace->dump(sim_time); - } - } - - m_trace->close(); - delete dut; - exit(EXIT_SUCCESS); -} diff --git a/verilog/alu/v3/Makefile b/verilog/alu/v3/Makefile deleted file mode 100644 index 11821cb..0000000 --- a/verilog/alu/v3/Makefile +++ /dev/null @@ -1,35 +0,0 @@ -PROJ=alu3 -VERION:=r0.2 -RM = rm -rf -COPY = cp -a -PATH_SEP = / - - -crab: ${PROJ}.dfu - -dfu: ${PROJ}.dfu - dfu-util -D $< - - -%.json: %.v - yosys -p "read_verilog $<; synth_ecp5 -top ${PROJ} -json $@" - -%_out.config: %.json - nextpnr-ecp5 --json $< --textcfg $@ --25k --package CSFBGA285 --lpf crab.pcf - -%.bit: %_out.config - ecppack --compress --freq 38.8 --input $< --bit $@ - -%.dfu : %.bit - $(COPY) $< $@ - dfu-suffix -v 1209 -p 5af0 -a $@ - -sim: - verilator -Wall --cc --exe --build tbalu.cpp alu.v --trace && ./obj_dir/Valu > out -simclean: - rm -rf obj_dir/* out - -clean: - $(RM) -f ${PROJ}.bit ${PROJ}_out.config ${PROJ}.json ${PROJ}.dfu - -.PHONY: prog clean diff --git a/verilog/alu/v3/alu3.v b/verilog/alu/v3/alu3.v deleted file mode 100644 index 556b226..0000000 --- a/verilog/alu/v3/alu3.v +++ /dev/null @@ -1,41 +0,0 @@ -`default_nettype none -`timescale 1us/1ns - -`include "aluOp.vh" - -module alu3 -( -input wire [31:0] alu_in_1, -input wire[31:0] alu_in_2, -input wire[3:0] alu_op_i, -output wire[31:0] alu_output -); - - -wire [31:0] diff = alu_in_1 - alu_in_1; -reg [31:0] result; - -always @ (*) -begin - case(alu_op_i) - `ADD: result = alu_in_1 + alu_in_2; - `SUB: result = diff; - `XOR: result = alu_in_1 ^ alu_in_2; - `OR: result = alu_in_1 | alu_in_2; - `AND: result = alu_in_1 & alu_in_2; - `SLL: result = alu_in_1 >> alu_in_2; - `SRL: result = alu_in_1 << alu_in_2; - `SLTU: result = (alu_in_1 < alu_in_2 ? 32'b1 : 32'b0); - `NONE: result = alu_in_1; - `SLT: result = (alu_in_1[31] == alu_in_2[31] ? (diff[31] == 1'b0 ? 32'b0 : 32'b1) : (alu_in_1[31] == 1'b1 ? 32'b1 : 32'b0)); - `SRA: result = - (alu_in_1 >> alu_in_2) | - (alu_in_1[31] == 1'b0 ? 32'b0 : - (32'hFFFFFFFF << {~alu_in_2[4], ~alu_in_2[3], ~alu_in_2[2], ~alu_in_2[1], ~alu_in_2[0]})); - default: result = 32'b0; - endcase -end - -assign alu_output = result; - -endmodule diff --git a/verilog/alu/v3/aluOp.h b/verilog/alu/v3/aluOp.h deleted file mode 100644 index 999dac2..0000000 --- a/verilog/alu/v3/aluOp.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef ALU_OP -#define ALU_OP - -#define ADD 0 -#define SUB 8 -#define XOR 4 -#define OR 6 -#define AND 7 -#define SLL 1 -#define SRL 5 -#define SRA 13 -#define SLT 2 -#define SLTU 3 -#define NONE 15 - -#endif diff --git a/verilog/alu/v3/aluOp.vh b/verilog/alu/v3/aluOp.vh deleted file mode 100644 index b6e916f..0000000 --- a/verilog/alu/v3/aluOp.vh +++ /dev/null @@ -1,16 +0,0 @@ -`ifndef ALU_OP -`define ALU_OP - -`define ADD 4'b0000 -`define SUB 4'b1000 -`define XOR 4'b0100 -`define OR 4'b0110 -`define AND 4'b0111 -`define SLL 4'b0001 -`define SRL 4'b0101 -`define SRA 4'b1101 -`define SLT 4'b0010 -`define SLTU 4'b0011 -`define NONE 4'b1111 - -`endif diff --git a/verilog/alu/v3/crab.pcf b/verilog/alu/v3/crab.pcf deleted file mode 100644 index c0d91c5..0000000 --- a/verilog/alu/v3/crab.pcf +++ /dev/null @@ -1,254 +0,0 @@ -LOCATE COMP "clk48" SITE "A9"; -IOBUF PORT "clk48" IO_TYPE=LVCMOS33; -FREQUENCY PORT "clk48" 48.0 MHz; - -LOCATE COMP "ddram_a[0]" SITE "C4"; -IOBUF PORT "ddram_a[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[1]" SITE "D2"; -IOBUF PORT "ddram_a[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[2]" SITE "D3"; -IOBUF PORT "ddram_a[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[2]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[3]" SITE "A3"; -IOBUF PORT "ddram_a[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[3]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[4]" SITE "A4"; -IOBUF PORT "ddram_a[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[4]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[5]" SITE "D4"; -IOBUF PORT "ddram_a[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[5]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[6]" SITE "C3"; -IOBUF PORT "ddram_a[6]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[6]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[7]" SITE "B2"; -IOBUF PORT "ddram_a[7]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[7]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[8]" SITE "B1"; -IOBUF PORT "ddram_a[8]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[8]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[9]" SITE "D1"; -IOBUF PORT "ddram_a[9]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[9]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[10]" SITE "A7"; -IOBUF PORT "ddram_a[10]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[10]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[11]" SITE "C2"; -IOBUF PORT "ddram_a[11]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[11]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[12]" SITE "B6"; -IOBUF PORT "ddram_a[12]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[12]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[13]" SITE "C1"; -IOBUF PORT "ddram_a[13]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[13]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[14]" SITE "A2"; -IOBUF PORT "ddram_a[14]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[14]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[15]" SITE "C7"; -IOBUF PORT "ddram_a[15]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[15]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[0]" SITE "D6"; -IOBUF PORT "ddram_ba[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[1]" SITE "B7"; -IOBUF PORT "ddram_ba[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[2]" SITE "A6"; -IOBUF PORT "ddram_ba[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[2]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ras_n" SITE "C12"; -IOBUF PORT "ddram_ras_n" SLEWRATE=FAST; -IOBUF PORT "ddram_ras_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_cas_n" SITE "D13"; -IOBUF PORT "ddram_cas_n" SLEWRATE=FAST; -IOBUF PORT "ddram_cas_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_we_n" SITE "B12"; -IOBUF PORT "ddram_we_n" SLEWRATE=FAST; -IOBUF PORT "ddram_we_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_cs_n" SITE "A12"; -IOBUF PORT "ddram_cs_n" SLEWRATE=FAST; -IOBUF PORT "ddram_cs_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dm[0]" SITE "D16"; -IOBUF PORT "ddram_dm[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dm[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dm[1]" SITE "G16"; -IOBUF PORT "ddram_dm[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dm[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dq[0]" SITE "C17"; -IOBUF PORT "ddram_dq[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[0]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[0]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[1]" SITE "D15"; -IOBUF PORT "ddram_dq[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[1]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[1]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[2]" SITE "B17"; -IOBUF PORT "ddram_dq[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[2]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[2]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[3]" SITE "C16"; -IOBUF PORT "ddram_dq[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[3]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[3]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[4]" SITE "A15"; -IOBUF PORT "ddram_dq[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[4]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[4]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[5]" SITE "B13"; -IOBUF PORT "ddram_dq[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[5]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[5]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[6]" SITE "A17"; -IOBUF PORT "ddram_dq[6]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[6]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[6]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[7]" SITE "A13"; -IOBUF PORT "ddram_dq[7]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[7]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[7]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[8]" SITE "F17"; -IOBUF PORT "ddram_dq[8]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[8]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[8]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[9]" SITE "F16"; -IOBUF PORT "ddram_dq[9]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[9]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[9]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[10]" SITE "G15"; -IOBUF PORT "ddram_dq[10]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[10]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[10]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[11]" SITE "F15"; -IOBUF PORT "ddram_dq[11]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[11]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[11]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[12]" SITE "J16"; -IOBUF PORT "ddram_dq[12]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[12]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[12]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[13]" SITE "C18"; -IOBUF PORT "ddram_dq[13]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[13]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[13]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[14]" SITE "H16"; -IOBUF PORT "ddram_dq[14]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[14]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[14]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[15]" SITE "F18"; -IOBUF PORT "ddram_dq[15]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[15]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[15]" TERMINATION=OFF; -LOCATE COMP "ddram_dqs_p[0]" SITE "B15"; -IOBUF PORT "ddram_dqs_p[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dqs_p[0]" IO_TYPE=SSTL135D_I; -IOBUF PORT "ddram_dqs_p[0]" TERMINATION=OFF; -IOBUF PORT "ddram_dqs_p[0]" DIFFRESISTOR=100; -LOCATE COMP "ddram_dqs_p[1]" SITE "G18"; -IOBUF PORT "ddram_dqs_p[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dqs_p[1]" IO_TYPE=SSTL135D_I; -IOBUF PORT "ddram_dqs_p[1]" TERMINATION=OFF; -IOBUF PORT "ddram_dqs_p[1]" DIFFRESISTOR=100; -LOCATE COMP "ddram_clk_p" SITE "J18"; -IOBUF PORT "ddram_clk_p" SLEWRATE=FAST; -IOBUF PORT "ddram_clk_p" IO_TYPE=SSTL135D_I; -LOCATE COMP "ddram_cke" SITE "D18"; -IOBUF PORT "ddram_cke" SLEWRATE=FAST; -IOBUF PORT "ddram_cke" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_odt" SITE "C13"; -IOBUF PORT "ddram_odt" SLEWRATE=FAST; -IOBUF PORT "ddram_odt" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_reset_n" SITE "L18"; -IOBUF PORT "ddram_reset_n" SLEWRATE=FAST; -IOBUF PORT "ddram_reset_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_vccio[0]" SITE "K16"; -IOBUF PORT "ddram_vccio[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[0]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[1]" SITE "D17"; -IOBUF PORT "ddram_vccio[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[1]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[2]" SITE "K15"; -IOBUF PORT "ddram_vccio[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[2]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[3]" SITE "K17"; -IOBUF PORT "ddram_vccio[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[3]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[4]" SITE "B18"; -IOBUF PORT "ddram_vccio[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[4]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[5]" SITE "C6"; -IOBUF PORT "ddram_vccio[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[5]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_gnd[0]" SITE "L15"; -IOBUF PORT "ddram_gnd[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_gnd[0]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_gnd[1]" SITE "L16"; -IOBUF PORT "ddram_gnd[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_gnd[1]" IO_TYPE=SSTL135_II; -LOCATE COMP "rgb_led0_r" SITE "K4"; -IOBUF PORT "rgb_led0_r" IO_TYPE=LVCMOS33; -LOCATE COMP "rgb_led0_g" SITE "M3"; -IOBUF PORT "rgb_led0_g" IO_TYPE=LVCMOS33; -LOCATE COMP "rgb_led0_b" SITE "J3"; -IOBUF PORT "rgb_led0_b" IO_TYPE=LVCMOS33; -LOCATE COMP "gpio_0" SITE "N17"; -IOBUF PORT "gpio_0" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_0" PULLMODE=DOWN; -LOCATE COMP "gpio_1" SITE "M18"; -IOBUF PORT "gpio_1" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_1" PULLMODE=DOWN; -LOCATE COMP "gpio_5" SITE "B10"; -IOBUF PORT "gpio_5" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_5" PULLMODE=DOWN; -LOCATE COMP "gpio_6" SITE "B9"; -IOBUF PORT "gpio_6" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_6" PULLMODE=DOWN; -LOCATE COMP "gpio_9" SITE "C8"; -IOBUF PORT "gpio_9" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_9" PULLMODE=DOWN; -LOCATE COMP "gpio_10" SITE "B8"; -IOBUF PORT "gpio_10" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_10" PULLMODE=DOWN; -LOCATE COMP "gpio_11" SITE "A8"; -IOBUF PORT "gpio_11" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_11" PULLMODE=DOWN; -LOCATE COMP "gpio_12" SITE "H2"; -IOBUF PORT "gpio_12" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_12" PULLMODE=DOWN; -LOCATE COMP "gpio_13" SITE "J2"; -IOBUF PORT "gpio_13" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_13" PULLMODE=DOWN; -LOCATE COMP "gpio_a0" SITE "L4"; -IOBUF PORT "gpio_a0" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a0" PULLMODE=DOWN; -LOCATE COMP "gpio_a1" SITE "N3"; -IOBUF PORT "gpio_a1" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a1" PULLMODE=DOWN; -LOCATE COMP "gpio_a2" SITE "N4"; -IOBUF PORT "gpio_a2" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a2" PULLMODE=DOWN; -LOCATE COMP "gpio_a3" SITE "H4"; -IOBUF PORT "gpio_a3" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a3" PULLMODE=DOWN; -LOCATE COMP "usr_btn" SITE "J17"; -IOBUF PORT "usr_btn" IO_TYPE=SSTL135_I; -LOCATE COMP "rst_n" SITE "V17"; -IOBUF PORT "rst_n" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_cs_n" SITE "U17"; -IOBUF PORT "spiflash4x_cs_n" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[0]" SITE "U18"; -IOBUF PORT "spiflash4x_dq[0]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[1]" SITE "T18"; -IOBUF PORT "spiflash4x_dq[1]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[2]" SITE "R18"; -IOBUF PORT "spiflash4x_dq[2]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[3]" SITE "N18"; -IOBUF PORT "spiflash4x_dq[3]" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_d_p" SITE "N1"; -IOBUF PORT "usb_d_p" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_d_n" SITE "M2"; -IOBUF PORT "usb_d_n" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_pullup" SITE "N2"; -IOBUF PORT "usb_pullup" IO_TYPE=LVCMOS33; diff --git a/verilog/alu/v3/tbalu.cpp b/verilog/alu/v3/tbalu.cpp deleted file mode 100644 index b3947f8..0000000 --- a/verilog/alu/v3/tbalu.cpp +++ /dev/null @@ -1,45 +0,0 @@ -#include <stdlib.h> -#include <iostream> -#include <verilated.h> -#include <verilated_vcd_c.h> -#include "Valu.h" -#include "aluOp.h" -#define OP SRA -#define OPSTR "SRA" -#define SIGN "SRA" -#define LOWER -10 -#define UPPER 0 - -vluint64_t sim_time = 0; - -int main(int argc, char** argv, char** env) { - Valu *dut = new Valu; - - Verilated::traceEverOn(true); - VerilatedVcdC *m_trace = new VerilatedVcdC; - dut->trace(m_trace, 5); - m_trace->open("waveform.vcd"); - - dut->op = OP; - for (dut->in1 = LOWER; (int) dut->in1 < UPPER; dut->in1++) { - for (dut->in2 = 0; (int) dut->in2 < 10; dut->in2++) { - dut->eval(); - std::cout << OPSTR << ": " << (int) dut->in1 << " " << SIGN << " " << (int) dut->in2 << " = " << (int) dut->out << "\n"; - sim_time++; - m_trace->dump(sim_time); - } - } - - for (dut->in1 = 1; (int) dut->in1 < 10; dut->in1++) { - for (dut->in2 = 0; (int) dut->in2 < 10; dut->in2++) { - dut->eval(); - std::cout << OPSTR << ": " << dut->in1 << " " << SIGN << " " << dut->in2 << " = " << dut->out << "\n"; - sim_time++; - m_trace->dump(sim_time); - } - } - - m_trace->close(); - delete dut; - exit(EXIT_SUCCESS); -} diff --git a/verilog/alu/v4/Makefile b/verilog/alu/v4/Makefile deleted file mode 100644 index e3d78e9..0000000 --- a/verilog/alu/v4/Makefile +++ /dev/null @@ -1,35 +0,0 @@ -PROJ=alu4 -VERION:=r0.2 -RM = rm -rf -COPY = cp -a -PATH_SEP = / - - -crab: ${PROJ}.dfu - -dfu: ${PROJ}.dfu - dfu-util -D $< - - -%.json: %.v - yosys -p "read_verilog $<; synth_ecp5 -top ${PROJ} -json $@" - -%_out.config: %.json - nextpnr-ecp5 --json $< --textcfg $@ --25k --package CSFBGA285 --lpf crab.pcf - -%.bit: %_out.config - ecppack --compress --freq 38.8 --input $< --bit $@ - -%.dfu : %.bit - $(COPY) $< $@ - dfu-suffix -v 1209 -p 5af0 -a $@ - -sim: - verilator -Wall --cc --exe --build tbalu.cpp alu.v --trace && ./obj_dir/Valu > out -simclean: - rm -rf obj_dir/* out - -clean: - $(RM) -f ${PROJ}.bit ${PROJ}_out.config ${PROJ}.json ${PROJ}.dfu - -.PHONY: prog clean diff --git a/verilog/alu/v4/alu4.v b/verilog/alu/v4/alu4.v deleted file mode 100644 index a7b9892..0000000 --- a/verilog/alu/v4/alu4.v +++ /dev/null @@ -1,30 +0,0 @@ -`default_nettype none -`timescale 1us/1ns - -`include "aluOp.vh" - -module alu4 -( -input wire [31:0] alu_in_1, -input wire[31:0] alu_in_2, -input wire[3:0] alu_op_i, -output wire[31:0] alu_output -); - - -wire [31:0] diff = alu_in_1 - alu_in_2; - -assign alu_output = - alu_op_i == `ADD ? alu_in_1 + alu_in_2 : - alu_op_i == `SUB ? diff : - alu_op_i == `XOR ? alu_in_1 ^ alu_in_2 : - alu_op_i == `OR ? alu_in_1 | alu_in_2 : - alu_op_i == `AND ? alu_in_1 & alu_in_2 : - alu_op_i == `SLL ? alu_in_1 << alu_in_2 : - alu_op_i == `SRL ? alu_in_1 >> alu_in_2 : - alu_op_i == `SLTU ? (alu_in_1 < alu_in_2 ? 32'b1 : 32'b0) : - alu_op_i == `NONE ? alu_in_1 : - alu_op_i == `SLT ? (alu_in_1[31] == alu_in_2[31] ? (diff[31] == 1'b0 ? 32'b0 : 32'b1) : (alu_in_1[31] == 1'b1 ? 32'b1 : 32'b0) ) : - alu_op_i == `SRA ? (alu_in_1 >> alu_in_2) | (alu_in_1[31] == 1'b0 ? 32'b0 : (32'hFFFFFFFF << {~alu_in_2[4], ~alu_in_2[3], ~alu_in_2[2], ~alu_in_2[1], ~alu_in_2[0]})) : - 32'b0; -endmodule diff --git a/verilog/alu/v4/aluOp.h b/verilog/alu/v4/aluOp.h deleted file mode 100644 index 999dac2..0000000 --- a/verilog/alu/v4/aluOp.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef ALU_OP -#define ALU_OP - -#define ADD 0 -#define SUB 8 -#define XOR 4 -#define OR 6 -#define AND 7 -#define SLL 1 -#define SRL 5 -#define SRA 13 -#define SLT 2 -#define SLTU 3 -#define NONE 15 - -#endif diff --git a/verilog/alu/v4/aluOp.vh b/verilog/alu/v4/aluOp.vh deleted file mode 100644 index b6e916f..0000000 --- a/verilog/alu/v4/aluOp.vh +++ /dev/null @@ -1,16 +0,0 @@ -`ifndef ALU_OP -`define ALU_OP - -`define ADD 4'b0000 -`define SUB 4'b1000 -`define XOR 4'b0100 -`define OR 4'b0110 -`define AND 4'b0111 -`define SLL 4'b0001 -`define SRL 4'b0101 -`define SRA 4'b1101 -`define SLT 4'b0010 -`define SLTU 4'b0011 -`define NONE 4'b1111 - -`endif diff --git a/verilog/alu/v4/crab.pcf b/verilog/alu/v4/crab.pcf deleted file mode 100644 index c0d91c5..0000000 --- a/verilog/alu/v4/crab.pcf +++ /dev/null @@ -1,254 +0,0 @@ -LOCATE COMP "clk48" SITE "A9"; -IOBUF PORT "clk48" IO_TYPE=LVCMOS33; -FREQUENCY PORT "clk48" 48.0 MHz; - -LOCATE COMP "ddram_a[0]" SITE "C4"; -IOBUF PORT "ddram_a[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[1]" SITE "D2"; -IOBUF PORT "ddram_a[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[2]" SITE "D3"; -IOBUF PORT "ddram_a[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[2]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[3]" SITE "A3"; -IOBUF PORT "ddram_a[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[3]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[4]" SITE "A4"; -IOBUF PORT "ddram_a[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[4]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[5]" SITE "D4"; -IOBUF PORT "ddram_a[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[5]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[6]" SITE "C3"; -IOBUF PORT "ddram_a[6]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[6]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[7]" SITE "B2"; -IOBUF PORT "ddram_a[7]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[7]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[8]" SITE "B1"; -IOBUF PORT "ddram_a[8]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[8]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[9]" SITE "D1"; -IOBUF PORT "ddram_a[9]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[9]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[10]" SITE "A7"; -IOBUF PORT "ddram_a[10]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[10]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[11]" SITE "C2"; -IOBUF PORT "ddram_a[11]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[11]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[12]" SITE "B6"; -IOBUF PORT "ddram_a[12]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[12]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[13]" SITE "C1"; -IOBUF PORT "ddram_a[13]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[13]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[14]" SITE "A2"; -IOBUF PORT "ddram_a[14]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[14]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[15]" SITE "C7"; -IOBUF PORT "ddram_a[15]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[15]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[0]" SITE "D6"; -IOBUF PORT "ddram_ba[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[1]" SITE "B7"; -IOBUF PORT "ddram_ba[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[2]" SITE "A6"; -IOBUF PORT "ddram_ba[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[2]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ras_n" SITE "C12"; -IOBUF PORT "ddram_ras_n" SLEWRATE=FAST; -IOBUF PORT "ddram_ras_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_cas_n" SITE "D13"; -IOBUF PORT "ddram_cas_n" SLEWRATE=FAST; -IOBUF PORT "ddram_cas_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_we_n" SITE "B12"; -IOBUF PORT "ddram_we_n" SLEWRATE=FAST; -IOBUF PORT "ddram_we_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_cs_n" SITE "A12"; -IOBUF PORT "ddram_cs_n" SLEWRATE=FAST; -IOBUF PORT "ddram_cs_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dm[0]" SITE "D16"; -IOBUF PORT "ddram_dm[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dm[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dm[1]" SITE "G16"; -IOBUF PORT "ddram_dm[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dm[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dq[0]" SITE "C17"; -IOBUF PORT "ddram_dq[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[0]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[0]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[1]" SITE "D15"; -IOBUF PORT "ddram_dq[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[1]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[1]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[2]" SITE "B17"; -IOBUF PORT "ddram_dq[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[2]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[2]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[3]" SITE "C16"; -IOBUF PORT "ddram_dq[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[3]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[3]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[4]" SITE "A15"; -IOBUF PORT "ddram_dq[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[4]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[4]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[5]" SITE "B13"; -IOBUF PORT "ddram_dq[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[5]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[5]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[6]" SITE "A17"; -IOBUF PORT "ddram_dq[6]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[6]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[6]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[7]" SITE "A13"; -IOBUF PORT "ddram_dq[7]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[7]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[7]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[8]" SITE "F17"; -IOBUF PORT "ddram_dq[8]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[8]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[8]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[9]" SITE "F16"; -IOBUF PORT "ddram_dq[9]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[9]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[9]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[10]" SITE "G15"; -IOBUF PORT "ddram_dq[10]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[10]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[10]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[11]" SITE "F15"; -IOBUF PORT "ddram_dq[11]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[11]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[11]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[12]" SITE "J16"; -IOBUF PORT "ddram_dq[12]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[12]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[12]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[13]" SITE "C18"; -IOBUF PORT "ddram_dq[13]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[13]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[13]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[14]" SITE "H16"; -IOBUF PORT "ddram_dq[14]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[14]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[14]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[15]" SITE "F18"; -IOBUF PORT "ddram_dq[15]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[15]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[15]" TERMINATION=OFF; -LOCATE COMP "ddram_dqs_p[0]" SITE "B15"; -IOBUF PORT "ddram_dqs_p[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dqs_p[0]" IO_TYPE=SSTL135D_I; -IOBUF PORT "ddram_dqs_p[0]" TERMINATION=OFF; -IOBUF PORT "ddram_dqs_p[0]" DIFFRESISTOR=100; -LOCATE COMP "ddram_dqs_p[1]" SITE "G18"; -IOBUF PORT "ddram_dqs_p[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dqs_p[1]" IO_TYPE=SSTL135D_I; -IOBUF PORT "ddram_dqs_p[1]" TERMINATION=OFF; -IOBUF PORT "ddram_dqs_p[1]" DIFFRESISTOR=100; -LOCATE COMP "ddram_clk_p" SITE "J18"; -IOBUF PORT "ddram_clk_p" SLEWRATE=FAST; -IOBUF PORT "ddram_clk_p" IO_TYPE=SSTL135D_I; -LOCATE COMP "ddram_cke" SITE "D18"; -IOBUF PORT "ddram_cke" SLEWRATE=FAST; -IOBUF PORT "ddram_cke" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_odt" SITE "C13"; -IOBUF PORT "ddram_odt" SLEWRATE=FAST; -IOBUF PORT "ddram_odt" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_reset_n" SITE "L18"; -IOBUF PORT "ddram_reset_n" SLEWRATE=FAST; -IOBUF PORT "ddram_reset_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_vccio[0]" SITE "K16"; -IOBUF PORT "ddram_vccio[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[0]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[1]" SITE "D17"; -IOBUF PORT "ddram_vccio[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[1]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[2]" SITE "K15"; -IOBUF PORT "ddram_vccio[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[2]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[3]" SITE "K17"; -IOBUF PORT "ddram_vccio[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[3]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[4]" SITE "B18"; -IOBUF PORT "ddram_vccio[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[4]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[5]" SITE "C6"; -IOBUF PORT "ddram_vccio[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[5]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_gnd[0]" SITE "L15"; -IOBUF PORT "ddram_gnd[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_gnd[0]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_gnd[1]" SITE "L16"; -IOBUF PORT "ddram_gnd[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_gnd[1]" IO_TYPE=SSTL135_II; -LOCATE COMP "rgb_led0_r" SITE "K4"; -IOBUF PORT "rgb_led0_r" IO_TYPE=LVCMOS33; -LOCATE COMP "rgb_led0_g" SITE "M3"; -IOBUF PORT "rgb_led0_g" IO_TYPE=LVCMOS33; -LOCATE COMP "rgb_led0_b" SITE "J3"; -IOBUF PORT "rgb_led0_b" IO_TYPE=LVCMOS33; -LOCATE COMP "gpio_0" SITE "N17"; -IOBUF PORT "gpio_0" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_0" PULLMODE=DOWN; -LOCATE COMP "gpio_1" SITE "M18"; -IOBUF PORT "gpio_1" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_1" PULLMODE=DOWN; -LOCATE COMP "gpio_5" SITE "B10"; -IOBUF PORT "gpio_5" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_5" PULLMODE=DOWN; -LOCATE COMP "gpio_6" SITE "B9"; -IOBUF PORT "gpio_6" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_6" PULLMODE=DOWN; -LOCATE COMP "gpio_9" SITE "C8"; -IOBUF PORT "gpio_9" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_9" PULLMODE=DOWN; -LOCATE COMP "gpio_10" SITE "B8"; -IOBUF PORT "gpio_10" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_10" PULLMODE=DOWN; -LOCATE COMP "gpio_11" SITE "A8"; -IOBUF PORT "gpio_11" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_11" PULLMODE=DOWN; -LOCATE COMP "gpio_12" SITE "H2"; -IOBUF PORT "gpio_12" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_12" PULLMODE=DOWN; -LOCATE COMP "gpio_13" SITE "J2"; -IOBUF PORT "gpio_13" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_13" PULLMODE=DOWN; -LOCATE COMP "gpio_a0" SITE "L4"; -IOBUF PORT "gpio_a0" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a0" PULLMODE=DOWN; -LOCATE COMP "gpio_a1" SITE "N3"; -IOBUF PORT "gpio_a1" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a1" PULLMODE=DOWN; -LOCATE COMP "gpio_a2" SITE "N4"; -IOBUF PORT "gpio_a2" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a2" PULLMODE=DOWN; -LOCATE COMP "gpio_a3" SITE "H4"; -IOBUF PORT "gpio_a3" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a3" PULLMODE=DOWN; -LOCATE COMP "usr_btn" SITE "J17"; -IOBUF PORT "usr_btn" IO_TYPE=SSTL135_I; -LOCATE COMP "rst_n" SITE "V17"; -IOBUF PORT "rst_n" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_cs_n" SITE "U17"; -IOBUF PORT "spiflash4x_cs_n" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[0]" SITE "U18"; -IOBUF PORT "spiflash4x_dq[0]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[1]" SITE "T18"; -IOBUF PORT "spiflash4x_dq[1]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[2]" SITE "R18"; -IOBUF PORT "spiflash4x_dq[2]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[3]" SITE "N18"; -IOBUF PORT "spiflash4x_dq[3]" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_d_p" SITE "N1"; -IOBUF PORT "usb_d_p" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_d_n" SITE "M2"; -IOBUF PORT "usb_d_n" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_pullup" SITE "N2"; -IOBUF PORT "usb_pullup" IO_TYPE=LVCMOS33; diff --git a/verilog/alu/v4/tbalu.cpp b/verilog/alu/v4/tbalu.cpp deleted file mode 100644 index b3947f8..0000000 --- a/verilog/alu/v4/tbalu.cpp +++ /dev/null @@ -1,45 +0,0 @@ -#include <stdlib.h> -#include <iostream> -#include <verilated.h> -#include <verilated_vcd_c.h> -#include "Valu.h" -#include "aluOp.h" -#define OP SRA -#define OPSTR "SRA" -#define SIGN "SRA" -#define LOWER -10 -#define UPPER 0 - -vluint64_t sim_time = 0; - -int main(int argc, char** argv, char** env) { - Valu *dut = new Valu; - - Verilated::traceEverOn(true); - VerilatedVcdC *m_trace = new VerilatedVcdC; - dut->trace(m_trace, 5); - m_trace->open("waveform.vcd"); - - dut->op = OP; - for (dut->in1 = LOWER; (int) dut->in1 < UPPER; dut->in1++) { - for (dut->in2 = 0; (int) dut->in2 < 10; dut->in2++) { - dut->eval(); - std::cout << OPSTR << ": " << (int) dut->in1 << " " << SIGN << " " << (int) dut->in2 << " = " << (int) dut->out << "\n"; - sim_time++; - m_trace->dump(sim_time); - } - } - - for (dut->in1 = 1; (int) dut->in1 < 10; dut->in1++) { - for (dut->in2 = 0; (int) dut->in2 < 10; dut->in2++) { - dut->eval(); - std::cout << OPSTR << ": " << dut->in1 << " " << SIGN << " " << dut->in2 << " = " << dut->out << "\n"; - sim_time++; - m_trace->dump(sim_time); - } - } - - m_trace->close(); - delete dut; - exit(EXIT_SUCCESS); -} diff --git a/verilog/alu/v5/Makefile b/verilog/alu/v5/Makefile deleted file mode 100644 index bb659a4..0000000 --- a/verilog/alu/v5/Makefile +++ /dev/null @@ -1,35 +0,0 @@ -PROJ=alu5 -VERION:=r0.2 -RM = rm -rf -COPY = cp -a -PATH_SEP = / - - -crab: ${PROJ}.dfu - -dfu: ${PROJ}.dfu - dfu-util -D $< - - -%.json: %.v - yosys -p "read_verilog $<; synth_ecp5 -top ${PROJ} -json $@" - -%_out.config: %.json - nextpnr-ecp5 --json $< --textcfg $@ --25k --package CSFBGA285 --lpf crab.pcf - -%.bit: %_out.config - ecppack --compress --freq 38.8 --input $< --bit $@ - -%.dfu : %.bit - $(COPY) $< $@ - dfu-suffix -v 1209 -p 5af0 -a $@ - -sim: - verilator -Wall --cc --exe --build tbalu.cpp alu.v --trace && ./obj_dir/Valu > out -simclean: - rm -rf obj_dir/* out - -clean: - $(RM) -f ${PROJ}.bit ${PROJ}_out.config ${PROJ}.json ${PROJ}.dfu - -.PHONY: prog clean diff --git a/verilog/alu/v5/alu5.v b/verilog/alu/v5/alu5.v deleted file mode 100644 index 4670c19..0000000 --- a/verilog/alu/v5/alu5.v +++ /dev/null @@ -1,30 +0,0 @@ -`default_nettype none -`timescale 1us/1ns - -`include "aluOp.vh" - -module alu5 -( -input wire [31:0] alu_in_1, -input wire[31:0] alu_in_2, -input wire[3:0] alu_op_i, -output wire[31:0] alu_output -); - - -wire [31:0] diff = alu_in_1 - alu_in_2; - -assign alu_output = - alu_op_i == `NONE ? alu_in_1 : - alu_op_i == `ADD ? alu_in_1 + alu_in_2 : - alu_op_i == `SUB ? diff : - alu_op_i == `XOR ? alu_in_1 ^ alu_in_2 : - alu_op_i == `OR ? alu_in_1 | alu_in_2 : - alu_op_i == `AND ? alu_in_1 & alu_in_2 : - alu_op_i == `SLTU ? (alu_in_1 < alu_in_2 ? 32'b1 : 32'b0) : - alu_op_i == `SLT ? (alu_in_1[31] == alu_in_2[31] ? {31'b0, diff[31]} : {31'b0, alu_in_1[31]}) : - alu_op_i == `SLL ? alu_in_1 << alu_in_2 : - alu_op_i == `SRL ? alu_in_1 >> alu_in_2 : - alu_op_i == `SRA ? (alu_in_1 >> alu_in_2) | (alu_in_1[31] == 1'b0 ? 32'b0 : (32'hFFFFFFFF << {~alu_in_2[4], ~alu_in_2[3], ~alu_in_2[2], ~alu_in_2[1], ~alu_in_2[0]})) : - 32'b0; -endmodule diff --git a/verilog/alu/v5/aluOp.h b/verilog/alu/v5/aluOp.h deleted file mode 100644 index 999dac2..0000000 --- a/verilog/alu/v5/aluOp.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef ALU_OP -#define ALU_OP - -#define ADD 0 -#define SUB 8 -#define XOR 4 -#define OR 6 -#define AND 7 -#define SLL 1 -#define SRL 5 -#define SRA 13 -#define SLT 2 -#define SLTU 3 -#define NONE 15 - -#endif diff --git a/verilog/alu/v5/aluOp.vh b/verilog/alu/v5/aluOp.vh deleted file mode 100644 index b6e916f..0000000 --- a/verilog/alu/v5/aluOp.vh +++ /dev/null @@ -1,16 +0,0 @@ -`ifndef ALU_OP -`define ALU_OP - -`define ADD 4'b0000 -`define SUB 4'b1000 -`define XOR 4'b0100 -`define OR 4'b0110 -`define AND 4'b0111 -`define SLL 4'b0001 -`define SRL 4'b0101 -`define SRA 4'b1101 -`define SLT 4'b0010 -`define SLTU 4'b0011 -`define NONE 4'b1111 - -`endif diff --git a/verilog/alu/v5/crab.pcf b/verilog/alu/v5/crab.pcf deleted file mode 100644 index c0d91c5..0000000 --- a/verilog/alu/v5/crab.pcf +++ /dev/null @@ -1,254 +0,0 @@ -LOCATE COMP "clk48" SITE "A9"; -IOBUF PORT "clk48" IO_TYPE=LVCMOS33; -FREQUENCY PORT "clk48" 48.0 MHz; - -LOCATE COMP "ddram_a[0]" SITE "C4"; -IOBUF PORT "ddram_a[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[1]" SITE "D2"; -IOBUF PORT "ddram_a[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[2]" SITE "D3"; -IOBUF PORT "ddram_a[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[2]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[3]" SITE "A3"; -IOBUF PORT "ddram_a[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[3]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[4]" SITE "A4"; -IOBUF PORT "ddram_a[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[4]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[5]" SITE "D4"; -IOBUF PORT "ddram_a[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[5]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[6]" SITE "C3"; -IOBUF PORT "ddram_a[6]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[6]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[7]" SITE "B2"; -IOBUF PORT "ddram_a[7]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[7]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[8]" SITE "B1"; -IOBUF PORT "ddram_a[8]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[8]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[9]" SITE "D1"; -IOBUF PORT "ddram_a[9]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[9]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[10]" SITE "A7"; -IOBUF PORT "ddram_a[10]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[10]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[11]" SITE "C2"; -IOBUF PORT "ddram_a[11]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[11]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[12]" SITE "B6"; -IOBUF PORT "ddram_a[12]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[12]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[13]" SITE "C1"; -IOBUF PORT "ddram_a[13]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[13]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[14]" SITE "A2"; -IOBUF PORT "ddram_a[14]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[14]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[15]" SITE "C7"; -IOBUF PORT "ddram_a[15]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[15]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[0]" SITE "D6"; -IOBUF PORT "ddram_ba[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[1]" SITE "B7"; -IOBUF PORT "ddram_ba[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[2]" SITE "A6"; -IOBUF PORT "ddram_ba[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[2]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ras_n" SITE "C12"; -IOBUF PORT "ddram_ras_n" SLEWRATE=FAST; -IOBUF PORT "ddram_ras_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_cas_n" SITE "D13"; -IOBUF PORT "ddram_cas_n" SLEWRATE=FAST; -IOBUF PORT "ddram_cas_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_we_n" SITE "B12"; -IOBUF PORT "ddram_we_n" SLEWRATE=FAST; -IOBUF PORT "ddram_we_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_cs_n" SITE "A12"; -IOBUF PORT "ddram_cs_n" SLEWRATE=FAST; -IOBUF PORT "ddram_cs_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dm[0]" SITE "D16"; -IOBUF PORT "ddram_dm[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dm[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dm[1]" SITE "G16"; -IOBUF PORT "ddram_dm[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dm[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dq[0]" SITE "C17"; -IOBUF PORT "ddram_dq[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[0]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[0]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[1]" SITE "D15"; -IOBUF PORT "ddram_dq[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[1]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[1]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[2]" SITE "B17"; -IOBUF PORT "ddram_dq[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[2]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[2]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[3]" SITE "C16"; -IOBUF PORT "ddram_dq[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[3]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[3]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[4]" SITE "A15"; -IOBUF PORT "ddram_dq[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[4]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[4]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[5]" SITE "B13"; -IOBUF PORT "ddram_dq[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[5]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[5]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[6]" SITE "A17"; -IOBUF PORT "ddram_dq[6]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[6]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[6]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[7]" SITE "A13"; -IOBUF PORT "ddram_dq[7]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[7]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[7]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[8]" SITE "F17"; -IOBUF PORT "ddram_dq[8]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[8]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[8]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[9]" SITE "F16"; -IOBUF PORT "ddram_dq[9]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[9]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[9]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[10]" SITE "G15"; -IOBUF PORT "ddram_dq[10]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[10]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[10]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[11]" SITE "F15"; -IOBUF PORT "ddram_dq[11]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[11]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[11]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[12]" SITE "J16"; -IOBUF PORT "ddram_dq[12]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[12]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[12]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[13]" SITE "C18"; -IOBUF PORT "ddram_dq[13]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[13]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[13]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[14]" SITE "H16"; -IOBUF PORT "ddram_dq[14]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[14]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[14]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[15]" SITE "F18"; -IOBUF PORT "ddram_dq[15]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[15]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[15]" TERMINATION=OFF; -LOCATE COMP "ddram_dqs_p[0]" SITE "B15"; -IOBUF PORT "ddram_dqs_p[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dqs_p[0]" IO_TYPE=SSTL135D_I; -IOBUF PORT "ddram_dqs_p[0]" TERMINATION=OFF; -IOBUF PORT "ddram_dqs_p[0]" DIFFRESISTOR=100; -LOCATE COMP "ddram_dqs_p[1]" SITE "G18"; -IOBUF PORT "ddram_dqs_p[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dqs_p[1]" IO_TYPE=SSTL135D_I; -IOBUF PORT "ddram_dqs_p[1]" TERMINATION=OFF; -IOBUF PORT "ddram_dqs_p[1]" DIFFRESISTOR=100; -LOCATE COMP "ddram_clk_p" SITE "J18"; -IOBUF PORT "ddram_clk_p" SLEWRATE=FAST; -IOBUF PORT "ddram_clk_p" IO_TYPE=SSTL135D_I; -LOCATE COMP "ddram_cke" SITE "D18"; -IOBUF PORT "ddram_cke" SLEWRATE=FAST; -IOBUF PORT "ddram_cke" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_odt" SITE "C13"; -IOBUF PORT "ddram_odt" SLEWRATE=FAST; -IOBUF PORT "ddram_odt" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_reset_n" SITE "L18"; -IOBUF PORT "ddram_reset_n" SLEWRATE=FAST; -IOBUF PORT "ddram_reset_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_vccio[0]" SITE "K16"; -IOBUF PORT "ddram_vccio[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[0]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[1]" SITE "D17"; -IOBUF PORT "ddram_vccio[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[1]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[2]" SITE "K15"; -IOBUF PORT "ddram_vccio[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[2]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[3]" SITE "K17"; -IOBUF PORT "ddram_vccio[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[3]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[4]" SITE "B18"; -IOBUF PORT "ddram_vccio[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[4]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[5]" SITE "C6"; -IOBUF PORT "ddram_vccio[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[5]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_gnd[0]" SITE "L15"; -IOBUF PORT "ddram_gnd[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_gnd[0]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_gnd[1]" SITE "L16"; -IOBUF PORT "ddram_gnd[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_gnd[1]" IO_TYPE=SSTL135_II; -LOCATE COMP "rgb_led0_r" SITE "K4"; -IOBUF PORT "rgb_led0_r" IO_TYPE=LVCMOS33; -LOCATE COMP "rgb_led0_g" SITE "M3"; -IOBUF PORT "rgb_led0_g" IO_TYPE=LVCMOS33; -LOCATE COMP "rgb_led0_b" SITE "J3"; -IOBUF PORT "rgb_led0_b" IO_TYPE=LVCMOS33; -LOCATE COMP "gpio_0" SITE "N17"; -IOBUF PORT "gpio_0" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_0" PULLMODE=DOWN; -LOCATE COMP "gpio_1" SITE "M18"; -IOBUF PORT "gpio_1" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_1" PULLMODE=DOWN; -LOCATE COMP "gpio_5" SITE "B10"; -IOBUF PORT "gpio_5" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_5" PULLMODE=DOWN; -LOCATE COMP "gpio_6" SITE "B9"; -IOBUF PORT "gpio_6" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_6" PULLMODE=DOWN; -LOCATE COMP "gpio_9" SITE "C8"; -IOBUF PORT "gpio_9" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_9" PULLMODE=DOWN; -LOCATE COMP "gpio_10" SITE "B8"; -IOBUF PORT "gpio_10" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_10" PULLMODE=DOWN; -LOCATE COMP "gpio_11" SITE "A8"; -IOBUF PORT "gpio_11" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_11" PULLMODE=DOWN; -LOCATE COMP "gpio_12" SITE "H2"; -IOBUF PORT "gpio_12" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_12" PULLMODE=DOWN; -LOCATE COMP "gpio_13" SITE "J2"; -IOBUF PORT "gpio_13" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_13" PULLMODE=DOWN; -LOCATE COMP "gpio_a0" SITE "L4"; -IOBUF PORT "gpio_a0" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a0" PULLMODE=DOWN; -LOCATE COMP "gpio_a1" SITE "N3"; -IOBUF PORT "gpio_a1" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a1" PULLMODE=DOWN; -LOCATE COMP "gpio_a2" SITE "N4"; -IOBUF PORT "gpio_a2" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a2" PULLMODE=DOWN; -LOCATE COMP "gpio_a3" SITE "H4"; -IOBUF PORT "gpio_a3" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a3" PULLMODE=DOWN; -LOCATE COMP "usr_btn" SITE "J17"; -IOBUF PORT "usr_btn" IO_TYPE=SSTL135_I; -LOCATE COMP "rst_n" SITE "V17"; -IOBUF PORT "rst_n" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_cs_n" SITE "U17"; -IOBUF PORT "spiflash4x_cs_n" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[0]" SITE "U18"; -IOBUF PORT "spiflash4x_dq[0]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[1]" SITE "T18"; -IOBUF PORT "spiflash4x_dq[1]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[2]" SITE "R18"; -IOBUF PORT "spiflash4x_dq[2]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[3]" SITE "N18"; -IOBUF PORT "spiflash4x_dq[3]" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_d_p" SITE "N1"; -IOBUF PORT "usb_d_p" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_d_n" SITE "M2"; -IOBUF PORT "usb_d_n" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_pullup" SITE "N2"; -IOBUF PORT "usb_pullup" IO_TYPE=LVCMOS33; diff --git a/verilog/alu/v5/tbalu.cpp b/verilog/alu/v5/tbalu.cpp deleted file mode 100644 index b3947f8..0000000 --- a/verilog/alu/v5/tbalu.cpp +++ /dev/null @@ -1,45 +0,0 @@ -#include <stdlib.h> -#include <iostream> -#include <verilated.h> -#include <verilated_vcd_c.h> -#include "Valu.h" -#include "aluOp.h" -#define OP SRA -#define OPSTR "SRA" -#define SIGN "SRA" -#define LOWER -10 -#define UPPER 0 - -vluint64_t sim_time = 0; - -int main(int argc, char** argv, char** env) { - Valu *dut = new Valu; - - Verilated::traceEverOn(true); - VerilatedVcdC *m_trace = new VerilatedVcdC; - dut->trace(m_trace, 5); - m_trace->open("waveform.vcd"); - - dut->op = OP; - for (dut->in1 = LOWER; (int) dut->in1 < UPPER; dut->in1++) { - for (dut->in2 = 0; (int) dut->in2 < 10; dut->in2++) { - dut->eval(); - std::cout << OPSTR << ": " << (int) dut->in1 << " " << SIGN << " " << (int) dut->in2 << " = " << (int) dut->out << "\n"; - sim_time++; - m_trace->dump(sim_time); - } - } - - for (dut->in1 = 1; (int) dut->in1 < 10; dut->in1++) { - for (dut->in2 = 0; (int) dut->in2 < 10; dut->in2++) { - dut->eval(); - std::cout << OPSTR << ": " << dut->in1 << " " << SIGN << " " << dut->in2 << " = " << dut->out << "\n"; - sim_time++; - m_trace->dump(sim_time); - } - } - - m_trace->close(); - delete dut; - exit(EXIT_SUCCESS); -} diff --git a/verilog/alu/v6/LUTS b/verilog/alu/v6/LUTS deleted file mode 100644 index ec716bd..0000000 --- a/verilog/alu/v6/LUTS +++ /dev/null @@ -1,172 +0,0 @@ - -ADD SUB no share - - Number of wires: 233 - Number of wire bits: 644 - Number of public wires: 233 - Number of public wire bits: 644 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 256 - CCU2C 32 - L6MUX21 32 - LUT4 128 - PFUMX 64 - - - -ADD SUB Sharing - - Number of wires: 12 - Number of wire bits: 356 - Number of public wires: 12 - Number of public wire bits: 356 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 128 - CCU2C 32 - LUT4 96 - -XOR - - Number of wires: 204 - Number of wire bits: 548 - Number of public wires: 204 - Number of public wire bits: 548 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 320 - CCU2C 32 - L6MUX21 32 - LUT4 192 - PFUMX 64 - - -AND + OR - - Number of wires: 204 - Number of wire bits: 548 - Number of public wires: 204 - Number of public wire bits: 548 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 320 - CCU2C 32 - L6MUX21 32 - LUT4 192 - PFUMX 64 - - - Number of wires: 212 - Number of wire bits: 556 - Number of public wires: 212 - Number of public wire bits: 556 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 328 - CCU2C 32 - L6MUX21 34 - LUT4 196 - PFUMX 66 - - -=== alu6 === - - Number of wires: 529 - Number of wire bits: 1122 - Number of public wires: 529 - Number of public wire bits: 1122 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 731 - CCU2C 32 - L6MUX21 66 - LUT4 475 - PFUMX 158 - -=== alu6 === Shift left - - Number of wires: 526 - Number of wire bits: 1100 - Number of public wires: 526 - Number of public wire bits: 1100 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 730 - CCU2C 32 - L6MUX21 67 - LUT4 473 - PFUMX 158 - -Shift right - - Number of wires: 1161 - Number of wire bits: 2070 - Number of public wires: 1161 - Number of public wire bits: 2070 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 1456 - CCU2C 32 - L6MUX21 174 - LUT4 923 - PFUMX 327 - -Shift right muxed - -=== alu6 === - - Number of wires: 843 - Number of wire bits: 1731 - Number of public wires: 843 - Number of public wire bits: 1731 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 1134 - CCU2C 32 - L6MUX21 103 - LUT4 756 - PFUMX 243 - -Set less than signed - -=== alu6 === - - Number of wires: 843 - Number of wire bits: 1731 - Number of public wires: 843 - Number of public wire bits: 1731 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 1134 - CCU2C 32 - L6MUX21 103 - LUT4 756 - PFUMX 243 - -Set less than unsigned - -=== alu6 === - - Number of wires: 871 - Number of wire bits: 1857 - Number of public wires: 871 - Number of public wire bits: 1857 - Number of memories: 0 - Number of memory bits: 0 - Number of processes: 0 - Number of cells: 1183 - CCU2C 48 - L6MUX21 109 - LUT4 778 - PFUMX 248 diff --git a/verilog/alu/v6/Makefile b/verilog/alu/v6/Makefile deleted file mode 100644 index 02598ac..0000000 --- a/verilog/alu/v6/Makefile +++ /dev/null @@ -1,40 +0,0 @@ -PROJ=alu6 -VERION:=r0.2 -RM = rm -rf -COPY = cp -a -PATH_SEP = / - - -crab: ${PROJ}.dfu - -dfu: ${PROJ}.dfu - dfu-util -D $< - - -%.json: %.v - yosys -p "read_verilog $<; synth_ecp5 -top ${PROJ} -json $@" - -%_out.config: %.json - nextpnr-ecp5 --json $< --textcfg $@ --25k --package CSFBGA285 --lpf crab.pcf - -%.bit: %_out.config - ecppack --compress --freq 38.8 --input $< --bit $@ - -%.dfu : %.bit - $(COPY) $< $@ - dfu-suffix -v 1209 -p 5af0 -a $@ - -sim: - verilator -Wall --cc --exe --build tbalu.cpp alu6.v --trace && ./obj_dir/Valu6 > out -simgate: - yosys -p "read_verilog ${PROJ}.v; synth_ecp5 -top ${PROJ} -blif ${PROJ}.blif" - yosys -o synth_${PROJ}.v ${PROJ}.blif - verilator -Wall --cc --exe --build tbalu.cpp synth_alu6.v --trace && ./obj_dir/Valu6 > out - -simclean: - rm -rf obj_dir/* out waveform.vcd - -clean: - $(RM) -f ${PROJ}.bit ${PROJ}_out.config ${PROJ}.json ${PROJ}.dfu - -.PHONY: prog clean diff --git a/verilog/alu/v6/alu6.blif b/verilog/alu/v6/alu6.blif deleted file mode 100644 index 33840f9..0000000 --- a/verilog/alu/v6/alu6.blif +++ /dev/null @@ -1,6128 +0,0 @@ -# Generated by Yosys 0.15+70 (git sha1 48d7a6c47, gcc 11.2.0 -march=x86-64 -mtune=generic -O2 -fno-plt -fexceptions -fstack-clash-protection -fcf-protection -fPIC -Os) - -.model alu6 -.inputs alu_in_1[0] alu_in_1[1] alu_in_1[2] alu_in_1[3] alu_in_1[4] alu_in_1[5] alu_in_1[6] alu_in_1[7] alu_in_1[8] alu_in_1[9] alu_in_1[10] alu_in_1[11] alu_in_1[12] alu_in_1[13] alu_in_1[14] alu_in_1[15] alu_in_1[16] alu_in_1[17] alu_in_1[18] alu_in_1[19] alu_in_1[20] alu_in_1[21] alu_in_1[22] alu_in_1[23] alu_in_1[24] alu_in_1[25] alu_in_1[26] alu_in_1[27] alu_in_1[28] alu_in_1[29] alu_in_1[30] alu_in_1[31] alu_in_2[0] alu_in_2[1] alu_in_2[2] alu_in_2[3] alu_in_2[4] alu_in_2[5] alu_in_2[6] alu_in_2[7] alu_in_2[8] alu_in_2[9] alu_in_2[10] alu_in_2[11] alu_in_2[12] alu_in_2[13] alu_in_2[14] alu_in_2[15] alu_in_2[16] alu_in_2[17] alu_in_2[18] alu_in_2[19] alu_in_2[20] alu_in_2[21] alu_in_2[22] alu_in_2[23] alu_in_2[24] alu_in_2[25] alu_in_2[26] alu_in_2[27] alu_in_2[28] alu_in_2[29] alu_in_2[30] alu_in_2[31] alu_op_i[0] alu_op_i[1] alu_op_i[2] alu_op_i[3] -.outputs alu_output[0] alu_output[1] alu_output[2] alu_output[3] alu_output[4] alu_output[5] alu_output[6] alu_output[7] alu_output[8] alu_output[9] alu_output[10] alu_output[11] alu_output[12] alu_output[13] alu_output[14] alu_output[15] alu_output[16] alu_output[17] alu_output[18] alu_output[19] alu_output[20] alu_output[21] alu_output[22] alu_output[23] alu_output[24] alu_output[25] alu_output[26] alu_output[27] alu_output[28] alu_output[29] alu_output[30] alu_output[31] -.names $false -.names $true -1 -.names $undef -.gate L6MUX21 D0=alu_output_L6MUX21_Z_D0 D1=alu_output_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[5] Z=alu_output[24] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate L6MUX21 D0=alu_output_L6MUX21_Z_1_D0 D1=alu_output_L6MUX21_Z_1_D1 SD=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[5] Z=alu_output[7] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_L6MUX21_Z_1_D0_PFUMX_Z_ALUT BLUT=alu_output_L6MUX21_Z_1_D0_PFUMX_Z_BLUT C0=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[4] Z=alu_output_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_1_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111111111111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_1_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111111111111 -.gate PFUMX ALUT=alu_output_L6MUX21_Z_1_D1_PFUMX_Z_ALUT BLUT=alu_output_L6MUX21_Z_1_D1_PFUMX_Z_BLUT C0=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[4] Z=alu_output_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_1_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111111111111 -.gate LUT4 A=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[0] B=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[1] C=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] D=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[3] Z=alu_output_L6MUX21_Z_1_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111000001000000 -.gate L6MUX21 D0=alu_output_L6MUX21_Z_2_D0 D1=alu_output_L6MUX21_Z_2_D1 SD=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] Z=alu_output[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D0 D1=alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[5] Z=alu_output_L6MUX21_Z_2_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[4] Z=alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 1111111111111111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 1111111111111111 -.gate PFUMX ALUT=alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[4] Z=alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 1111111111111111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D0 D1=alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[5] Z=alu_output_L6MUX21_Z_2_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[4] Z=alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 1111111111111111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 1111111111111111 -.gate PFUMX ALUT=alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[4] Z=alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 1111111111111111 -.gate LUT4 A=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[0] B=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] C=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[2] D=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[3] Z=alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0100111101000100 -.gate L6MUX21 D0=alu_output_L6MUX21_Z_3_D0 D1=alu_output_L6MUX21_Z_3_D1 SD=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[5] Z=alu_output[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_L6MUX21_Z_3_D0_PFUMX_Z_ALUT BLUT=alu_output_L6MUX21_Z_3_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[4] Z=alu_output_L6MUX21_Z_3_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_3_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111111111111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_3_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111111111111 -.gate PFUMX ALUT=alu_output_L6MUX21_Z_3_D1_PFUMX_Z_ALUT BLUT=alu_output_L6MUX21_Z_3_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[4] Z=alu_output_L6MUX21_Z_3_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_3_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111111111111 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[0] B=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] C=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] D=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[3] Z=alu_output_L6MUX21_Z_3_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111000001000000 -.gate PFUMX ALUT=alu_output_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[4] Z=alu_output_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111111111111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111111111111 -.gate PFUMX ALUT=alu_output_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[4] Z=alu_output_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111111111111 -.gate LUT4 A=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[0] B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[1] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[2] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] Z=alu_output_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111110 -.gate LUT4 A=alu_output_LUT4_Z_A[0] B=alu_output_LUT4_Z_A[1] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] D=alu_output_LUT4_Z_A[3] Z=alu_output[29] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000101111111111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_1_B[0] C=alu_output_LUT4_Z_1_B[1] D=alu_output_LUT4_Z_1_B[2] Z=alu_output[28] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111110011111111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_10_B[0] C=alu_output_LUT4_Z_10_B[1] D=alu_output_LUT4_Z_10_B[2] Z=alu_output[8] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111110011111111 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[8] C=alu_output_LUT4_Z_10_B_LUT4_Z_C[2] D=alu_output_LUT4_Z_10_B_LUT4_Z_C[3] Z=alu_output_LUT4_Z_10_B[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000000111 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B[1] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B[2] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] Z=alu_output_LUT4_Z_10_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111000100000000 -.gate LUT4 A=alu_output_LUT4_Z_10_B_LUT4_Z_1_B[1] B=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_B_Z[0] C=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] D=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111010111110011 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] D=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 1111000000000000 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[16] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[2] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[3] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000000111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[16] D=alu_in_2[16] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[16] D=alu_in_2[16] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] B=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[1] C=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[2] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000010111111 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B[1] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B[2] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111000100000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] C=alu_op_i[3] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0000000000111111 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[24] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[2] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[3] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[5] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000000111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[24] D=alu_in_2[24] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[24] D=alu_in_2[24] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_B_Z[0] D=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 0000111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_1_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_1_BLUT C0=alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_A_L6MUX21_Z_SD[0] B=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] C=alu_output_LUT4_Z_A_L6MUX21_Z_SD[2] D=alu_in_2[2] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_1_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111001110101010 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_1_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[2] B=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[3] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000001100000101 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] D=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0100000000000000 -.gate LUT4 A=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[3] B=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[0] C=alu_in_2[2] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0101001100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1 SD=alu_in_2[1] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[3] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[4] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[1] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[2] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[3] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100001111 -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111000000000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0 D1=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z SD=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0 D1=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1 SD=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[5] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT C0=alu_in_2[2] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT C0=alu_in_2[2] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[0] C=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] D=alu_in_2[5] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000111111001111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_L6MUX21_Z_SD[2] C=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] D=alu_in_2[5] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000111111001111 -.gate L6MUX21 D0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 1111111111111111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 1111111111111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 1111111111111111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 1111111111111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[2] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[3] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[1] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] C=alu_in_2[5] D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0011111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[0] B=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[1] C=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] D=alu_in_2[2] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1010111111001111 -.gate L6MUX21 D0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D1 SD=alu_in_2[1] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate L6MUX21 D0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0 D1=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D1 SD=alu_in_2[31] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=alu_in_1[0] B=alu_op_i[1] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000010 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=alu_in_1[0] B=alu_op_i[1] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 1111111111111110 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 1111111111111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D1 SD=alu_in_2[31] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=alu_op_i[1] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 1111111111111100 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 1111111111111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=alu_op_i[1] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 1111111111111100 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 1111111111111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111111111111 -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111011111111 -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111011111111 -.gate LUT4 A=$false B=alu_in_1[1] C=alu_in_1[2] D=alu_in_2[0] Z=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=alu_output_LUT4_Z_10_B_LUT4_Z_2_A[0] B=alu_output_LUT4_Z_10_B_LUT4_Z_2_A[1] C=alu_output_LUT4_Z_10_B_LUT4_Z_2_A[2] D=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] Z=alu_output_LUT4_Z_10_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111010000000000 -.gate LUT4 A=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[0] B=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[1] C=alu_in_2[2] D=alu_in_2[3] Z=alu_output_LUT4_Z_10_B_LUT4_Z_2_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100101000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_10_B_LUT4_Z_2_A[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate PFUMX ALUT=alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_1_ALUT BLUT=alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_1_BLUT C0=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] Z=alu_output_LUT4_Z_10_B_LUT4_Z_2_A[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[2] B=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[3] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_1_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000001100000101 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_1_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[0] B=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[1] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111001111110101 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[8] D=alu_in_2[8] Z=alu_output_LUT4_Z_10_B_LUT4_Z_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[8] D=alu_in_2[8] Z=alu_output_LUT4_Z_10_B_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] B=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[0] C=alu_output_LUT4_Z_11_C[2] D=alu_output_LUT4_Z_11_C[3] Z=alu_output[5] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111001011111111 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[5] C=alu_output_LUT4_Z_11_C_LUT4_Z_C[2] D=alu_output_LUT4_Z_11_C_LUT4_Z_C[3] Z=alu_output_LUT4_Z_11_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000000111 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[5] D=alu_in_2[5] Z=alu_output_LUT4_Z_11_C_LUT4_Z_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[5] D=alu_in_2[5] Z=alu_output_LUT4_Z_11_C_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] Z=alu_output_LUT4_Z_11_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[0] B=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] C=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[2] D=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[3] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0100111101000100 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[1] B=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B[0] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000110000001010 -.gate L6MUX21 D0=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[11] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[9] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[12] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[10] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B[0] C=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[1] D=alu_in_2[2] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111000011001100 -.gate L6MUX21 D0=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[7] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[5] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[8] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[6] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[0] B=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[2] C=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[2] D=alu_in_2[3] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111010111110011 -.gate LUT4 A=$false B=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[0] C=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[1] D=alu_in_2[2] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_1_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111000011001100 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[0] C=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[1] D=alu_in_2[2] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111000011001100 -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[2] B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[3] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000001100000101 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_BLUT C0=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[2] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_D0 D1=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z SD=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[9] D=alu_in_2[9] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[3] B=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[2] C=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] D=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_Z_1_D[3] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000011111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[9] D=alu_in_2[9] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_Z_1_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate LUT4 A=$false B=alu_op_i[0] C=alu_op_i[1] D=alu_op_i[2] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0000000000000011 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[2] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_1_Z C0=alu_in_2[3] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[1] C=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[2] D=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[3] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[5] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000000111 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[1] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 1111000000000000 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[0] D=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 0000111100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D1 SD=alu_in_2[2] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[3] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[2] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[0] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[3] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[3] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[1] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[17] D=alu_in_2[17] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=alu_in_1[17] B=alu_in_2[17] C=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] D=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_LUT4_Z_1_D[3] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000001111111 -.gate LUT4 A=alu_op_i[0] B=alu_op_i[1] C=alu_op_i[2] D=sum[17] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_LUT4_Z_1_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000100000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[1] D=alu_in_2[1] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[1] D=alu_in_2[1] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=alu_in_1[3] C=alu_in_1[4] D=alu_in_2[0] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000111100110011 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[2] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=alu_in_1[1] C=alu_in_1[2] D=alu_in_2[0] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111000011001100 -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_1_ALUT BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_1_BLUT C0=alu_in_2[2] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[2] D=alu_in_2[3] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_1_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111111111110000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[1] C=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[3] D=alu_in_2[3] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_1_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111000011001100 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[0] B=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[1] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0101111100111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[15] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[13] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[16] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[14] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[0] B=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[1] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000101000001100 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[3] B=alu_in_2[2] C=alu_in_2[3] D=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[1] B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[2] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0011111101011111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_11_C_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] B=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] C=alu_output_LUT4_Z_12_C[2] D=alu_output_LUT4_Z_12_C[3] Z=alu_output[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111100011111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_12_C_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_12_C_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] Z=alu_output_LUT4_Z_12_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_12_C_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_12_C_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[4] Z=alu_output_LUT4_Z_12_C_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_12_C_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_12_C_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_12_C_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_12_C_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[4] Z=alu_output_LUT4_Z_12_C_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_5_B_LUT4_Z_A[2] D=alu_in_2[5] Z=alu_output_LUT4_Z_12_C_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000000001111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_5_B_LUT4_Z_A[0] C=alu_output_LUT4_Z_5_B_LUT4_Z_A[1] D=alu_in_2[5] Z=alu_output_LUT4_Z_12_C_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000000000011 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[2] C=alu_output_LUT4_Z_12_C_LUT4_Z_C[2] D=alu_output_LUT4_Z_12_C_LUT4_Z_C[3] Z=alu_output_LUT4_Z_12_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000000111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[2] D=alu_in_2[2] Z=alu_output_LUT4_Z_12_C_LUT4_Z_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[2] D=alu_in_2[2] Z=alu_output_LUT4_Z_12_C_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate L6MUX21 D0=alu_output_LUT4_Z_1_B_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_1_B_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] Z=alu_output_LUT4_Z_1_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] Z=alu_output_LUT4_Z_1_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 1111111111111111 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] Z=alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 1111000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 1111111111111111 -.gate LUT4 A=alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[3] Z=alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 1111111111111000 -.gate L6MUX21 D0=alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] Z=alu_output_LUT4_Z_1_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[28] C=alu_output_LUT4_Z_1_B_LUT4_Z_C[2] D=alu_output_LUT4_Z_1_B_LUT4_Z_C[3] Z=alu_output_LUT4_Z_1_B[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000000111 -.gate LUT4 A=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[3] B=alu_in_2[2] C=alu_in_2[3] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] Z=alu_output_LUT4_Z_1_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate L6MUX21 D0=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D0 D1=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[26] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[24] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[27] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[25] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D0 D1=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[22] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[20] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[23] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[21] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D0 D1=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[18] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[16] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[19] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[17] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[30] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[28] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[31] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[29] Z=alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[28] D=alu_in_2[28] Z=alu_output_LUT4_Z_1_B_LUT4_Z_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[28] D=alu_in_2[28] Z=alu_output_LUT4_Z_1_B_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=alu_output_LUT4_Z_2_A[0] B=alu_output_LUT4_Z_2_A[1] C=alu_output_LUT4_Z_2_A[2] D=alu_output_LUT4_Z_2_A[3] Z=alu_output[25] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111111011111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_2_A_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_2_A_L6MUX21_Z_D1 SD=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_2_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] Z=alu_output_LUT4_Z_2_A_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[0] D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] Z=alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000001111 -.gate PFUMX ALUT=alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] Z=alu_output_LUT4_Z_2_A_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[2] D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[3] Z=alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 1111111111110000 -.gate PFUMX ALUT=alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[25] D=alu_in_2[25] Z=alu_output_LUT4_Z_2_A[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate PFUMX ALUT=alu_output_LUT4_Z_2_A_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_2_A_PFUMX_Z_BLUT C0=sum[25] Z=alu_output_LUT4_Z_2_A[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate PFUMX ALUT=alu_output_LUT4_Z_2_A_PFUMX_Z_1_ALUT BLUT=alu_output_LUT4_Z_2_A_PFUMX_Z_1_BLUT C0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] Z=alu_output_LUT4_Z_2_A[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[2] B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[3] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_LUT4_Z_2_A_PFUMX_Z_1_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000001100000101 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_2_A_PFUMX_Z_1_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_in_2[25] B=alu_in_1[25] C=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] D=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] Z=alu_output_LUT4_Z_2_A_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000001111111 -.gate LUT4 A=$false B=alu_in_2[25] C=alu_in_1[25] D=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] Z=alu_output_LUT4_Z_2_A_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0011111111111111 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[20] C=alu_output_LUT4_Z_3_C[2] D=alu_output_LUT4_Z_3_C[3] Z=alu_output[20] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111100011111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_3_C_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] Z=alu_output_LUT4_Z_3_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000011111111 -.gate LUT4 A=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[0] B=alu_output_LUT4_Z_A_L6MUX21_Z_SD[2] C=alu_in_2[2] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0101001100000000 -.gate LUT4 A=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[0] B=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[1] C=alu_in_2[2] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0101001100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D1 SD=alu_in_2[1] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate L6MUX21 D0=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D0 D1=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D1 SD=alu_in_2[1] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_BLUT C0=alu_in_2[0] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[7] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[8] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_BLUT C0=alu_in_2[0] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[5] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[6] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[0] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[11] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[12] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[0] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[9] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[10] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1 SD=alu_in_2[3] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[5] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D0 D1=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D1 SD=alu_in_2[1] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D0_PFUMX_Z_BLUT C0=alu_in_2[0] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[15] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[16] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D1_PFUMX_Z_BLUT C0=alu_in_2[0] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[13] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[14] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_in_2[4] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 1111111011111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_in_2[4] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000100000000 -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[1] B=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[0] C=alu_in_2[2] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_B_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0101001100000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] C=alu_in_2[5] D=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[5] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0011111100000000 -.gate LUT4 A=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[1] B=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[2] C=alu_in_2[1] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1010110011111111 -.gate LUT4 A=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z_LUT4_Z_1_A[0] B=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[0] C=alu_in_2[1] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1010110011111111 -.gate LUT4 A=$false B=alu_in_1[19] C=alu_in_1[20] D=alu_in_2[0] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z_LUT4_Z_1_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[0] D=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[1] Z=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000001111 -.gate LUT4 A=alu_output_LUT4_Z_3_C_LUT4_Z_A[0] B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] C=alu_output_LUT4_Z_3_C_LUT4_Z_C[2] D=alu_output_LUT4_Z_3_C_LUT4_Z_C[3] Z=alu_output_LUT4_Z_3_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000001011 -.gate LUT4 A=alu_output_LUT4_Z_3_C_LUT4_Z_A[0] B=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] C=alu_output_LUT4_Z_3_C_LUT4_Z_A[2] D=alu_output_LUT4_Z_3_C_LUT4_Z_A[3] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0100111101000100 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z BLUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_BLUT C0=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[3] C=alu_in_2[2] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0000001100000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0011111100000000 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[4] C=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[2] D=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[3] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000000111 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[4] D=alu_in_2[4] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[4] D=alu_in_2[4] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate LUT4 A=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[0] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000110000001010 -.gate L6MUX21 D0=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate L6MUX21 D0=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0 D1=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1 SD=alu_in_2[1] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[2] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[0] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[2] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[2] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1 SD=alu_in_2[1] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[2] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[1] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[2] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[3] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[6] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[4] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[7] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[5] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate LUT4 A=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[0] B=alu_in_2[2] C=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[2] D=alu_in_2[3] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000001011 -.gate L6MUX21 D0=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1 SD=alu_in_2[2] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[3] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[2] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[0] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[3] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[3] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[1] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=alu_in_2[5] D=alu_in_2[4] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 0000111100000000 -.gate LUT4 A=$false B=alu_op_i[1] C=alu_op_i[0] D=alu_op_i[2] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0011000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[0] B=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[1] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0011111101011111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate PFUMX ALUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_1_ALUT BLUT=alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_1_BLUT C0=alu_in_2[2] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[2] D=alu_in_2[3] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_1_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111111111110000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[1] C=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[3] D=alu_in_2[3] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_1_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111000011001100 -.gate LUT4 A=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[0] B=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[1] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0101111100111111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[20] D=alu_in_2[20] Z=alu_output_LUT4_Z_3_C_LUT4_Z_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[20] D=alu_in_2[20] Z=alu_output_LUT4_Z_3_C_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[0] B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] C=alu_output_LUT4_Z_4_C[2] D=alu_output_LUT4_Z_4_C[3] Z=alu_output[19] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111010011111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_4_C_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_4_C_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] Z=alu_output_LUT4_Z_4_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_4_C_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_4_C_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_4_C_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_4_C_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_4_C_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_4_C_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_4_C_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_4_C_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=alu_output_LUT4_Z_9_B_LUT4_Z_1_B[0] C=alu_output_LUT4_Z_9_B_LUT4_Z_1_B[2] D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_4_C_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111000011110011 -.gate LUT4 A=$false B=alu_output_LUT4_Z_9_B_LUT4_Z_1_B[1] C=alu_output_LUT4_Z_9_B_LUT4_Z_1_B[2] D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_4_C_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111000011110011 -.gate PFUMX ALUT=alu_output_LUT4_Z_4_C_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_4_C_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_4_C_PFUMX_Z_C0[4] Z=alu_output_LUT4_Z_4_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_4_C_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] B=alu_output_LUT4_Z_4_C_PFUMX_Z_C0[1] C=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] D=sum[19] Z=alu_output_LUT4_Z_4_C_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000011101110111 -.gate LUT4 A=$false B=$false C=alu_in_1[19] D=alu_in_2[19] Z=alu_output_LUT4_Z_4_C_PFUMX_Z_C0[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 1111000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[19] D=alu_in_2[19] Z=alu_output_LUT4_Z_4_C_PFUMX_Z_C0[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_5_B[0] C=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] D=alu_output_LUT4_Z_5_B[2] Z=alu_output[18] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0011000011111111 -.gate LUT4 A=alu_output_LUT4_Z_5_B_LUT4_Z_A[2] B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] C=alu_output_LUT4_Z_5_B_LUT4_Z_C[2] D=alu_output_LUT4_Z_5_B_LUT4_Z_C[3] Z=alu_output_LUT4_Z_5_B[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1011000000000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D1 SD=alu_in_2[2] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[3] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[2] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[0] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[3] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[3] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[1] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate LUT4 A=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[1] B=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B[1] C=alu_in_2[2] D=alu_in_2[3] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100101000000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[16] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[14] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[17] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[15] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[0] C=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B[1] D=alu_in_2[2] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate L6MUX21 D0=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[12] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[10] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[13] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[11] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT C0=alu_in_2[2] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[2] D=alu_in_2[3] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000011110000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[0] C=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[1] D=alu_in_2[3] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000011 -.gate L6MUX21 D0=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[8] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[6] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[9] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[7] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate LUT4 A=alu_in_1[4] B=alu_in_1[5] C=alu_in_2[0] D=alu_in_2[1] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100101000000000 -.gate LUT4 A=alu_in_1[2] B=alu_in_1[3] C=alu_in_2[1] D=alu_in_2[0] Z=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000110000001010 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] C=alu_in_1[18] D=alu_in_2[18] Z=alu_output_LUT4_Z_5_B_LUT4_Z_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0101001100111111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_5_B_LUT4_Z_C_LUT4_Z_1_B[0] C=alu_in_2[18] D=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] Z=alu_output_LUT4_Z_5_B_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0000111100110011 -.gate LUT4 A=alu_op_i[0] B=alu_op_i[1] C=alu_op_i[2] D=sum[18] Z=alu_output_LUT4_Z_5_B_LUT4_Z_C_LUT4_Z_1_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_5_B_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_5_B_PFUMX_Z_BLUT C0=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_5_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=$false C=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] D=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_5_B_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111111100001111 -.gate LUT4 A=$false B=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] C=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] D=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_5_B_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1100110011110000 -.gate LUT4 A=alu_output_LUT4_Z_6_A[0] B=alu_output_LUT4_Z_6_A[1] C=alu_output_LUT4_Z_6_A[2] D=alu_output_LUT4_Z_6_A[3] Z=alu_output[15] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111111011111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_6_A_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] Z=alu_output_LUT4_Z_6_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] B=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] C=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] D=alu_in_2[3] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111010111110011 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] C=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[1] D=alu_in_2[2] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B[0] C=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[0] D=alu_in_2[2] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111000011001100 -.gate L6MUX21 D0=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[25] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[23] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[26] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[24] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[21] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[19] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[22] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[20] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] C=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B[0] D=alu_in_2[2] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111000011001100 -.gate L6MUX21 D0=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[29] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[27] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[30] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[28] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=alu_in_2[0] C=alu_in_2[1] D=alu_in_1[31] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0000001100000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[15] D=alu_in_2[15] Z=alu_output_LUT4_Z_6_A[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=alu_output_PFUMX_Z_C0_LUT4_Z_A[1] B=alu_output_PFUMX_Z_C0_LUT4_Z_B[0] C=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] Z=alu_output_LUT4_Z_6_A[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0101001100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_6_A_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_6_A_PFUMX_Z_BLUT C0=sum[15] Z=alu_output_LUT4_Z_6_A[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_in_2[15] B=alu_in_1[15] C=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] D=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] Z=alu_output_LUT4_Z_6_A_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000001111111 -.gate LUT4 A=$false B=alu_in_2[15] C=alu_in_1[15] D=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] Z=alu_output_LUT4_Z_6_A_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0011111111111111 -.gate LUT4 A=alu_output_LUT4_Z_7_A[0] B=alu_output_LUT4_Z_7_A[1] C=alu_output_LUT4_Z_7_A[2] D=alu_output_LUT4_Z_7_A[3] Z=alu_output[13] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111111011111111 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[13] D=alu_in_2[13] Z=alu_output_LUT4_Z_7_A[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[0] B=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[1] C=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[2] D=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] Z=alu_output_LUT4_Z_7_A[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111010000000000 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[0] B=alu_output_LUT4_Z_A_LUT4_Z_1_B[1] C=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] Z=alu_output_LUT4_Z_7_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0101001100000000 -.gate LUT4 A=$false B=$false C=alu_op_i[0] D=alu_op_i[2] Z=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 0000111100000000 -.gate LUT4 A=$false B=alu_op_i[0] C=alu_op_i[1] D=alu_op_i[2] Z=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0011000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_7_A_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_7_A_PFUMX_Z_BLUT C0=sum[13] Z=alu_output_LUT4_Z_7_A[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_in_2[13] B=alu_in_1[13] C=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] D=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] Z=alu_output_LUT4_Z_7_A_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000001111111 -.gate LUT4 A=$false B=alu_in_2[13] C=alu_in_1[13] D=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] Z=alu_output_LUT4_Z_7_A_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0011111111111111 -.gate LUT4 A=alu_output_LUT4_Z_8_A[0] B=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] C=alu_output_LUT4_Z_8_A[2] D=alu_output_LUT4_Z_8_A[3] Z=alu_output[12] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111010011111111 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[12] C=alu_output_LUT4_Z_8_A_LUT4_Z_C[2] D=alu_output_LUT4_Z_8_A_LUT4_Z_C[3] Z=alu_output_LUT4_Z_8_A[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000000111 -.gate LUT4 A=alu_output_LUT4_Z_8_A_LUT4_Z_1_A[0] B=alu_output_LUT4_Z_8_A_LUT4_Z_1_A[1] C=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] D=alu_output_LUT4_Z_8_A_LUT4_Z_1_A[3] Z=alu_output_LUT4_Z_8_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000011101111 -.gate LUT4 A=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[1] B=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[2] C=alu_in_2[2] D=alu_in_2[3] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100101000000000 -.gate LUT4 A=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[0] B=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[1] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_A[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000101000001100 -.gate LUT4 A=alu_output_LUT4_Z_1_B_LUT4_Z_1_A[3] B=alu_in_2[2] C=alu_in_2[3] D=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_A[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate L6MUX21 D0=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D0 D1=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[10] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[8] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[11] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[9] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[14] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[12] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[15] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[13] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=alu_in_2[4] D=alu_in_2[5] Z=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 0000000000001111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[3] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] Z=alu_output_LUT4_Z_8_A[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111110000000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[12] D=alu_in_2[12] Z=alu_output_LUT4_Z_8_A_LUT4_Z_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[12] D=alu_in_2[12] Z=alu_output_LUT4_Z_8_A_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_9_B[0] C=alu_output_LUT4_Z_9_B[1] D=alu_output_LUT4_Z_9_B[2] Z=alu_output[11] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111110011111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_9_B_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] Z=alu_output_LUT4_Z_9_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[2] B=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] C=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] D=alu_in_2[3] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111010111110011 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] C=alu_in_2[3] D=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0011111100000000 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[3] C=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[2] D=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[3] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[5] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000000111 -.gate LUT4 A=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A[0] B=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[0] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000110000001010 -.gate PFUMX ALUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=alu_in_1[5] C=alu_in_1[6] D=alu_in_2[0] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000111100110011 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[2] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=alu_in_1[3] C=alu_in_1[4] D=alu_in_2[0] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111000011001100 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[3] D=alu_in_2[3] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[3] D=alu_in_2[3] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate PFUMX ALUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_1_ALUT BLUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_1_BLUT C0=alu_in_2[3] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[0] C=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[1] D=alu_in_2[2] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_1_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000111111001100 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[2] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_1_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111111100000000 -.gate LUT4 A=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] B=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] C=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] D=alu_in_2[1] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000010100000011 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] C=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[1] D=alu_in_2[2] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111000011001100 -.gate L6MUX21 D0=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate L6MUX21 D0=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D0 D1=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[13] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[11] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[14] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[12] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[17] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[15] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[18] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[16] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[0] B=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[1] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000110000000101 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[11] C=alu_output_LUT4_Z_9_B_LUT4_Z_C[2] D=alu_output_LUT4_Z_9_B_LUT4_Z_C[3] Z=alu_output_LUT4_Z_9_B[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000000111 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] B=alu_output_LUT4_Z_9_B_LUT4_Z_1_B[0] C=alu_output_LUT4_Z_9_B_LUT4_Z_1_C[2] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] Z=alu_output_LUT4_Z_9_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111000100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[0] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_B[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate L6MUX21 D0=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_1_D0 D1=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_1_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate L6MUX21 D0=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D0 D1=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] B=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[1] C=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] D=alu_in_2[1] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1010111111001111 -.gate L6MUX21 D0=alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] B=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[1] C=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] D=alu_in_2[1] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1010111111001111 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[11] D=alu_in_2[11] Z=alu_output_LUT4_Z_9_B_LUT4_Z_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[11] D=alu_in_2[11] Z=alu_output_LUT4_Z_9_B_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] Z=alu_output_LUT4_Z_A[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_A_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[3] Z=alu_output_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100001111 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[3] Z=alu_output_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100001111 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_A_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[0] C=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[3] Z=alu_output_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1100110000001100 -.gate LUT4 A=$false B=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[1] C=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[3] Z=alu_output_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0011001100000011 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D1 SD=alu_in_2[1] Z=alu_output_LUT4_Z_A_L6MUX21_Z_SD[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[0] Z=alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[19] Z=alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[20] Z=alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[0] Z=alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[17] Z=alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[18] Z=alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate LUT4 A=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[0] B=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[1] C=alu_in_2[1] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_LUT4_Z_A_L6MUX21_Z_SD[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1010110011111111 -.gate LUT4 A=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] B=alu_in_2[5] C=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] Z=alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000000111 -.gate LUT4 A=$false B=alu_in_1[4] C=alu_in_1[5] D=alu_in_2[0] Z=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_1[2] C=alu_in_1[3] D=alu_in_2[0] Z=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_1[0] C=alu_in_1[1] D=alu_in_2[0] Z=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000100000000 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] C=alu_output_LUT4_Z_A_LUT4_Z_A[2] D=alu_output_LUT4_Z_A_LUT4_Z_A[3] Z=alu_output_LUT4_Z_A[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000011100000000 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[0] B=alu_output_LUT4_Z_A_LUT4_Z_1_B[1] C=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] Z=alu_output_LUT4_Z_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0101001100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1 SD=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[11] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000000000011 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[10] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000011 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_1_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_1_Z_PFUMX_BLUT_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_1_Z C0=alu_in_2[1] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_C[3] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_1_Z_PFUMX_BLUT_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z C0=alu_in_2[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z_PFUMX_ALUT_Z D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_C[3] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[1] C=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] D=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000010100000011 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1 SD=alu_in_2[4] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D1 SD=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT C0=alu_op_i[2] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT C0=alu_op_i[2] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=alu_op_i[3] D=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011110000 -.gate LUT4 A=$false B=alu_in_2[5] C=alu_in_2[6] D=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000000000011 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_in_2[3] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 1111111011111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_in_2[3] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000100000000 -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] C=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0000001100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D1 SD=alu_in_2[2] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000100000000 -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000100000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B[0] C=alu_op_i[2] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B[2] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111110000000000 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 1111000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_1_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_1_BLUT C0=alu_op_i[2] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_op_i[1] B=alu_op_i[0] C=alu_in_1[0] D=alu_in_2[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_1_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0101110011001111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_1_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111111111111111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[0] C=sum[31] D=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1100110000001111 -.gate CCU2C A0=alu_in_1[30] A1=alu_in_1[31] B0=alu_in_2[30] B1=alu_in_2[31] C0=$true C1=$true CIN=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[30] COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[0] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[30] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[31] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[8] A1=alu_in_1[9] B0=alu_in_2[8] B1=alu_in_2[9] C0=$true C1=$true CIN=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[8] COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[10] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[8] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[9] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[6] A1=alu_in_1[7] B0=alu_in_2[6] B1=alu_in_2[7] C0=$true C1=$true CIN=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[6] COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[8] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[6] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[7] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[16] A1=alu_in_1[17] B0=alu_in_2[16] B1=alu_in_2[17] C0=$true C1=$true CIN=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[16] COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[18] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[16] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[17] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[14] A1=alu_in_1[15] B0=alu_in_2[14] B1=alu_in_2[15] C0=$true C1=$true CIN=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[14] COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[16] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[14] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[15] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[12] A1=alu_in_1[13] B0=alu_in_2[12] B1=alu_in_2[13] C0=$true C1=$true CIN=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[12] COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[14] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[12] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[13] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[10] A1=alu_in_1[11] B0=alu_in_2[10] B1=alu_in_2[11] C0=$true C1=$true CIN=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[10] COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[12] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[10] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[11] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[0] A1=alu_in_1[1] B0=alu_in_2[0] B1=alu_in_2[1] C0=$true C1=$true CIN=$true COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[2] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[0] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[4] A1=alu_in_1[5] B0=alu_in_2[4] B1=alu_in_2[5] C0=$true C1=$true CIN=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[4] COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[6] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[4] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[5] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[2] A1=alu_in_1[3] B0=alu_in_2[2] B1=alu_in_2[3] C0=$true C1=$true CIN=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[2] COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[4] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[2] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[28] A1=alu_in_1[29] B0=alu_in_2[28] B1=alu_in_2[29] C0=$true C1=$true CIN=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[28] COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[30] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[28] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[29] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[26] A1=alu_in_1[27] B0=alu_in_2[26] B1=alu_in_2[27] C0=$true C1=$true CIN=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[26] COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[28] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[26] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[27] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[24] A1=alu_in_1[25] B0=alu_in_2[24] B1=alu_in_2[25] C0=$true C1=$true CIN=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[24] COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[26] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[24] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[25] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[22] A1=alu_in_1[23] B0=alu_in_2[22] B1=alu_in_2[23] C0=$true C1=$true CIN=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[22] COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[24] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[22] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[23] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[20] A1=alu_in_1[21] B0=alu_in_2[20] B1=alu_in_2[21] C0=$true C1=$true CIN=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[20] COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[22] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[20] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[21] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[18] A1=alu_in_1[19] B0=alu_in_2[18] B1=alu_in_2[19] C0=$true C1=$true CIN=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[18] COUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[20] D0=$true D1=$true S0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[18] S1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[19] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate LUT4 A=$false B=$false C=sum[0] D=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111111100001111 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[0] B=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] C=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[2] D=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[3] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0100111101000100 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[0] B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] C=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[2] D=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[3] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000101100000000 -.gate LUT4 A=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] B=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] C=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000110100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1 SD=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[13] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000000000011 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[12] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000011 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z C0=alu_in_2[1] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1 SD=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1 SD=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[5] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000000000011 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[4] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000011 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[7] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000000000011 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[6] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000011 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_C[3] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_B[1] B=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[3] C=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] D=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111010111110011 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[0] C=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000111100110011 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[1] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100001111 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 0000111100000000 -.gate LUT4 A=$false B=$false C=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 0000111100000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[4] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[0] B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] C=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] D=sum[21] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000101110111011 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0_PFUMX_Z_BLUT C0=alu_op_i[2] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_op_i[1] B=alu_op_i[0] C=alu_in_1[21] D=alu_in_2[21] Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0101110011001111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111111111111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1 SD=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D1 SD=alu_in_2[3] Z=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000100000000 -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000100000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[9] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000000000011 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[8] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000011 -.gate LUT4 A=alu_in_1[29] B=alu_in_2[29] C=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] D=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_D[3] Z=alu_output_LUT4_Z_A_LUT4_Z_A[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000001111111 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[29] D=alu_in_2[29] Z=alu_output_LUT4_Z_A_LUT4_Z_A[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[3] C=alu_in_2[2] D=alu_in_2[3] Z=alu_output_LUT4_Z_A_LUT4_Z_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0000000000000011 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[23] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[21] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[24] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[22] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate L6MUX21 D0=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D0 D1=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D1 SD=alu_in_2[0] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[19] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[17] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[20] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[18] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[27] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[25] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[28] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[26] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_PFUMX_Z_ALUT BLUT=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_PFUMX_Z_BLUT C0=alu_in_2[0] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=$false C=alu_in_1[30] D=alu_in_2[1] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111111100001111 -.gate LUT4 A=$false B=alu_in_1[29] C=alu_in_1[31] D=alu_in_2[1] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000111100110011 -.gate LUT4 A=$false B=alu_op_i[0] C=alu_op_i[1] D=alu_op_i[2] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate LUT4 A=alu_op_i[0] B=alu_op_i[1] C=alu_op_i[2] D=sum[29] Z=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000100000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_BLUT C0=alu_output_PFUMX_Z_C0[4] Z=alu_output[31] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate PFUMX ALUT=alu_output_PFUMX_Z_1_ALUT BLUT=alu_output_PFUMX_Z_1_BLUT C0=alu_output_PFUMX_Z_1_C0[4] Z=alu_output[30] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate PFUMX ALUT=alu_output_PFUMX_Z_10_ALUT BLUT=alu_output_PFUMX_Z_10_BLUT C0=alu_output_PFUMX_Z_10_C0[4] Z=alu_output[10] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_PFUMX_Z_10_C0[0] B=alu_output_PFUMX_Z_10_C0[1] C=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] D=alu_output_PFUMX_Z_10_C0[3] Z=alu_output_PFUMX_Z_10_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111111111100000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_10_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111111111111111 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[10] C=alu_output_PFUMX_Z_10_C0_LUT4_Z_C[2] D=alu_output_PFUMX_Z_10_C0_LUT4_Z_C[3] Z=alu_output_PFUMX_Z_10_C0[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000000111 -.gate LUT4 A=alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[0] B=alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[1] C=alu_in_2[3] D=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_PFUMX_Z_10_C0[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0101001100000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[1] C=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B[1] D=alu_in_2[2] Z=alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111000011001100 -.gate LUT4 A=$false B=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[0] C=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[1] D=alu_in_2[2] Z=alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111000011001100 -.gate LUT4 A=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] B=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] C=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] Z=alu_output_PFUMX_Z_10_C0[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1010001100000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[10] D=alu_in_2[10] Z=alu_output_PFUMX_Z_10_C0_LUT4_Z_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[10] D=alu_in_2[10] Z=alu_output_PFUMX_Z_10_C0_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_10_C0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_10_C0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] Z=alu_output_PFUMX_Z_10_C0[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[2] B=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[3] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_PFUMX_Z_10_C0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000110000000101 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_10_C0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_11_ALUT BLUT=alu_output_PFUMX_Z_11_BLUT C0=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[4] Z=alu_output[9] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[9] C=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[2] D=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[3] Z=alu_output_PFUMX_Z_11_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111111111111000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_11_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111111111111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_12_ALUT BLUT=alu_output_PFUMX_Z_12_BLUT C0=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] Z=alu_output[6] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[0] B=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] C=alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[2] D=alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_12_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111010011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_12_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000011111111 -.gate LUT4 A=alu_output_PFUMX_Z_9_C0_LUT4_Z_A[0] B=alu_output_PFUMX_Z_9_C0_LUT4_Z_A[1] C=alu_in_2[3] D=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] Z=alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100010100000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_BLUT C0=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] Z=alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate PFUMX ALUT=alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_1_ALUT BLUT=alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_1_BLUT C0=alu_in_2[3] Z=alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[2] Z=alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_1_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[2] C=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[1] D=alu_in_2[2] Z=alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_1_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111000011001100 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] B=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] C=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[2] D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[3] Z=alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_13_ALUT BLUT=alu_output_PFUMX_Z_13_BLUT C0=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[4] Z=alu_output[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[0] B=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[1] C=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] D=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[3] Z=alu_output_PFUMX_Z_13_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111111100010000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_13_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111111111111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_14_ALUT BLUT=alu_output_PFUMX_Z_14_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[4] Z=alu_output[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] B=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] C=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[2] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[3] Z=alu_output_PFUMX_Z_14_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111111101000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_14_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111111111111111 -.gate LUT4 A=alu_output_PFUMX_Z_1_C0[0] B=alu_output_PFUMX_Z_1_C0[1] C=alu_output_PFUMX_Z_1_C0[2] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] Z=alu_output_PFUMX_Z_1_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000011111110 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_1_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111111111111111 -.gate LUT4 A=alu_output_PFUMX_Z_1_C0_LUT4_Z_A[0] B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] C=alu_output_PFUMX_Z_1_C0_LUT4_Z_C[2] D=alu_output_PFUMX_Z_1_C0_LUT4_Z_C[3] Z=alu_output_PFUMX_Z_1_C0[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000011100000000 -.gate LUT4 A=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[1] B=alu_in_2[2] C=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C[2] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] Z=alu_output_PFUMX_Z_1_C0[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000101100000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[3] B=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[1] C=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] D=alu_in_2[1] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000010100000011 -.gate LUT4 A=$false B=alu_in_1[27] C=alu_in_1[28] D=alu_in_2[0] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_1[25] C=alu_in_1[26] D=alu_in_2[0] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_1[23] C=alu_in_1[24] D=alu_in_2[0] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_1[21] C=alu_in_1[22] D=alu_in_2[0] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_1[29] C=alu_in_1[30] D=alu_in_2[0] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A[0] B=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[0] C=alu_in_2[2] D=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] Z=alu_output_PFUMX_Z_1_C0[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1010110000000000 -.gate LUT4 A=$false B=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A[0] C=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[0] D=alu_in_2[2] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0011001100001111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[1] C=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0000000000111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z_PFUMX_Z_BLUT C0=alu_output_PFUMX_Z_9_C0_LUT4_Z_A[4] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_PFUMX_Z_9_C0_LUT4_Z_A[0] B=alu_output_PFUMX_Z_9_C0_LUT4_Z_A[1] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] D=alu_in_2[3] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0011111110101111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[2] B=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[3] C=alu_in_2[1] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1010110011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[2] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[3] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_1_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_Z BLUT=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_1_Z C0=alu_in_2[1] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_Z_PFUMX_ALUT_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate L6MUX21 D0=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_Z_PFUMX_ALUT_Z D1=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z SD=alu_in_2[2] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate LUT4 A=$false B=alu_in_1[17] C=alu_in_1[18] D=alu_in_2[0] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_1[15] C=alu_in_1[16] D=alu_in_2[0] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] B=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B[0] C=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] Z=alu_output_PFUMX_Z_1_C0[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1010001100000000 -.gate LUT4 A=$false B=alu_in_2[2] C=alu_in_2[3] D=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0000001100000000 -.gate LUT4 A=alu_in_1[30] B=alu_in_2[30] C=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] D=alu_output_PFUMX_Z_1_C0_LUT4_Z_C_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000001111111 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[30] D=alu_in_2[30] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=alu_op_i[0] B=alu_op_i[1] C=alu_op_i[2] D=sum[30] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_C_LUT4_Z_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000100000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_ALUT BLUT=alu_output_PFUMX_Z_2_BLUT C0=alu_output_PFUMX_Z_2_C0[4] Z=alu_output[27] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_PFUMX_Z_2_C0[0] B=alu_output_PFUMX_Z_2_C0[1] C=alu_output_PFUMX_Z_2_C0[2] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] Z=alu_output_PFUMX_Z_2_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000011111110 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111111111111111 -.gate LUT4 A=$false B=alu_output_PFUMX_Z_2_C0_LUT4_Z_B[0] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] D=alu_output_PFUMX_Z_2_C0_LUT4_Z_B[2] Z=alu_output_PFUMX_Z_2_C0[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0011111100000000 -.gate LUT4 A=alu_output_PFUMX_Z_C0_LUT4_Z_1_A[1] B=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B[1] C=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] Z=alu_output_PFUMX_Z_2_C0[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0101001100000000 -.gate LUT4 A=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[0] B=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] C=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[3] D=alu_in_2[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111000001000100 -.gate LUT4 A=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[0] B=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[2] C=alu_in_2[1] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1010110011111111 -.gate LUT4 A=$false B=alu_in_1[28] C=alu_in_1[29] D=alu_in_2[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1 SD=alu_op_i[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[19] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000000000011 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[18] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000011 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1 SD=alu_op_i[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[21] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000000000011 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[20] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000011 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z C0=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_D1 SD=alu_in_2[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1 SD=alu_in_2[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[2] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D1 SD=alu_in_2[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_C[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000011111111 -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D1 SD=alu_in_2[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000011111111 -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] D=alu_in_2[5] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 1111000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] B=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] C=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] D=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000110100000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1 SD=alu_op_i[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[17] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000000000011 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[16] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000011 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z C0=alu_in_2[1] Z=alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[2] C=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[3] D=alu_in_2[1] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_1[26] C=alu_in_1[27] D=alu_in_2[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_9_B_LUT4_Z_1_B[1] D=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] Z=alu_output_PFUMX_Z_2_C0[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 0000111100000000 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] B=alu_output_LUT4_Z_9_B_LUT4_Z_1_B[0] C=alu_output_LUT4_Z_9_B_LUT4_Z_1_C[2] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] Z=alu_output_PFUMX_Z_2_C0[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1111000100000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D1 SD=alu_op_i[2] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_B[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[27] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=sum[27] C=alu_op_i[1] D=alu_op_i[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111111110011 -.gate LUT4 A=$false B=sum[27] C=alu_op_i[1] D=alu_op_i[0] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111111110011 -.gate PFUMX ALUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[27] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=alu_op_i[1] C=alu_op_i[0] D=alu_in_1[27] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0011001111110000 -.gate LUT4 A=$false B=$false C=alu_op_i[0] D=alu_in_1[27] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111000011111111 -.gate LUT4 A=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[0] B=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[1] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_PFUMX_Z_2_C0_LUT4_Z_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000110000000101 -.gate PFUMX ALUT=alu_output_PFUMX_Z_3_ALUT BLUT=alu_output_PFUMX_Z_3_BLUT C0=alu_output_PFUMX_Z_3_C0[4] Z=alu_output[26] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_PFUMX_Z_3_C0[0] B=alu_output_PFUMX_Z_3_C0[1] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] D=alu_output_PFUMX_Z_3_C0[3] Z=alu_output_PFUMX_Z_3_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111111100001011 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_3_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111111111111111 -.gate L6MUX21 D0=alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] Z=alu_output_PFUMX_Z_3_C0[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] Z=alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100001111 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] Z=alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100001111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[0] C=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] Z=alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0011001100000011 -.gate LUT4 A=$false B=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[1] C=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] Z=alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0011001100000011 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[26] C=alu_output_PFUMX_Z_3_C0_LUT4_Z_C[2] D=alu_output_PFUMX_Z_3_C0_LUT4_Z_C[3] Z=alu_output_PFUMX_Z_3_C0[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000000111 -.gate LUT4 A=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] B=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] C=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] Z=alu_output_PFUMX_Z_3_C0[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1010001100000000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[26] D=alu_in_2[26] Z=alu_output_PFUMX_Z_3_C0_LUT4_Z_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[26] D=alu_in_2[26] Z=alu_output_PFUMX_Z_3_C0_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_3_C0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_3_C0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] Z=alu_output_PFUMX_Z_3_C0[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[2] B=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[3] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_PFUMX_Z_3_C0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000110000000101 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_3_C0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_4_ALUT BLUT=alu_output_PFUMX_Z_4_BLUT C0=alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[4] Z=alu_output[23] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[3] Z=alu_output_PFUMX_Z_4_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000011111111 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] B=alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[1] C=alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[2] D=alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[3] Z=alu_output_PFUMX_Z_4_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0001111111111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_5_ALUT BLUT=alu_output_PFUMX_Z_5_BLUT C0=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[4] Z=alu_output[22] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[3] Z=alu_output_PFUMX_Z_5_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000011111111 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] B=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[1] C=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[2] D=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[3] Z=alu_output_PFUMX_Z_5_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0001111111111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_6_ALUT BLUT=alu_output_PFUMX_Z_6_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[4] Z=alu_output[21] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[0] B=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[1] C=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[3] Z=alu_output_PFUMX_Z_6_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111010011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[3] Z=alu_output_PFUMX_Z_6_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_7_ALUT BLUT=alu_output_PFUMX_Z_7_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] Z=alu_output[17] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[0] B=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[1] C=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[2] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[3] Z=alu_output_PFUMX_Z_7_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111100011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[3] Z=alu_output_PFUMX_Z_7_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_8_ALUT BLUT=alu_output_PFUMX_Z_8_BLUT C0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[4] Z=alu_output[16] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[0] B=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[1] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] D=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[0] Z=alu_output_PFUMX_Z_8_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0100010011110100 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_8_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111111111111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_ALUT BLUT=alu_output_PFUMX_Z_9_BLUT C0=alu_output_PFUMX_Z_9_C0[4] Z=alu_output[14] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_PFUMX_Z_9_C0[0] B=alu_output_PFUMX_Z_9_C0[1] C=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] D=alu_output_PFUMX_Z_9_C0[3] Z=alu_output_PFUMX_Z_9_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111111111100000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111111111111111 -.gate LUT4 A=alu_output_PFUMX_Z_9_C0_LUT4_Z_A[0] B=alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[2] C=alu_in_2[3] D=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_PFUMX_Z_9_C0[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0101001100000000 -.gate LUT4 A=$false B=$false C=alu_output_PFUMX_Z_1_C0_LUT4_Z_A[0] D=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] Z=alu_output_PFUMX_Z_9_C0[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 1111000000000000 -.gate LUT4 A=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] B=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B[0] C=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] Z=alu_output_PFUMX_Z_9_C0[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1010001100000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_in_2[2] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_in_2[2] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=alu_in_1[13] C=alu_in_1[14] D=alu_in_2[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_1[11] C=alu_in_1[12] D=alu_in_2[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] C=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] D=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0011001100001111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z C0=alu_in_2[2] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[2] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate L6MUX21 D0=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D1 SD=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[5] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[6] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[3] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[4] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[2] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[2] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_1_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_1_Z C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate L6MUX21 D0=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z D1=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_D1 SD=alu_in_2[2] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[2] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0 D1=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z SD=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1 SD=alu_in_2[2] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 1111111111111111 -.gate LUT4 A=$false B=$false C=alu_in_2[31] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 1111111111110000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 1111111111111111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 1111111111111111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_2[6] D=alu_in_1[6] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] D=sum[6] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 1111000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_2[6] D=alu_in_1[6] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0 D1=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z SD=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_BLUT C0=alu_in_2[2] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z SD=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0 D1=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1 SD=alu_in_2[4] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111011111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT C0=alu_in_2[31] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000100000000 -.gate LUT4 A=alu_op_i[1] B=alu_op_i[2] C=alu_in_2[6] D=alu_op_i[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000100000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_in_2[2] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=alu_op_i[2] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[2] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000011111100 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000011110000 -.gate LUT4 A=$false B=alu_in_1[9] C=alu_in_1[10] D=alu_in_2[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_1[7] C=alu_in_1[8] D=alu_in_2[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B[0] C=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] Z=alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0000000011001111 -.gate L6MUX21 D0=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D1 SD=alu_op_i[2] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[22] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=sum[22] C=alu_op_i[1] D=alu_op_i[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111111110011 -.gate LUT4 A=$false B=sum[22] C=alu_op_i[1] D=alu_op_i[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111111110011 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[22] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=alu_op_i[1] C=alu_op_i[0] D=alu_in_1[22] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0011001111110000 -.gate LUT4 A=$false B=$false C=alu_op_i[0] D=alu_in_1[22] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111000011111111 -.gate LUT4 A=$false B=$false C=alu_in_2[2] D=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 0000111100000000 -.gate LUT4 A=$false B=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[1] C=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[2] D=alu_in_2[2] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111000011001100 -.gate L6MUX21 D0=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate L6MUX21 D0=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D0 D1=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[24] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[22] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[25] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[23] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate L6MUX21 D0=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D0 D1=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[20] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[18] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[21] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[19] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[28] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[26] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[29] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_1[27] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 0000000011111111 -.gate LUT4 A=alu_in_1[30] B=alu_in_1[31] C=alu_in_2[1] D=alu_in_2[0] Z=alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000110000001010 -.gate PFUMX ALUT=alu_output_PFUMX_Z_9_C0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_9_C0_PFUMX_Z_BLUT C0=alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[4] Z=alu_output_PFUMX_Z_9_C0[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_9_C0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] B=alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[1] C=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] D=sum[14] Z=alu_output_PFUMX_Z_9_C0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000011101110111 -.gate LUT4 A=$false B=$false C=alu_in_1[14] D=alu_in_2[14] Z=alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 1111000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[14] D=alu_in_2[14] Z=alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=alu_output_PFUMX_Z_C0[0] B=alu_output_PFUMX_Z_C0[1] C=alu_output_PFUMX_Z_C0[2] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] Z=alu_output_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000011111110 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 1111111111111111 -.gate LUT4 A=alu_output_PFUMX_Z_C0_LUT4_Z_A[1] B=alu_output_PFUMX_Z_C0_LUT4_Z_B[0] C=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] D=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] Z=alu_output_PFUMX_Z_C0[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0101001100000000 -.gate LUT4 A=alu_output_PFUMX_Z_C0_LUT4_Z_1_A[0] B=alu_output_PFUMX_Z_C0_LUT4_Z_1_A[1] C=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] D=alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] Z=alu_output_PFUMX_Z_C0[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0101001100000000 -.gate LUT4 A=$false B=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] C=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[2] D=alu_in_2[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] C=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] D=alu_in_2[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1 SD=alu_op_i[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1 SD=alu_op_i[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[23] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000000000011 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[22] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000011 -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[25] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000000000011 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[24] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000011 -.gate LUT4 A=$false B=alu_output_PFUMX_Z_C0_LUT4_Z_2_B[0] C=alu_output_PFUMX_Z_C0_LUT4_Z_2_B[1] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] Z=alu_output_PFUMX_Z_C0[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0000001100000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[2] Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000011111111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[30] C=alu_in_1[31] D=alu_in_2[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0011001100001111 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[0] B=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] C=alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[3] D=alu_in_2[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 1111000001000100 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_2_B_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_in_2[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 1111111111111111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_in_2[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1 SD=alu_op_i[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[3] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000000000011 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[2] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000011 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 0000111100000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000111100000000 -.gate LUT4 A=$false B=$false C=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] D=alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000111100000000 -.gate LUT4 A=$false B=$false C=alu_output_PFUMX_Z_C0_LUT4_Z_A[1] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" -.param INIT 0000111100000000 -.gate LUT4 A=alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] B=sum[7] C=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[2] D=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[3] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[5] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000000000111 -.gate LUT4 A=$false B=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] C=alu_in_2[3] D=alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0011111100000000 -.gate LUT4 A=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[0] B=alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] C=alu_in_2[3] D=alu_in_2[2] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000110000001010 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[2] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=alu_in_1[9] C=alu_in_1[10] D=alu_in_2[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1111000011001100 -.gate LUT4 A=$false B=alu_in_1[7] C=alu_in_1[8] D=alu_in_2[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000111100110011 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] C=alu_in_1[7] D=alu_in_2[7] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100000000000000 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[7] D=alu_in_2[7] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D1 SD=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111100000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1 SD=alu_op_i[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" -.param INIT 0000000000000000 -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 SD=alu_in_2[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[15] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" -.param INIT 0000000000000011 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_op_i[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" -.param INIT 0000000000000000 -.gate LUT4 A=$false B=alu_in_1[14] C=alu_op_i[2] D=alu_in_2[6] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" -.param INIT 0000000000000011 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111100000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z BLUT=alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z C0=alu_in_2[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z_PFUMX_ALUT_Z -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_C[3] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=$false C=$false D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111111100000000 -.gate LUT4 A=$false B=alu_output_PFUMX_Z_C0_LUT4_Z_B[0] C=alu_output_LUT4_Z_A_LUT4_Z_1_C[4] D=alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0000000011001111 -.gate LUT4 A=$false B=alu_output_PFUMX_Z_C0_LUT4_Z_1_A[0] C=alu_output_PFUMX_Z_C0_LUT4_Z_1_A[1] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[1] C=alu_output_PFUMX_Z_C0_LUT4_Z_A[1] D=alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0000000011110011 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT C0=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[4] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] B=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[1] C=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] D=alu_in_2[3] Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0011111110101111 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_PFUMX_Z_BLUT C0=alu_output_PFUMX_Z_C0_PFUMX_Z_C0[4] Z=alu_output_PFUMX_Z_C0[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" -.gate LUT4 A=alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] B=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[1] C=alu_in_2[3] D=alu_output_PFUMX_Z_C0_PFUMX_Z_C0[3] Z=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" -.param INIT 0000000011110111 -.gate L6MUX21 D0=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0 D1=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1 SD=alu_op_i[2] Z=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT C0=alu_in_2[23] Z=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" -.gate LUT4 A=$false B=sum[23] C=alu_op_i[1] D=alu_op_i[0] Z=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" -.param INIT 1111111111110011 -.gate LUT4 A=$false B=sum[23] C=alu_op_i[1] D=alu_op_i[0] Z=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" -.param INIT 1111111111110011 -.gate PFUMX ALUT=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT BLUT=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT C0=alu_in_2[23] Z=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1 -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" -.gate LUT4 A=$false B=alu_op_i[1] C=alu_op_i[0] D=alu_in_1[23] Z=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" -.param INIT 0011001111110000 -.gate LUT4 A=$false B=$false C=alu_op_i[0] D=alu_in_1[23] Z=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" -.param INIT 1111000011111111 -.gate LUT4 A=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] B=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[1] C=alu_in_2[3] D=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] Z=alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100010100000000 -.gate LUT4 A=$false B=alu_in_2[3] C=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[1] D=alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] Z=alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0011000000000000 -.gate LUT4 A=alu_in_2[0] B=alu_in_2[1] C=alu_in_2[2] D=alu_in_1[31] Z=alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000100000000 -.gate LUT4 A=$false B=$false C=$false D=$false Z=alu_output_PFUMX_Z_C0_PFUMX_Z_BLUT -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" -.param INIT 0000000000000000 -.gate LUT4 A=alu_in_1[31] B=alu_in_2[31] C=alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] D=alu_output_PFUMX_Z_C0_PFUMX_Z_C0_LUT4_Z_D[3] Z=alu_output_PFUMX_Z_C0_PFUMX_Z_C0[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000001111111 -.gate LUT4 A=alu_output_LUT4_Z_7_A_LUT4_Z_A[0] B=alu_output_LUT4_Z_7_A_LUT4_Z_A[1] C=alu_in_1[31] D=alu_in_2[31] Z=alu_output_PFUMX_Z_C0_PFUMX_Z_C0[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 1100111011100000 -.gate LUT4 A=alu_op_i[0] B=alu_op_i[1] C=alu_op_i[2] D=sum[31] Z=alu_output_PFUMX_Z_C0_PFUMX_Z_C0_LUT4_Z_D[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" -.param INIT 0000000100000000 -.gate CCU2C A0=$false A1=$false B0=complement2_CCU2C_S0_B0[8] B1=complement2_CCU2C_S0_B0[9] C0=$false C1=$false CIN=complement2_CCU2C_S0_COUT[8] COUT=complement2_CCU2C_S0_COUT[10] D0=$true D1=$true S0=complement2[8] S1=complement2[9] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=$false A1=$false B0=complement2_CCU2C_S0_B0[6] B1=complement2_CCU2C_S0_B0[7] C0=$false C1=$false CIN=complement2_CCU2C_S0_COUT[6] COUT=complement2_CCU2C_S0_COUT[8] D0=$true D1=$true S0=complement2[6] S1=complement2[7] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=$false A1=$false B0=complement2_CCU2C_S0_B0[18] B1=complement2_CCU2C_S0_B0[19] C0=$false C1=$false CIN=complement2_CCU2C_S0_COUT[18] COUT=complement2_CCU2C_S0_COUT[20] D0=$true D1=$true S0=complement2[18] S1=complement2[19] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=$false A1=$false B0=complement2_CCU2C_S0_B0[16] B1=complement2_CCU2C_S0_B0[17] C0=$false C1=$false CIN=complement2_CCU2C_S0_COUT[16] COUT=complement2_CCU2C_S0_COUT[18] D0=$true D1=$true S0=complement2[16] S1=complement2[17] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=$false A1=$false B0=complement2_CCU2C_S0_B0[14] B1=complement2_CCU2C_S0_B0[15] C0=$false C1=$false CIN=complement2_CCU2C_S0_COUT[14] COUT=complement2_CCU2C_S0_COUT[16] D0=$true D1=$true S0=complement2[14] S1=complement2[15] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=$false A1=$false B0=complement2_CCU2C_S0_B0[12] B1=complement2_CCU2C_S0_B0[13] C0=$false C1=$false CIN=complement2_CCU2C_S0_COUT[12] COUT=complement2_CCU2C_S0_COUT[14] D0=$true D1=$true S0=complement2[12] S1=complement2[13] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=$false A1=$false B0=complement2_CCU2C_S0_B0[10] B1=complement2_CCU2C_S0_B0[11] C0=$false C1=$false CIN=complement2_CCU2C_S0_COUT[10] COUT=complement2_CCU2C_S0_COUT[12] D0=$true D1=$true S0=complement2[10] S1=complement2[11] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=$true A1=$false B0=complement2_CCU2C_S0_B0[0] B1=complement2_CCU2C_S0_B0[1] C0=$false C1=$false CIN=$false COUT=complement2_CCU2C_S0_COUT[2] D0=$true D1=$true S0=complement2[0] S1=complement2[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=$false A1=$false B0=complement2_CCU2C_S0_B0[4] B1=complement2_CCU2C_S0_B0[5] C0=$false C1=$false CIN=complement2_CCU2C_S0_COUT[4] COUT=complement2_CCU2C_S0_COUT[6] D0=$true D1=$true S0=complement2[4] S1=complement2[5] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=$false A1=$false B0=complement2_CCU2C_S0_B0[30] B1=complement2_CCU2C_S0_B0[31] C0=$false C1=$false CIN=complement2_CCU2C_S0_COUT[30] COUT=complement2_CCU2C_S0_3_COUT[31] D0=$true D1=$true S0=complement2[30] S1=complement2[31] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=$false A1=$false B0=complement2_CCU2C_S0_B0[2] B1=complement2_CCU2C_S0_B0[3] C0=$false C1=$false CIN=complement2_CCU2C_S0_COUT[2] COUT=complement2_CCU2C_S0_COUT[4] D0=$true D1=$true S0=complement2[2] S1=complement2[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=$false A1=$false B0=complement2_CCU2C_S0_B0[28] B1=complement2_CCU2C_S0_B0[29] C0=$false C1=$false CIN=complement2_CCU2C_S0_COUT[28] COUT=complement2_CCU2C_S0_COUT[30] D0=$true D1=$true S0=complement2[28] S1=complement2[29] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=$false A1=$false B0=complement2_CCU2C_S0_B0[26] B1=complement2_CCU2C_S0_B0[27] C0=$false C1=$false CIN=complement2_CCU2C_S0_COUT[26] COUT=complement2_CCU2C_S0_COUT[28] D0=$true D1=$true S0=complement2[26] S1=complement2[27] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=$false A1=$false B0=complement2_CCU2C_S0_B0[24] B1=complement2_CCU2C_S0_B0[25] C0=$false C1=$false CIN=complement2_CCU2C_S0_COUT[24] COUT=complement2_CCU2C_S0_COUT[26] D0=$true D1=$true S0=complement2[24] S1=complement2[25] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=$false A1=$false B0=complement2_CCU2C_S0_B0[22] B1=complement2_CCU2C_S0_B0[23] C0=$false C1=$false CIN=complement2_CCU2C_S0_COUT[22] COUT=complement2_CCU2C_S0_COUT[24] D0=$true D1=$true S0=complement2[22] S1=complement2[23] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=$false A1=$false B0=complement2_CCU2C_S0_B0[20] B1=complement2_CCU2C_S0_B0[21] C0=$false C1=$false CIN=complement2_CCU2C_S0_COUT[20] COUT=complement2_CCU2C_S0_COUT[22] D0=$true D1=$true S0=complement2[20] S1=complement2[21] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[29] Z=complement2_CCU2C_S0_B0[29] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[31] Z=complement2_CCU2C_S0_B0[31] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[21] Z=complement2_CCU2C_S0_B0[21] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[20] Z=complement2_CCU2C_S0_B0[20] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[19] Z=complement2_CCU2C_S0_B0[19] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[18] Z=complement2_CCU2C_S0_B0[18] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[17] Z=complement2_CCU2C_S0_B0[17] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[16] Z=complement2_CCU2C_S0_B0[16] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[15] Z=complement2_CCU2C_S0_B0[15] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[14] Z=complement2_CCU2C_S0_B0[14] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[13] Z=complement2_CCU2C_S0_B0[13] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[12] Z=complement2_CCU2C_S0_B0[12] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[30] Z=complement2_CCU2C_S0_B0[30] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[11] Z=complement2_CCU2C_S0_B0[11] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[10] Z=complement2_CCU2C_S0_B0[10] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[9] Z=complement2_CCU2C_S0_B0[9] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[8] Z=complement2_CCU2C_S0_B0[8] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[7] Z=complement2_CCU2C_S0_B0[7] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[6] Z=complement2_CCU2C_S0_B0[6] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[5] Z=complement2_CCU2C_S0_B0[5] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[4] Z=complement2_CCU2C_S0_B0[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[3] Z=complement2_CCU2C_S0_B0[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[2] Z=complement2_CCU2C_S0_B0[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[28] Z=complement2_CCU2C_S0_B0[28] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[1] Z=complement2_CCU2C_S0_B0[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[0] Z=complement2_CCU2C_S0_B0[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[27] Z=complement2_CCU2C_S0_B0[27] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[26] Z=complement2_CCU2C_S0_B0[26] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[25] Z=complement2_CCU2C_S0_B0[25] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[24] Z=complement2_CCU2C_S0_B0[24] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[23] Z=complement2_CCU2C_S0_B0[23] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=$false C=$false D=alu_in_2[22] Z=complement2_CCU2C_S0_B0[22] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" -.param INIT 0000000011111111 -.gate LUT4 A=$false B=alu_in_2[31] C=complement2[31] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[31] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[30] C=complement2[30] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[30] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[21] C=complement2[21] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[21] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[20] C=complement2[20] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[20] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[19] C=complement2[19] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[19] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[18] C=complement2[18] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[18] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[17] C=complement2[17] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[17] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[16] C=complement2[16] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[16] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[15] C=complement2[15] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[15] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[14] C=complement2[14] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[14] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[13] C=complement2[13] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[13] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[12] C=complement2[12] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[12] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[29] C=complement2[29] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[29] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[11] C=complement2[11] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[11] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[10] C=complement2[10] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[10] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[9] C=complement2[9] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[9] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[8] C=complement2[8] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[8] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[7] C=complement2[7] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[7] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[6] C=complement2[6] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[6] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[5] C=complement2[5] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[5] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[4] C=complement2[4] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[4] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[3] C=complement2[3] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[2] C=complement2[2] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[28] C=complement2[28] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[28] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[1] C=complement2[1] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[0] C=complement2[0] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[0] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[27] C=complement2[27] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[27] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[26] C=complement2[26] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[26] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[25] C=complement2[25] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[25] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[24] C=complement2[24] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[24] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[23] C=complement2[23] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[23] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_in_2[22] C=complement2[22] D=complement2_LUT4_C_D[2] Z=sum_CCU2C_S0_B0[22] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 1100110011110000 -.gate LUT4 A=$false B=alu_op_i[0] C=alu_op_i[1] D=alu_op_i[3] Z=complement2_LUT4_C_D[2] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" -.param INIT 0000000011001111 -.gate CCU2C A0=alu_in_1[8] A1=alu_in_1[9] B0=sum_CCU2C_S0_B0[8] B1=sum_CCU2C_S0_B0[9] C0=$false C1=$false CIN=sum_CCU2C_S0_COUT[8] COUT=sum_CCU2C_S0_COUT[10] D0=$true D1=$true S0=sum[8] S1=sum[9] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[6] A1=alu_in_1[7] B0=sum_CCU2C_S0_B0[6] B1=sum_CCU2C_S0_B0[7] C0=$false C1=$false CIN=sum_CCU2C_S0_COUT[6] COUT=sum_CCU2C_S0_COUT[8] D0=$true D1=$true S0=sum[6] S1=sum[7] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[18] A1=alu_in_1[19] B0=sum_CCU2C_S0_B0[18] B1=sum_CCU2C_S0_B0[19] C0=$false C1=$false CIN=sum_CCU2C_S0_COUT[18] COUT=sum_CCU2C_S0_COUT[20] D0=$true D1=$true S0=sum[18] S1=sum[19] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[16] A1=alu_in_1[17] B0=sum_CCU2C_S0_B0[16] B1=sum_CCU2C_S0_B0[17] C0=$false C1=$false CIN=sum_CCU2C_S0_COUT[16] COUT=sum_CCU2C_S0_COUT[18] D0=$true D1=$true S0=sum[16] S1=sum[17] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[14] A1=alu_in_1[15] B0=sum_CCU2C_S0_B0[14] B1=sum_CCU2C_S0_B0[15] C0=$false C1=$false CIN=sum_CCU2C_S0_COUT[14] COUT=sum_CCU2C_S0_COUT[16] D0=$true D1=$true S0=sum[14] S1=sum[15] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[12] A1=alu_in_1[13] B0=sum_CCU2C_S0_B0[12] B1=sum_CCU2C_S0_B0[13] C0=$false C1=$false CIN=sum_CCU2C_S0_COUT[12] COUT=sum_CCU2C_S0_COUT[14] D0=$true D1=$true S0=sum[12] S1=sum[13] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[10] A1=alu_in_1[11] B0=sum_CCU2C_S0_B0[10] B1=sum_CCU2C_S0_B0[11] C0=$false C1=$false CIN=sum_CCU2C_S0_COUT[10] COUT=sum_CCU2C_S0_COUT[12] D0=$true D1=$true S0=sum[10] S1=sum[11] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[0] A1=alu_in_1[1] B0=sum_CCU2C_S0_B0[0] B1=sum_CCU2C_S0_B0[1] C0=$false C1=$false CIN=$false COUT=sum_CCU2C_S0_COUT[2] D0=$true D1=$true S0=sum[0] S1=sum[1] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[4] A1=alu_in_1[5] B0=sum_CCU2C_S0_B0[4] B1=sum_CCU2C_S0_B0[5] C0=$false C1=$false CIN=sum_CCU2C_S0_COUT[4] COUT=sum_CCU2C_S0_COUT[6] D0=$true D1=$true S0=sum[4] S1=sum[5] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[30] A1=alu_in_1[31] B0=sum_CCU2C_S0_B0[30] B1=sum_CCU2C_S0_B0[31] C0=$false C1=$false CIN=sum_CCU2C_S0_COUT[30] COUT=sum_CCU2C_S0_3_COUT[31] D0=$true D1=$true S0=sum[30] S1=sum[31] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[2] A1=alu_in_1[3] B0=sum_CCU2C_S0_B0[2] B1=sum_CCU2C_S0_B0[3] C0=$false C1=$false CIN=sum_CCU2C_S0_COUT[2] COUT=sum_CCU2C_S0_COUT[4] D0=$true D1=$true S0=sum[2] S1=sum[3] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[28] A1=alu_in_1[29] B0=sum_CCU2C_S0_B0[28] B1=sum_CCU2C_S0_B0[29] C0=$false C1=$false CIN=sum_CCU2C_S0_COUT[28] COUT=sum_CCU2C_S0_COUT[30] D0=$true D1=$true S0=sum[28] S1=sum[29] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[26] A1=alu_in_1[27] B0=sum_CCU2C_S0_B0[26] B1=sum_CCU2C_S0_B0[27] C0=$false C1=$false CIN=sum_CCU2C_S0_COUT[26] COUT=sum_CCU2C_S0_COUT[28] D0=$true D1=$true S0=sum[26] S1=sum[27] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[24] A1=alu_in_1[25] B0=sum_CCU2C_S0_B0[24] B1=sum_CCU2C_S0_B0[25] C0=$false C1=$false CIN=sum_CCU2C_S0_COUT[24] COUT=sum_CCU2C_S0_COUT[26] D0=$true D1=$true S0=sum[24] S1=sum[25] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[22] A1=alu_in_1[23] B0=sum_CCU2C_S0_B0[22] B1=sum_CCU2C_S0_B0[23] C0=$false C1=$false CIN=sum_CCU2C_S0_COUT[22] COUT=sum_CCU2C_S0_COUT[24] D0=$true D1=$true S0=sum[22] S1=sum[23] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.gate CCU2C A0=alu_in_1[20] A1=alu_in_1[21] B0=sum_CCU2C_S0_B0[20] B1=sum_CCU2C_S0_B0[21] C0=$false C1=$false CIN=sum_CCU2C_S0_COUT[20] COUT=sum_CCU2C_S0_COUT[22] D0=$true D1=$true S0=sum[20] S1=sum[21] -.attr module_not_derived 00000000000000000000000000000001 -.attr src "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" -.param INIT0 1001011010101010 -.param INIT1 1001011010101010 -.param INJECT1_0 "NO" -.param INJECT1_1 "NO" -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[4] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B[1] -1 1 -.names alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B[2] -1 1 -.names alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] -1 1 -.names alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] -1 1 -.names alu_in_2[1] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] -1 1 -.names alu_in_2[2] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[5] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[6] -1 1 -.names alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[2] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] -1 1 -.names alu_in_2[3] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] -1 1 -.names alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[4] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[5] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD[2] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[1] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[2] -1 1 -.names alu_in_2[5] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[3] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[4] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[0] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[1] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[4] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] -1 1 -.names alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[5] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[6] -1 1 -.names alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[3] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_Z_1_D[0] -1 1 -.names alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[2] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_Z_1_D[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_Z_1_D[2] -1 1 -.names alu_in_2[1] alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[4] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[5] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[6] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A[0] alu_output_LUT4_Z_3_C_LUT4_Z_C[0] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] alu_output_LUT4_Z_3_C_LUT4_Z_C[1] -1 1 -.names alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[0] alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B[0] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B[2] -1 1 -.names alu_in_1[7] alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[0] -1 1 -.names alu_in_1[8] alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[1] -1 1 -.names alu_in_2[0] alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[3] -1 1 -.names alu_in_2[1] alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[4] -1 1 -.names alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[1] -1 1 -.names alu_in_2[3] alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[2] -1 1 -.names alu_in_2[2] alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[3] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[2] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[1] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B[1] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B[2] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[0] alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[0] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[1] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[2] -1 1 -.names sum[21] alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[3] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[2] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[1] -1 1 -.names alu_in_2[3] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[3] -1 1 -.names alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[4] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[5] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] alu_output_LUT4_Z_A[2] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[0] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[2] -1 1 -.names sum[14] alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[3] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] alu_output_LUT4_Z_A_LUT4_Z_A[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[4] alu_output_LUT4_Z_10_B_LUT4_Z_1_B[0] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] alu_output_LUT4_Z_10_B_LUT4_Z_1_B[3] -1 1 -.names alu_in_1[29] alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_D[0] -1 1 -.names alu_in_2[29] alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_D[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_D[2] -1 1 -.names sum[9] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[1] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] alu_output_LUT4_Z_10_B_LUT4_Z_2_A[3] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] alu_output_PFUMX_Z_1_C0_LUT4_Z_A[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[0] alu_output_LUT4_Z_A_LUT4_Z_1_B[0] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[4] alu_output_LUT4_Z_A_LUT4_Z_1_B[2] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] alu_output_LUT4_Z_A_LUT4_Z_1_B[3] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[3] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[4] -1 1 -.names alu_in_2[3] alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[2] -1 1 -.names alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[3] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[3] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] -1 1 -.names alu_in_2[1] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[5] -1 1 -.names alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[2] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[4] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[5] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] alu_output_PFUMX_Z_10_C0[2] -1 1 -.names alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] -1 1 -.names alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] -1 1 -.names alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] -1 1 -.names alu_in_2[1] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[5] -1 1 -.names alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] alu_output_LUT4_Z_8_A_LUT4_Z_1_A[2] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_1_B_LUT4_Z_C[0] -1 1 -.names sum[28] alu_output_LUT4_Z_1_B_LUT4_Z_C[1] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[6] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[0] -1 1 -.names sum[24] alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[1] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] alu_output_PFUMX_Z_9_C0[2] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] alu_output_LUT4_Z_A_L6MUX21_Z_SD[1] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_A_L6MUX21_Z_SD[3] -1 1 -.names alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[0] alu_output_LUT4_Z_4_C[0] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] alu_output_LUT4_Z_4_C[1] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] alu_output_PFUMX_Z_3_C0[2] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[3] -1 1 -.names alu_in_2[3] alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[4] -1 1 -.names alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_B_Z[1] -1 1 -.names alu_op_i[2] alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[0] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[3] -1 1 -.names alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B[0] alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[1] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[2] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_3_C[0] -1 1 -.names sum[20] alu_output_LUT4_Z_3_C[1] -1 1 -.names alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[2] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] -1 1 -.names alu_in_2[1] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] -1 1 -.names alu_in_2[2] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[4] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[5] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] alu_output_LUT4_Z_4_C_PFUMX_Z_C0[0] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_4_C_PFUMX_Z_C0[2] -1 1 -.names sum[19] alu_output_LUT4_Z_4_C_PFUMX_Z_C0[3] -1 1 -.names alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[3] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[4] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[5] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[0] -1 1 -.names sum[16] alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[1] -1 1 -.names alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[0] -1 1 -.names alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[1] -1 1 -.names alu_in_2[1] alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[4] -1 1 -.names alu_in_2[2] alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[5] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[6] -1 1 -.names alu_in_2[3] alu_output_LUT4_Z_1_B_LUT4_Z_1_A[4] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_1_B_LUT4_Z_1_A[5] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[0] alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[3] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_10_B_LUT4_Z_C[0] -1 1 -.names sum[8] alu_output_LUT4_Z_10_B_LUT4_Z_C[1] -1 1 -.names alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[0] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z_LUT4_Z_1_A[1] -1 1 -.names alu_in_2[1] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z_LUT4_Z_1_A[2] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z_LUT4_Z_1_A[3] -1 1 -.names alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[2] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[4] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[3] -1 1 -.names alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] alu_output_LUT4_Z_9_B_LUT4_Z_1_B[3] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[4] alu_output_LUT4_Z_9_B_LUT4_Z_1_B[4] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] alu_output_LUT4_Z_9_B_LUT4_Z_1_B[5] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[5] -1 1 -.names alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[6] -1 1 -.names alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] alu_output_LUT4_Z_A_LUT4_Z_1_C[0] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] alu_output_LUT4_Z_A_LUT4_Z_1_C[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] alu_output_LUT4_Z_A_LUT4_Z_1_C[2] -1 1 -.names alu_in_2[1] alu_output_LUT4_Z_A_LUT4_Z_1_C[5] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_LUT4_Z_A_LUT4_Z_1_C[6] -1 1 -.names alu_in_2[3] alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] -1 1 -.names alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[4] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[5] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] -1 1 -.names alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] -1 1 -.names alu_in_2[1] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[4] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[5] -1 1 -.names alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[0] -1 1 -.names alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[4] alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[4] -1 1 -.names alu_in_2[1] alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[5] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[6] -1 1 -.names sum[31] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[1] -1 1 -.names sum[0] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[2] -1 1 -.names alu_op_i[0] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[3] -1 1 -.names alu_op_i[1] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[4] -1 1 -.names alu_op_i[2] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B[1] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[0] -1 1 -.names sum[3] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[0] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[1] -1 1 -.names alu_in_2[3] alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[4] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[5] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_9_B_LUT4_Z_C[0] -1 1 -.names sum[11] alu_output_LUT4_Z_9_B_LUT4_Z_C[1] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_PFUMX_Z_3_C0_LUT4_Z_C[0] -1 1 -.names sum[26] alu_output_PFUMX_Z_3_C0_LUT4_Z_C[1] -1 1 -.names alu_in_1[26] alu_output_LUT4_Z_7_A_LUT4_Z_A[2] -1 1 -.names alu_in_2[26] alu_output_LUT4_Z_7_A_LUT4_Z_A[3] -1 1 -.names alu_in_2[3] alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[3] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[4] -1 1 -.names alu_in_2[5] alu_output_LUT4_Z_5_B_LUT4_Z_A[3] -1 1 -.names alu_in_2[4] alu_output_LUT4_Z_5_B_LUT4_Z_A[4] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] alu_output_LUT4_Z_5_B_LUT4_Z_A[5] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_12_C_LUT4_Z_C[0] -1 1 -.names sum[2] alu_output_LUT4_Z_12_C_LUT4_Z_C[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] alu_output_LUT4_Z_12_C[0] -1 1 -.names alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_12_C[1] -1 1 -.names alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[2] alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[0] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[3] -1 1 -.names alu_in_2[3] alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[4] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] -1 1 -.names alu_in_2[1] alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] -1 1 -.names alu_in_2[13] alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[0] -1 1 -.names alu_in_1[13] alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[1] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[3] -1 1 -.names sum[13] alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[4] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[0] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[1] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[2] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[4] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[4] alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[5] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] alu_output_LUT4_Z_8_A[1] -1 1 -.names alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[1] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[4] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[0] -1 1 -.names sum[1] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[1] -1 1 -.names alu_in_1[17] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_LUT4_Z_1_D[0] -1 1 -.names alu_in_2[17] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_LUT4_Z_1_D[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_LUT4_Z_1_D[2] -1 1 -.names alu_in_1[5] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[0] -1 1 -.names alu_in_1[6] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[1] -1 1 -.names alu_in_2[0] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[3] -1 1 -.names alu_in_2[1] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[4] -1 1 -.names alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[0] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A[1] -1 1 -.names alu_in_2[3] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A[2] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A[3] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_11_C_LUT4_Z_C[0] -1 1 -.names sum[5] alu_output_LUT4_Z_11_C_LUT4_Z_C[1] -1 1 -.names alu_in_2[3] alu_output_LUT4_Z_8_A_LUT4_Z_1_C[2] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_8_A_LUT4_Z_1_C[3] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[0] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[0] -1 1 -.names alu_in_2[3] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[2] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[3] -1 1 -.names alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[4] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] alu_output_LUT4_Z_5_B[1] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[1] -1 1 -.names alu_in_2[3] alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[3] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[1] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[4] -1 1 -.names alu_output_LUT4_Z_5_B_LUT4_Z_A[2] alu_output_LUT4_Z_5_B_LUT4_Z_C[0] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] alu_output_LUT4_Z_5_B_LUT4_Z_C[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] alu_output_LUT4_Z_11_C[0] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[0] alu_output_LUT4_Z_11_C[1] -1 1 -.names alu_in_2[3] alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[4] -1 1 -.names alu_in_2[2] alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[5] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[2] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[3] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[4] alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[4] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[1] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[6] -1 1 -.names alu_in_1[3] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[0] -1 1 -.names alu_in_1[4] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[1] -1 1 -.names alu_in_2[0] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[3] -1 1 -.names alu_in_2[1] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[4] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[3] -1 1 -.names alu_in_2[3] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[4] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[3] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[0] -1 1 -.names sum[4] alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[1] -1 1 -.names alu_in_2[18] alu_output_LUT4_Z_5_B_LUT4_Z_C_LUT4_Z_1_B[1] -1 1 -.names alu_output_LUT4_Z_7_A_LUT4_Z_A[1] alu_output_LUT4_Z_5_B_LUT4_Z_C_LUT4_Z_1_B[2] -1 1 -.names alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[1] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[2] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_PFUMX_Z_10_C0_LUT4_Z_C[0] -1 1 -.names sum[10] alu_output_PFUMX_Z_10_C0_LUT4_Z_C[1] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] alu_output_LUT4_Z_3_C_LUT4_Z_A[1] -1 1 -.names alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] alu_output_LUT4_Z_3_C_LUT4_Z_A[4] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[2] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[4] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[3] -1 1 -.names alu_in_1[31] alu_output_PFUMX_Z_C0_PFUMX_Z_C0_LUT4_Z_D[0] -1 1 -.names alu_in_2[31] alu_output_PFUMX_Z_C0_PFUMX_Z_C0_LUT4_Z_D[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] alu_output_PFUMX_Z_C0_PFUMX_Z_C0_LUT4_Z_D[2] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] alu_output_PFUMX_Z_C0_PFUMX_Z_C0[0] -1 1 -.names alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[1] alu_output_PFUMX_Z_C0_PFUMX_Z_C0[1] -1 1 -.names alu_in_2[3] alu_output_PFUMX_Z_C0_PFUMX_Z_C0[2] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] alu_output_PFUMX_Z_2_C0[3] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[4] alu_output_LUT4_Z_9_B_LUT4_Z_1_C[0] -1 1 -.names alu_output_LUT4_Z_9_B_LUT4_Z_1_B[0] alu_output_LUT4_Z_9_B_LUT4_Z_1_C[1] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] alu_output_LUT4_Z_9_B_LUT4_Z_1_C[3] -1 1 -.names alu_in_2[16] complement2_LUT4_C_D[0] -1 1 -.names complement2[16] complement2_LUT4_C_D[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[0] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[3] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[2] -1 1 -.names alu_in_2[1] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[4] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[5] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[0] -1 1 -.names alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[1] -1 1 -.names alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[2] -1 1 -.names alu_in_2[1] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[4] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[5] -1 1 -.names alu_output_PFUMX_Z_C0_LUT4_Z_1_A[1] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B[0] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B[2] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B[3] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] alu_output_PFUMX_Z_2_C0_LUT4_Z_B[1] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[0] -1 1 -.names sum[7] alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[4] alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[0] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_PFUMX_Z_C0_LUT4_Z_1_A[2] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[1] alu_output_PFUMX_Z_C0_LUT4_Z_A[0] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] alu_output_PFUMX_Z_C0_LUT4_Z_A[2] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[0] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[1] -1 1 -.names alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[2] -1 1 -.names alu_in_2[1] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[5] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[6] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[1] -1 1 -.names alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[3] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[2] -1 1 -.names alu_in_2[1] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[3] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[4] -1 1 -.names alu_in_1[30] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[0] -1 1 -.names alu_in_1[31] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[1] -1 1 -.names alu_in_2[0] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[3] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[4] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[5] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[6] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] alu_output_PFUMX_Z_C0_LUT4_Z_2_B[2] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] alu_output_PFUMX_Z_C0[3] -1 1 -.names alu_in_1[30] alu_output_PFUMX_Z_1_C0_LUT4_Z_C_LUT4_Z_D[0] -1 1 -.names alu_in_2[30] alu_output_PFUMX_Z_1_C0_LUT4_Z_C_LUT4_Z_D[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] alu_output_PFUMX_Z_1_C0_LUT4_Z_C_LUT4_Z_D[2] -1 1 -.names alu_output_PFUMX_Z_1_C0_LUT4_Z_A[0] alu_output_PFUMX_Z_1_C0_LUT4_Z_C[0] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] alu_output_PFUMX_Z_1_C0_LUT4_Z_C[1] -1 1 -.names alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[3] alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[0] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[2] -1 1 -.names alu_in_2[1] alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[3] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[4] -1 1 -.names alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[1] alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C[0] -1 1 -.names alu_in_2[2] alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C[1] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C[3] -1 1 -.names alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[0] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[2] -1 1 -.names alu_in_2[3] alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[3] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] alu_output_PFUMX_Z_1_C0[3] -1 1 -.names alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[0] alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B[1] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B[2] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[4] alu_output_PFUMX_Z_C0_LUT4_Z_B[1] -1 1 -.names alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] alu_output_PFUMX_Z_C0_LUT4_Z_B[2] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[3] alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] -1 1 -.names alu_in_2[1] alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[5] -1 1 -.names alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] alu_output_LUT4_Z_8_A_LUT4_Z_C[0] -1 1 -.names sum[12] alu_output_LUT4_Z_8_A_LUT4_Z_C[1] -1 1 -.names alu_output_LUT4_Z_A_LUT4_Z_1_C[4] alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[0] -1 1 -.names alu_in_2[31] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[0] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[2] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[1] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[3] -1 1 -.names alu_in_2[1] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[4] -1 1 -.names alu_in_2[2] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[5] -1 1 -.names alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[6] -1 1 -.names alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[0] alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A[1] -1 1 -.names alu_in_2[2] alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A[2] -1 1 -.names alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] alu_output_PFUMX_Z_9_C0_LUT4_Z_A[2] -1 1 -.names alu_in_2[3] alu_output_PFUMX_Z_9_C0_LUT4_Z_A[3] -1 1 -.names $true alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[0] -1 1 -.names alu_in_2[2] alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[2] -1 1 -.names $false complement2_CCU2C_S0_COUT[0] -1 1 -.names complement2_CCU2C_S0_B0[0] complement2_CCU2C_S0_COUT[1] -1 1 -.names complement2_CCU2C_S0_B0[0] complement2_CCU2C_S0_3_COUT[0] -1 1 -.names complement2_CCU2C_S0_COUT[2] complement2_CCU2C_S0_3_COUT[1] -1 1 -.names complement2_CCU2C_S0_COUT[3] complement2_CCU2C_S0_3_COUT[2] -1 1 -.names complement2_CCU2C_S0_COUT[4] complement2_CCU2C_S0_3_COUT[3] -1 1 -.names complement2_CCU2C_S0_COUT[5] complement2_CCU2C_S0_3_COUT[4] -1 1 -.names complement2_CCU2C_S0_COUT[6] complement2_CCU2C_S0_3_COUT[5] -1 1 -.names complement2_CCU2C_S0_COUT[7] complement2_CCU2C_S0_3_COUT[6] -1 1 -.names complement2_CCU2C_S0_COUT[8] complement2_CCU2C_S0_3_COUT[7] -1 1 -.names complement2_CCU2C_S0_COUT[9] complement2_CCU2C_S0_3_COUT[8] -1 1 -.names complement2_CCU2C_S0_COUT[10] complement2_CCU2C_S0_3_COUT[9] -1 1 -.names complement2_CCU2C_S0_COUT[11] complement2_CCU2C_S0_3_COUT[10] -1 1 -.names complement2_CCU2C_S0_COUT[12] complement2_CCU2C_S0_3_COUT[11] -1 1 -.names complement2_CCU2C_S0_COUT[13] complement2_CCU2C_S0_3_COUT[12] -1 1 -.names complement2_CCU2C_S0_COUT[14] complement2_CCU2C_S0_3_COUT[13] -1 1 -.names complement2_CCU2C_S0_COUT[15] complement2_CCU2C_S0_3_COUT[14] -1 1 -.names complement2_CCU2C_S0_COUT[16] complement2_CCU2C_S0_3_COUT[15] -1 1 -.names complement2_CCU2C_S0_COUT[17] complement2_CCU2C_S0_3_COUT[16] -1 1 -.names complement2_CCU2C_S0_COUT[18] complement2_CCU2C_S0_3_COUT[17] -1 1 -.names complement2_CCU2C_S0_COUT[19] complement2_CCU2C_S0_3_COUT[18] -1 1 -.names complement2_CCU2C_S0_COUT[20] complement2_CCU2C_S0_3_COUT[19] -1 1 -.names complement2_CCU2C_S0_COUT[21] complement2_CCU2C_S0_3_COUT[20] -1 1 -.names complement2_CCU2C_S0_COUT[22] complement2_CCU2C_S0_3_COUT[21] -1 1 -.names complement2_CCU2C_S0_COUT[23] complement2_CCU2C_S0_3_COUT[22] -1 1 -.names complement2_CCU2C_S0_COUT[24] complement2_CCU2C_S0_3_COUT[23] -1 1 -.names complement2_CCU2C_S0_COUT[25] complement2_CCU2C_S0_3_COUT[24] -1 1 -.names complement2_CCU2C_S0_COUT[26] complement2_CCU2C_S0_3_COUT[25] -1 1 -.names complement2_CCU2C_S0_COUT[27] complement2_CCU2C_S0_3_COUT[26] -1 1 -.names complement2_CCU2C_S0_COUT[28] complement2_CCU2C_S0_3_COUT[27] -1 1 -.names complement2_CCU2C_S0_COUT[29] complement2_CCU2C_S0_3_COUT[28] -1 1 -.names complement2_CCU2C_S0_COUT[30] complement2_CCU2C_S0_3_COUT[29] -1 1 -.names complement2_CCU2C_S0_COUT[31] complement2_CCU2C_S0_3_COUT[30] -1 1 -.names $false sum_CCU2C_S0_COUT[0] -1 1 -.names sum_CCU2C_S0_COUT[1] sum_CCU2C_S0_3_COUT[0] -1 1 -.names sum_CCU2C_S0_COUT[2] sum_CCU2C_S0_3_COUT[1] -1 1 -.names sum_CCU2C_S0_COUT[3] sum_CCU2C_S0_3_COUT[2] -1 1 -.names sum_CCU2C_S0_COUT[4] sum_CCU2C_S0_3_COUT[3] -1 1 -.names sum_CCU2C_S0_COUT[5] sum_CCU2C_S0_3_COUT[4] -1 1 -.names sum_CCU2C_S0_COUT[6] sum_CCU2C_S0_3_COUT[5] -1 1 -.names sum_CCU2C_S0_COUT[7] sum_CCU2C_S0_3_COUT[6] -1 1 -.names sum_CCU2C_S0_COUT[8] sum_CCU2C_S0_3_COUT[7] -1 1 -.names sum_CCU2C_S0_COUT[9] sum_CCU2C_S0_3_COUT[8] -1 1 -.names sum_CCU2C_S0_COUT[10] sum_CCU2C_S0_3_COUT[9] -1 1 -.names sum_CCU2C_S0_COUT[11] sum_CCU2C_S0_3_COUT[10] -1 1 -.names sum_CCU2C_S0_COUT[12] sum_CCU2C_S0_3_COUT[11] -1 1 -.names sum_CCU2C_S0_COUT[13] sum_CCU2C_S0_3_COUT[12] -1 1 -.names sum_CCU2C_S0_COUT[14] sum_CCU2C_S0_3_COUT[13] -1 1 -.names sum_CCU2C_S0_COUT[15] sum_CCU2C_S0_3_COUT[14] -1 1 -.names sum_CCU2C_S0_COUT[16] sum_CCU2C_S0_3_COUT[15] -1 1 -.names sum_CCU2C_S0_COUT[17] sum_CCU2C_S0_3_COUT[16] -1 1 -.names sum_CCU2C_S0_COUT[18] sum_CCU2C_S0_3_COUT[17] -1 1 -.names sum_CCU2C_S0_COUT[19] sum_CCU2C_S0_3_COUT[18] -1 1 -.names sum_CCU2C_S0_COUT[20] sum_CCU2C_S0_3_COUT[19] -1 1 -.names sum_CCU2C_S0_COUT[21] sum_CCU2C_S0_3_COUT[20] -1 1 -.names sum_CCU2C_S0_COUT[22] sum_CCU2C_S0_3_COUT[21] -1 1 -.names sum_CCU2C_S0_COUT[23] sum_CCU2C_S0_3_COUT[22] -1 1 -.names sum_CCU2C_S0_COUT[24] sum_CCU2C_S0_3_COUT[23] -1 1 -.names sum_CCU2C_S0_COUT[25] sum_CCU2C_S0_3_COUT[24] -1 1 -.names sum_CCU2C_S0_COUT[26] sum_CCU2C_S0_3_COUT[25] -1 1 -.names sum_CCU2C_S0_COUT[27] sum_CCU2C_S0_3_COUT[26] -1 1 -.names sum_CCU2C_S0_COUT[28] sum_CCU2C_S0_3_COUT[27] -1 1 -.names sum_CCU2C_S0_COUT[29] sum_CCU2C_S0_3_COUT[28] -1 1 -.names sum_CCU2C_S0_COUT[30] sum_CCU2C_S0_3_COUT[29] -1 1 -.names sum_CCU2C_S0_COUT[31] sum_CCU2C_S0_3_COUT[30] -1 1 -.end diff --git a/verilog/alu/v6/alu6.v b/verilog/alu/v6/alu6.v deleted file mode 100644 index 2f0f00c..0000000 --- a/verilog/alu/v6/alu6.v +++ /dev/null @@ -1,30 +0,0 @@ -`default_nettype none -`timescale 1us/1ns - -`include "aluOp.vh" - -module alu6 -( -input wire [31:0] alu_in_1, -input wire[31:0] alu_in_2, -input wire[3:0] alu_op_i, -output wire[31:0] alu_output -); - -wire [31:0] complement2 = ~alu_in_2 + 1'b1; -wire [31:0] sum = alu_in_1 + (alu_op_i[3] | (alu_op_i[1] & ~alu_op_i[0]) == 1'b1 ? complement2 : alu_in_2); -wire [31:0] right = alu_in_1 >> alu_in_2[5:0] | (alu_op_i[3] == 0 ? 32'b0 : - (32'hFFFFFFFF << (alu_in_2[31] == 1'b1 ? 5'b0 : {~alu_in_2[4] , ~alu_in_2[3], ~alu_in_2[2], ~alu_in_2[1], ~alu_in_2[0]}))); - -assign alu_output = - alu_op_i[2:0] == `ADDSUB ? sum : - alu_op_i[2:0] == `XOR ? alu_in_1 ^ alu_in_2 : - alu_op_i[2:0] == `OR ? alu_in_1 | alu_in_2 : - alu_op_i[2:0] == `AND ? alu_in_1 & alu_in_2 : - alu_op_i[2:0] == `SLL ? alu_in_2[6] == 1 ? 32'b0 : alu_in_1 << alu_in_2[5:0] : - alu_op_i[2:0] == `SR ? right : - alu_op_i[2:0] == `SLT ? {31'b0, sum[31]} : - alu_op_i[2:0] == `SLTU ? (alu_in_1 < alu_in_2 ? 32'b1 : 32'b0) : - 32'b0; -endmodule - diff --git a/verilog/alu/v6/aluOp.h b/verilog/alu/v6/aluOp.h deleted file mode 100644 index 999dac2..0000000 --- a/verilog/alu/v6/aluOp.h +++ /dev/null @@ -1,16 +0,0 @@ -#ifndef ALU_OP -#define ALU_OP - -#define ADD 0 -#define SUB 8 -#define XOR 4 -#define OR 6 -#define AND 7 -#define SLL 1 -#define SRL 5 -#define SRA 13 -#define SLT 2 -#define SLTU 3 -#define NONE 15 - -#endif diff --git a/verilog/alu/v6/aluOp.vh b/verilog/alu/v6/aluOp.vh deleted file mode 100644 index 0e8c41a..0000000 --- a/verilog/alu/v6/aluOp.vh +++ /dev/null @@ -1,14 +0,0 @@ -`ifndef ALU_OP -`define ALU_OP -// 1st bit that is no longer there == SUB/SRA/NONE -`define ADDSUB 3'b000 -`define XOR 3'b100 -`define OR 3'b110 -`define AND 3'b111 -`define SLL 3'b001 -`define SR 3'b101 -`define SLT 3'b010 -`define SLTU 3'b011 -`define NONE 3'b111 - -`endif diff --git a/verilog/alu/v6/crab.pcf b/verilog/alu/v6/crab.pcf deleted file mode 100644 index c0d91c5..0000000 --- a/verilog/alu/v6/crab.pcf +++ /dev/null @@ -1,254 +0,0 @@ -LOCATE COMP "clk48" SITE "A9"; -IOBUF PORT "clk48" IO_TYPE=LVCMOS33; -FREQUENCY PORT "clk48" 48.0 MHz; - -LOCATE COMP "ddram_a[0]" SITE "C4"; -IOBUF PORT "ddram_a[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[1]" SITE "D2"; -IOBUF PORT "ddram_a[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[2]" SITE "D3"; -IOBUF PORT "ddram_a[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[2]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[3]" SITE "A3"; -IOBUF PORT "ddram_a[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[3]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[4]" SITE "A4"; -IOBUF PORT "ddram_a[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[4]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[5]" SITE "D4"; -IOBUF PORT "ddram_a[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[5]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[6]" SITE "C3"; -IOBUF PORT "ddram_a[6]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[6]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[7]" SITE "B2"; -IOBUF PORT "ddram_a[7]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[7]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[8]" SITE "B1"; -IOBUF PORT "ddram_a[8]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[8]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[9]" SITE "D1"; -IOBUF PORT "ddram_a[9]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[9]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[10]" SITE "A7"; -IOBUF PORT "ddram_a[10]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[10]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[11]" SITE "C2"; -IOBUF PORT "ddram_a[11]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[11]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[12]" SITE "B6"; -IOBUF PORT "ddram_a[12]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[12]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[13]" SITE "C1"; -IOBUF PORT "ddram_a[13]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[13]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[14]" SITE "A2"; -IOBUF PORT "ddram_a[14]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[14]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_a[15]" SITE "C7"; -IOBUF PORT "ddram_a[15]" SLEWRATE=FAST; -IOBUF PORT "ddram_a[15]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[0]" SITE "D6"; -IOBUF PORT "ddram_ba[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[1]" SITE "B7"; -IOBUF PORT "ddram_ba[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ba[2]" SITE "A6"; -IOBUF PORT "ddram_ba[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_ba[2]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_ras_n" SITE "C12"; -IOBUF PORT "ddram_ras_n" SLEWRATE=FAST; -IOBUF PORT "ddram_ras_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_cas_n" SITE "D13"; -IOBUF PORT "ddram_cas_n" SLEWRATE=FAST; -IOBUF PORT "ddram_cas_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_we_n" SITE "B12"; -IOBUF PORT "ddram_we_n" SLEWRATE=FAST; -IOBUF PORT "ddram_we_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_cs_n" SITE "A12"; -IOBUF PORT "ddram_cs_n" SLEWRATE=FAST; -IOBUF PORT "ddram_cs_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dm[0]" SITE "D16"; -IOBUF PORT "ddram_dm[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dm[0]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dm[1]" SITE "G16"; -IOBUF PORT "ddram_dm[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dm[1]" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_dq[0]" SITE "C17"; -IOBUF PORT "ddram_dq[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[0]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[0]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[1]" SITE "D15"; -IOBUF PORT "ddram_dq[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[1]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[1]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[2]" SITE "B17"; -IOBUF PORT "ddram_dq[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[2]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[2]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[3]" SITE "C16"; -IOBUF PORT "ddram_dq[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[3]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[3]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[4]" SITE "A15"; -IOBUF PORT "ddram_dq[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[4]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[4]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[5]" SITE "B13"; -IOBUF PORT "ddram_dq[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[5]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[5]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[6]" SITE "A17"; -IOBUF PORT "ddram_dq[6]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[6]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[6]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[7]" SITE "A13"; -IOBUF PORT "ddram_dq[7]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[7]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[7]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[8]" SITE "F17"; -IOBUF PORT "ddram_dq[8]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[8]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[8]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[9]" SITE "F16"; -IOBUF PORT "ddram_dq[9]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[9]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[9]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[10]" SITE "G15"; -IOBUF PORT "ddram_dq[10]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[10]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[10]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[11]" SITE "F15"; -IOBUF PORT "ddram_dq[11]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[11]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[11]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[12]" SITE "J16"; -IOBUF PORT "ddram_dq[12]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[12]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[12]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[13]" SITE "C18"; -IOBUF PORT "ddram_dq[13]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[13]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[13]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[14]" SITE "H16"; -IOBUF PORT "ddram_dq[14]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[14]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[14]" TERMINATION=OFF; -LOCATE COMP "ddram_dq[15]" SITE "F18"; -IOBUF PORT "ddram_dq[15]" SLEWRATE=FAST; -IOBUF PORT "ddram_dq[15]" IO_TYPE=SSTL135_I; -IOBUF PORT "ddram_dq[15]" TERMINATION=OFF; -LOCATE COMP "ddram_dqs_p[0]" SITE "B15"; -IOBUF PORT "ddram_dqs_p[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_dqs_p[0]" IO_TYPE=SSTL135D_I; -IOBUF PORT "ddram_dqs_p[0]" TERMINATION=OFF; -IOBUF PORT "ddram_dqs_p[0]" DIFFRESISTOR=100; -LOCATE COMP "ddram_dqs_p[1]" SITE "G18"; -IOBUF PORT "ddram_dqs_p[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_dqs_p[1]" IO_TYPE=SSTL135D_I; -IOBUF PORT "ddram_dqs_p[1]" TERMINATION=OFF; -IOBUF PORT "ddram_dqs_p[1]" DIFFRESISTOR=100; -LOCATE COMP "ddram_clk_p" SITE "J18"; -IOBUF PORT "ddram_clk_p" SLEWRATE=FAST; -IOBUF PORT "ddram_clk_p" IO_TYPE=SSTL135D_I; -LOCATE COMP "ddram_cke" SITE "D18"; -IOBUF PORT "ddram_cke" SLEWRATE=FAST; -IOBUF PORT "ddram_cke" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_odt" SITE "C13"; -IOBUF PORT "ddram_odt" SLEWRATE=FAST; -IOBUF PORT "ddram_odt" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_reset_n" SITE "L18"; -IOBUF PORT "ddram_reset_n" SLEWRATE=FAST; -IOBUF PORT "ddram_reset_n" IO_TYPE=SSTL135_I; -LOCATE COMP "ddram_vccio[0]" SITE "K16"; -IOBUF PORT "ddram_vccio[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[0]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[1]" SITE "D17"; -IOBUF PORT "ddram_vccio[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[1]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[2]" SITE "K15"; -IOBUF PORT "ddram_vccio[2]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[2]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[3]" SITE "K17"; -IOBUF PORT "ddram_vccio[3]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[3]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[4]" SITE "B18"; -IOBUF PORT "ddram_vccio[4]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[4]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_vccio[5]" SITE "C6"; -IOBUF PORT "ddram_vccio[5]" SLEWRATE=FAST; -IOBUF PORT "ddram_vccio[5]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_gnd[0]" SITE "L15"; -IOBUF PORT "ddram_gnd[0]" SLEWRATE=FAST; -IOBUF PORT "ddram_gnd[0]" IO_TYPE=SSTL135_II; -LOCATE COMP "ddram_gnd[1]" SITE "L16"; -IOBUF PORT "ddram_gnd[1]" SLEWRATE=FAST; -IOBUF PORT "ddram_gnd[1]" IO_TYPE=SSTL135_II; -LOCATE COMP "rgb_led0_r" SITE "K4"; -IOBUF PORT "rgb_led0_r" IO_TYPE=LVCMOS33; -LOCATE COMP "rgb_led0_g" SITE "M3"; -IOBUF PORT "rgb_led0_g" IO_TYPE=LVCMOS33; -LOCATE COMP "rgb_led0_b" SITE "J3"; -IOBUF PORT "rgb_led0_b" IO_TYPE=LVCMOS33; -LOCATE COMP "gpio_0" SITE "N17"; -IOBUF PORT "gpio_0" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_0" PULLMODE=DOWN; -LOCATE COMP "gpio_1" SITE "M18"; -IOBUF PORT "gpio_1" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_1" PULLMODE=DOWN; -LOCATE COMP "gpio_5" SITE "B10"; -IOBUF PORT "gpio_5" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_5" PULLMODE=DOWN; -LOCATE COMP "gpio_6" SITE "B9"; -IOBUF PORT "gpio_6" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_6" PULLMODE=DOWN; -LOCATE COMP "gpio_9" SITE "C8"; -IOBUF PORT "gpio_9" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_9" PULLMODE=DOWN; -LOCATE COMP "gpio_10" SITE "B8"; -IOBUF PORT "gpio_10" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_10" PULLMODE=DOWN; -LOCATE COMP "gpio_11" SITE "A8"; -IOBUF PORT "gpio_11" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_11" PULLMODE=DOWN; -LOCATE COMP "gpio_12" SITE "H2"; -IOBUF PORT "gpio_12" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_12" PULLMODE=DOWN; -LOCATE COMP "gpio_13" SITE "J2"; -IOBUF PORT "gpio_13" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_13" PULLMODE=DOWN; -LOCATE COMP "gpio_a0" SITE "L4"; -IOBUF PORT "gpio_a0" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a0" PULLMODE=DOWN; -LOCATE COMP "gpio_a1" SITE "N3"; -IOBUF PORT "gpio_a1" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a1" PULLMODE=DOWN; -LOCATE COMP "gpio_a2" SITE "N4"; -IOBUF PORT "gpio_a2" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a2" PULLMODE=DOWN; -LOCATE COMP "gpio_a3" SITE "H4"; -IOBUF PORT "gpio_a3" IO_TYPE=LVCMOS33; -IOBUF PORT "gpio_a3" PULLMODE=DOWN; -LOCATE COMP "usr_btn" SITE "J17"; -IOBUF PORT "usr_btn" IO_TYPE=SSTL135_I; -LOCATE COMP "rst_n" SITE "V17"; -IOBUF PORT "rst_n" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_cs_n" SITE "U17"; -IOBUF PORT "spiflash4x_cs_n" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[0]" SITE "U18"; -IOBUF PORT "spiflash4x_dq[0]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[1]" SITE "T18"; -IOBUF PORT "spiflash4x_dq[1]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[2]" SITE "R18"; -IOBUF PORT "spiflash4x_dq[2]" IO_TYPE=LVCMOS33; -LOCATE COMP "spiflash4x_dq[3]" SITE "N18"; -IOBUF PORT "spiflash4x_dq[3]" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_d_p" SITE "N1"; -IOBUF PORT "usb_d_p" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_d_n" SITE "M2"; -IOBUF PORT "usb_d_n" IO_TYPE=LVCMOS33; -LOCATE COMP "usb_pullup" SITE "N2"; -IOBUF PORT "usb_pullup" IO_TYPE=LVCMOS33; diff --git a/verilog/alu/v6/shifter.v b/verilog/alu/v6/shifter.v deleted file mode 100644 index 7030a1c..0000000 --- a/verilog/alu/v6/shifter.v +++ /dev/null @@ -1,42 +0,0 @@ -`default_nettype none -`timescale 1us/1ns - -module rightshifter -( - input wire [31:0] shift, - input wire [31:0] number, - output wire [31:0] shifted -); - -always @ (*) -begin - if (number[5] == 1'b1) - begin - shifted = {32{number[31]}}; - end - else - begin - if (number[4] == 1'b1) - begin - shifted = {{16{number[31]}}, number[31:16]} - end - if (number[3] == 1'b1) - begin - shifted = {{8{number[31]}}, number[31:8]} - end - if (number[2] == 1'b1) - begin - shifted = {{4{number[31]}}, number[31:4]} - end - if (number[1] == 1'b1) - begin - shifted = {{2{number[31]}}, number[31:2]} - end - if (number[0] == 1'b1) - begin - shifted = {number[31], number[31:1]} - end - end -end - -endmodule diff --git a/verilog/alu/v6/synth_alu6.v b/verilog/alu/v6/synth_alu6.v deleted file mode 100644 index ba1f4ed..0000000 --- a/verilog/alu/v6/synth_alu6.v +++ /dev/null @@ -1,17083 +0,0 @@ -/* Generated by Yosys 0.15+70 (git sha1 48d7a6c47, gcc 11.2.0 -march=x86-64 -mtune=generic -O2 -fno-plt -fexceptions -fstack-clash-protection -fcf-protection -fPIC -Os) */ - -module alu6(\alu_in_1[0] , \alu_in_1[1] , \alu_in_1[2] , \alu_in_1[3] , \alu_in_1[4] , \alu_in_1[5] , \alu_in_1[6] , \alu_in_1[7] , \alu_in_1[8] , \alu_in_1[9] , \alu_in_1[10] , \alu_in_1[11] , \alu_in_1[12] , \alu_in_1[13] , \alu_in_1[14] , \alu_in_1[15] , \alu_in_1[16] , \alu_in_1[17] , \alu_in_1[18] , \alu_in_1[19] , \alu_in_1[20] -, \alu_in_1[21] , \alu_in_1[22] , \alu_in_1[23] , \alu_in_1[24] , \alu_in_1[25] , \alu_in_1[26] , \alu_in_1[27] , \alu_in_1[28] , \alu_in_1[29] , \alu_in_1[30] , \alu_in_1[31] , \alu_in_2[0] , \alu_in_2[1] , \alu_in_2[2] , \alu_in_2[3] , \alu_in_2[4] , \alu_in_2[5] , \alu_in_2[6] , \alu_in_2[7] , \alu_in_2[8] , \alu_in_2[9] -, \alu_in_2[10] , \alu_in_2[11] , \alu_in_2[12] , \alu_in_2[13] , \alu_in_2[14] , \alu_in_2[15] , \alu_in_2[16] , \alu_in_2[17] , \alu_in_2[18] , \alu_in_2[19] , \alu_in_2[20] , \alu_in_2[21] , \alu_in_2[22] , \alu_in_2[23] , \alu_in_2[24] , \alu_in_2[25] , \alu_in_2[26] , \alu_in_2[27] , \alu_in_2[28] , \alu_in_2[29] , \alu_in_2[30] -, \alu_in_2[31] , \alu_op_i[0] , \alu_op_i[1] , \alu_op_i[2] , \alu_op_i[3] , \alu_output[0] , \alu_output[1] , \alu_output[2] , \alu_output[3] , \alu_output[4] , \alu_output[5] , \alu_output[6] , \alu_output[7] , \alu_output[8] , \alu_output[9] , \alu_output[10] , \alu_output[11] , \alu_output[12] , \alu_output[13] , \alu_output[14] , \alu_output[15] -, \alu_output[16] , \alu_output[17] , \alu_output[18] , \alu_output[19] , \alu_output[20] , \alu_output[21] , \alu_output[22] , \alu_output[23] , \alu_output[24] , \alu_output[25] , \alu_output[26] , \alu_output[27] , \alu_output[28] , \alu_output[29] , \alu_output[30] , \alu_output[31] ); - wire _0000_; - wire _0001_; - wire _0002_; - input \alu_in_1[0] ; - wire \alu_in_1[0] ; - input \alu_in_1[10] ; - wire \alu_in_1[10] ; - input \alu_in_1[11] ; - wire \alu_in_1[11] ; - input \alu_in_1[12] ; - wire \alu_in_1[12] ; - input \alu_in_1[13] ; - wire \alu_in_1[13] ; - input \alu_in_1[14] ; - wire \alu_in_1[14] ; - input \alu_in_1[15] ; - wire \alu_in_1[15] ; - input \alu_in_1[16] ; - wire \alu_in_1[16] ; - input \alu_in_1[17] ; - wire \alu_in_1[17] ; - input \alu_in_1[18] ; - wire \alu_in_1[18] ; - input \alu_in_1[19] ; - wire \alu_in_1[19] ; - input \alu_in_1[1] ; - wire \alu_in_1[1] ; - input \alu_in_1[20] ; - wire \alu_in_1[20] ; - input \alu_in_1[21] ; - wire \alu_in_1[21] ; - input \alu_in_1[22] ; - wire \alu_in_1[22] ; - input \alu_in_1[23] ; - wire \alu_in_1[23] ; - input \alu_in_1[24] ; - wire \alu_in_1[24] ; - input \alu_in_1[25] ; - wire \alu_in_1[25] ; - input \alu_in_1[26] ; - wire \alu_in_1[26] ; - input \alu_in_1[27] ; - wire \alu_in_1[27] ; - input \alu_in_1[28] ; - wire \alu_in_1[28] ; - input \alu_in_1[29] ; - wire \alu_in_1[29] ; - input \alu_in_1[2] ; - wire \alu_in_1[2] ; - input \alu_in_1[30] ; - wire \alu_in_1[30] ; - input \alu_in_1[31] ; - wire \alu_in_1[31] ; - input \alu_in_1[3] ; - wire \alu_in_1[3] ; - input \alu_in_1[4] ; - wire \alu_in_1[4] ; - input \alu_in_1[5] ; - wire \alu_in_1[5] ; - input \alu_in_1[6] ; - wire \alu_in_1[6] ; - input \alu_in_1[7] ; - wire \alu_in_1[7] ; - input \alu_in_1[8] ; - wire \alu_in_1[8] ; - input \alu_in_1[9] ; - wire \alu_in_1[9] ; - input \alu_in_2[0] ; - wire \alu_in_2[0] ; - input \alu_in_2[10] ; - wire \alu_in_2[10] ; - input \alu_in_2[11] ; - wire \alu_in_2[11] ; - input \alu_in_2[12] ; - wire \alu_in_2[12] ; - input \alu_in_2[13] ; - wire \alu_in_2[13] ; - input \alu_in_2[14] ; - wire \alu_in_2[14] ; - input \alu_in_2[15] ; - wire \alu_in_2[15] ; - input \alu_in_2[16] ; - wire \alu_in_2[16] ; - input \alu_in_2[17] ; - wire \alu_in_2[17] ; - input \alu_in_2[18] ; - wire \alu_in_2[18] ; - input \alu_in_2[19] ; - wire \alu_in_2[19] ; - input \alu_in_2[1] ; - wire \alu_in_2[1] ; - input \alu_in_2[20] ; - wire \alu_in_2[20] ; - input \alu_in_2[21] ; - wire \alu_in_2[21] ; - input \alu_in_2[22] ; - wire \alu_in_2[22] ; - input \alu_in_2[23] ; - wire \alu_in_2[23] ; - input \alu_in_2[24] ; - wire \alu_in_2[24] ; - input \alu_in_2[25] ; - wire \alu_in_2[25] ; - input \alu_in_2[26] ; - wire \alu_in_2[26] ; - input \alu_in_2[27] ; - wire \alu_in_2[27] ; - input \alu_in_2[28] ; - wire \alu_in_2[28] ; - input \alu_in_2[29] ; - wire \alu_in_2[29] ; - input \alu_in_2[2] ; - wire \alu_in_2[2] ; - input \alu_in_2[30] ; - wire \alu_in_2[30] ; - input \alu_in_2[31] ; - wire \alu_in_2[31] ; - input \alu_in_2[3] ; - wire \alu_in_2[3] ; - input \alu_in_2[4] ; - wire \alu_in_2[4] ; - input \alu_in_2[5] ; - wire \alu_in_2[5] ; - input \alu_in_2[6] ; - wire \alu_in_2[6] ; - input \alu_in_2[7] ; - wire \alu_in_2[7] ; - input \alu_in_2[8] ; - wire \alu_in_2[8] ; - input \alu_in_2[9] ; - wire \alu_in_2[9] ; - input \alu_op_i[0] ; - wire \alu_op_i[0] ; - input \alu_op_i[1] ; - wire \alu_op_i[1] ; - input \alu_op_i[2] ; - wire \alu_op_i[2] ; - input \alu_op_i[3] ; - wire \alu_op_i[3] ; - output \alu_output[0] ; - wire \alu_output[0] ; - output \alu_output[10] ; - wire \alu_output[10] ; - output \alu_output[11] ; - wire \alu_output[11] ; - output \alu_output[12] ; - wire \alu_output[12] ; - output \alu_output[13] ; - wire \alu_output[13] ; - output \alu_output[14] ; - wire \alu_output[14] ; - output \alu_output[15] ; - wire \alu_output[15] ; - output \alu_output[16] ; - wire \alu_output[16] ; - output \alu_output[17] ; - wire \alu_output[17] ; - output \alu_output[18] ; - wire \alu_output[18] ; - output \alu_output[19] ; - wire \alu_output[19] ; - output \alu_output[1] ; - wire \alu_output[1] ; - output \alu_output[20] ; - wire \alu_output[20] ; - output \alu_output[21] ; - wire \alu_output[21] ; - output \alu_output[22] ; - wire \alu_output[22] ; - output \alu_output[23] ; - wire \alu_output[23] ; - output \alu_output[24] ; - wire \alu_output[24] ; - output \alu_output[25] ; - wire \alu_output[25] ; - output \alu_output[26] ; - wire \alu_output[26] ; - output \alu_output[27] ; - wire \alu_output[27] ; - output \alu_output[28] ; - wire \alu_output[28] ; - output \alu_output[29] ; - wire \alu_output[29] ; - output \alu_output[2] ; - wire \alu_output[2] ; - output \alu_output[30] ; - wire \alu_output[30] ; - output \alu_output[31] ; - wire \alu_output[31] ; - output \alu_output[3] ; - wire \alu_output[3] ; - output \alu_output[4] ; - wire \alu_output[4] ; - output \alu_output[5] ; - wire \alu_output[5] ; - output \alu_output[6] ; - wire \alu_output[6] ; - output \alu_output[7] ; - wire \alu_output[7] ; - output \alu_output[8] ; - wire \alu_output[8] ; - output \alu_output[9] ; - wire \alu_output[9] ; - wire alu_output_L6MUX21_Z_1_D0; - wire alu_output_L6MUX21_Z_1_D0_PFUMX_Z_ALUT; - wire alu_output_L6MUX21_Z_1_D0_PFUMX_Z_BLUT; - wire alu_output_L6MUX21_Z_1_D1; - wire alu_output_L6MUX21_Z_1_D1_PFUMX_Z_ALUT; - wire alu_output_L6MUX21_Z_1_D1_PFUMX_Z_BLUT; - wire alu_output_L6MUX21_Z_2_D0; - wire alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D0; - wire alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D1; - wire alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_L6MUX21_Z_2_D1; - wire alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D0; - wire alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D1; - wire alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_L6MUX21_Z_3_D0; - wire alu_output_L6MUX21_Z_3_D0_PFUMX_Z_ALUT; - wire alu_output_L6MUX21_Z_3_D0_PFUMX_Z_BLUT; - wire alu_output_L6MUX21_Z_3_D1; - wire alu_output_L6MUX21_Z_3_D1_PFUMX_Z_ALUT; - wire alu_output_L6MUX21_Z_3_D1_PFUMX_Z_BLUT; - wire alu_output_L6MUX21_Z_D0; - wire alu_output_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_L6MUX21_Z_D1; - wire alu_output_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_10_B[0] ; - wire \alu_output_LUT4_Z_10_B[1] ; - wire \alu_output_LUT4_Z_10_B[2] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B[0] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B[1] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B[2] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B[3] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[0] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[1] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[3] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[4] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[0] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[1] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[2] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[3] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[0] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[1] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[2] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[4] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[5] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[0] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[1] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[2] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[3] ; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_1_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_1_BLUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[0] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[1] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[2] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[3] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[4] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[5] ; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[3] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[6] ; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[0] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[2] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[3] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_2_A[0] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_2_A[1] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_2_A[2] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_2_A[3] ; - wire alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_1_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_1_BLUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_C[0] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_C[1] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_C[2] ; - wire \alu_output_LUT4_Z_10_B_LUT4_Z_C[3] ; - wire \alu_output_LUT4_Z_11_C[0] ; - wire \alu_output_LUT4_Z_11_C[1] ; - wire \alu_output_LUT4_Z_11_C[2] ; - wire \alu_output_LUT4_Z_11_C[3] ; - wire \alu_output_LUT4_Z_11_C_LUT4_Z_C[0] ; - wire \alu_output_LUT4_Z_11_C_LUT4_Z_C[1] ; - wire \alu_output_LUT4_Z_11_C_LUT4_Z_C[2] ; - wire \alu_output_LUT4_Z_11_C_LUT4_Z_C[3] ; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[0] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[1] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[2] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[3] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[4] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B[0] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B[1] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B[2] ; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[0] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[1] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[2] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[3] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[4] ; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_1_Z; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[0] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[1] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[2] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[3] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[4] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[5] ; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_BLUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_D0; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_D0_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[1] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[2] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[3] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[4] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_Z_1_D[0] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_Z_1_D[1] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_Z_1_D[2] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_Z_1_D[3] ; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[0] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[1] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[2] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[3] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[4] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[5] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[0] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[1] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[2] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[3] ; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_LUT4_Z_1_D[0] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_LUT4_Z_1_D[1] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_LUT4_Z_1_D[2] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_LUT4_Z_1_D[3] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[0] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[1] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[2] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[3] ; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[0] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[1] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[2] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[4] ; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_1_ALUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_1_BLUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[0] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[1] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[2] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[3] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[4] ; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[0] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[1] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[2] ; - wire \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[3] ; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_11_C_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_12_C[0] ; - wire \alu_output_LUT4_Z_12_C[1] ; - wire \alu_output_LUT4_Z_12_C[2] ; - wire \alu_output_LUT4_Z_12_C[3] ; - wire alu_output_LUT4_Z_12_C_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_12_C_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_12_C_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_12_C_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_12_C_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_12_C_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_12_C_LUT4_Z_C[0] ; - wire \alu_output_LUT4_Z_12_C_LUT4_Z_C[1] ; - wire \alu_output_LUT4_Z_12_C_LUT4_Z_C[2] ; - wire \alu_output_LUT4_Z_12_C_LUT4_Z_C[3] ; - wire \alu_output_LUT4_Z_1_B[0] ; - wire \alu_output_LUT4_Z_1_B[1] ; - wire \alu_output_LUT4_Z_1_B[2] ; - wire alu_output_LUT4_Z_1_B_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_1_B_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_1_B_LUT4_Z_1_A[0] ; - wire \alu_output_LUT4_Z_1_B_LUT4_Z_1_A[1] ; - wire \alu_output_LUT4_Z_1_B_LUT4_Z_1_A[2] ; - wire \alu_output_LUT4_Z_1_B_LUT4_Z_1_A[3] ; - wire \alu_output_LUT4_Z_1_B_LUT4_Z_1_A[4] ; - wire \alu_output_LUT4_Z_1_B_LUT4_Z_1_A[5] ; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D0; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D1; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D0; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D1; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D0; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D1; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_1_B_LUT4_Z_C[0] ; - wire \alu_output_LUT4_Z_1_B_LUT4_Z_C[1] ; - wire \alu_output_LUT4_Z_1_B_LUT4_Z_C[2] ; - wire \alu_output_LUT4_Z_1_B_LUT4_Z_C[3] ; - wire \alu_output_LUT4_Z_2_A[0] ; - wire \alu_output_LUT4_Z_2_A[1] ; - wire \alu_output_LUT4_Z_2_A[2] ; - wire \alu_output_LUT4_Z_2_A[3] ; - wire alu_output_LUT4_Z_2_A_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_2_A_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_2_A_PFUMX_Z_1_ALUT; - wire alu_output_LUT4_Z_2_A_PFUMX_Z_1_BLUT; - wire alu_output_LUT4_Z_2_A_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_2_A_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_3_C[0] ; - wire \alu_output_LUT4_Z_3_C[1] ; - wire \alu_output_LUT4_Z_3_C[2] ; - wire \alu_output_LUT4_Z_3_C[3] ; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[5] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[6] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[0] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[1] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[2] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[3] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[4] ; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D0; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D1; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[0] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[1] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[2] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[3] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[4] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[5] ; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D0; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D1; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_B_Z[0] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_B_Z[1] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[0] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[1] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[3] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[4] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[5] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z_LUT4_Z_1_A[0] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z_LUT4_Z_1_A[1] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z_LUT4_Z_1_A[2] ; - wire \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z_LUT4_Z_1_A[3] ; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A[0] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A[1] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A[2] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A[3] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A[4] ; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_BLUT; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[0] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[1] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[2] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[3] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[4] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[0] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[1] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[2] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[3] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[0] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[1] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[2] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[3] ; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[0] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[2] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[3] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_1_ALUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_1_BLUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_C[0] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_C[1] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_C[2] ; - wire \alu_output_LUT4_Z_3_C_LUT4_Z_C[3] ; - wire \alu_output_LUT4_Z_4_C[0] ; - wire \alu_output_LUT4_Z_4_C[1] ; - wire \alu_output_LUT4_Z_4_C[2] ; - wire \alu_output_LUT4_Z_4_C[3] ; - wire alu_output_LUT4_Z_4_C_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_4_C_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_4_C_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_4_C_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_4_C_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_4_C_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_4_C_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_4_C_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_4_C_PFUMX_Z_C0[0] ; - wire \alu_output_LUT4_Z_4_C_PFUMX_Z_C0[1] ; - wire \alu_output_LUT4_Z_4_C_PFUMX_Z_C0[2] ; - wire \alu_output_LUT4_Z_4_C_PFUMX_Z_C0[3] ; - wire \alu_output_LUT4_Z_4_C_PFUMX_Z_C0[4] ; - wire \alu_output_LUT4_Z_5_B[0] ; - wire \alu_output_LUT4_Z_5_B[1] ; - wire \alu_output_LUT4_Z_5_B[2] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A[0] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A[1] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A[2] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A[3] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A[4] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A[5] ; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B[0] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B[1] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B[2] ; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[0] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[1] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[2] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[3] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[4] ; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[0] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[1] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[2] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[3] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[4] ; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_C[0] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_C[1] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_C[2] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_C[3] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_C_LUT4_Z_1_B[0] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_C_LUT4_Z_1_B[1] ; - wire \alu_output_LUT4_Z_5_B_LUT4_Z_C_LUT4_Z_1_B[2] ; - wire alu_output_LUT4_Z_5_B_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_5_B_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_6_A[0] ; - wire \alu_output_LUT4_Z_6_A[1] ; - wire \alu_output_LUT4_Z_6_A[2] ; - wire \alu_output_LUT4_Z_6_A[3] ; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] ; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] ; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] ; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[4] ; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[5] ; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B[0] ; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B[1] ; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B[2] ; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] ; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[1] ; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[2] ; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[0] ; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[1] ; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[2] ; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[3] ; - wire \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[4] ; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_6_A_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_6_A_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_7_A[0] ; - wire \alu_output_LUT4_Z_7_A[1] ; - wire \alu_output_LUT4_Z_7_A[2] ; - wire \alu_output_LUT4_Z_7_A[3] ; - wire \alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ; - wire \alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ; - wire \alu_output_LUT4_Z_7_A_LUT4_Z_A[2] ; - wire \alu_output_LUT4_Z_7_A_LUT4_Z_A[3] ; - wire alu_output_LUT4_Z_7_A_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_7_A_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_8_A[0] ; - wire \alu_output_LUT4_Z_8_A[1] ; - wire \alu_output_LUT4_Z_8_A[2] ; - wire \alu_output_LUT4_Z_8_A[3] ; - wire \alu_output_LUT4_Z_8_A_LUT4_Z_1_A[0] ; - wire \alu_output_LUT4_Z_8_A_LUT4_Z_1_A[1] ; - wire \alu_output_LUT4_Z_8_A_LUT4_Z_1_A[2] ; - wire \alu_output_LUT4_Z_8_A_LUT4_Z_1_A[3] ; - wire \alu_output_LUT4_Z_8_A_LUT4_Z_1_C[0] ; - wire \alu_output_LUT4_Z_8_A_LUT4_Z_1_C[1] ; - wire \alu_output_LUT4_Z_8_A_LUT4_Z_1_C[2] ; - wire \alu_output_LUT4_Z_8_A_LUT4_Z_1_C[3] ; - wire \alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ; - wire alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D0; - wire alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D1; - wire alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_8_A_LUT4_Z_C[0] ; - wire \alu_output_LUT4_Z_8_A_LUT4_Z_C[1] ; - wire \alu_output_LUT4_Z_8_A_LUT4_Z_C[2] ; - wire \alu_output_LUT4_Z_8_A_LUT4_Z_C[3] ; - wire \alu_output_LUT4_Z_9_B[0] ; - wire \alu_output_LUT4_Z_9_B[1] ; - wire \alu_output_LUT4_Z_9_B[2] ; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[4] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[5] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[0] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[1] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[2] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[3] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[4] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[5] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[6] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A[0] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A[1] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A[2] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A[3] ; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[0] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[1] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[2] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[4] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[0] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[1] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[2] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[3] ; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_1_ALUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_1_BLUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[1] ; - wire \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[2] ; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D0; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D1; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_9_B_LUT4_Z_1_B[0] ; - wire \alu_output_LUT4_Z_9_B_LUT4_Z_1_B[1] ; - wire \alu_output_LUT4_Z_9_B_LUT4_Z_1_B[2] ; - wire \alu_output_LUT4_Z_9_B_LUT4_Z_1_B[3] ; - wire \alu_output_LUT4_Z_9_B_LUT4_Z_1_B[4] ; - wire \alu_output_LUT4_Z_9_B_LUT4_Z_1_B[5] ; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_1_D0; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_1_D1; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D0; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D1; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_9_B_LUT4_Z_1_C[0] ; - wire \alu_output_LUT4_Z_9_B_LUT4_Z_1_C[1] ; - wire \alu_output_LUT4_Z_9_B_LUT4_Z_1_C[2] ; - wire \alu_output_LUT4_Z_9_B_LUT4_Z_1_C[3] ; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_9_B_LUT4_Z_C[0] ; - wire \alu_output_LUT4_Z_9_B_LUT4_Z_C[1] ; - wire \alu_output_LUT4_Z_9_B_LUT4_Z_C[2] ; - wire \alu_output_LUT4_Z_9_B_LUT4_Z_C[3] ; - wire \alu_output_LUT4_Z_A[0] ; - wire \alu_output_LUT4_Z_A[1] ; - wire \alu_output_LUT4_Z_A[2] ; - wire \alu_output_LUT4_Z_A[3] ; - wire alu_output_LUT4_Z_A_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_A_L6MUX21_Z_SD[0] ; - wire \alu_output_LUT4_Z_A_L6MUX21_Z_SD[1] ; - wire \alu_output_LUT4_Z_A_L6MUX21_Z_SD[2] ; - wire \alu_output_LUT4_Z_A_L6MUX21_Z_SD[3] ; - wire \alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ; - wire alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[0] ; - wire \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[1] ; - wire \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] ; - wire \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[3] ; - wire \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[4] ; - wire \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B[3] ; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[4] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[5] ; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_1_Z; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_1_Z_PFUMX_BLUT_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[3] ; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[3] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] ; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[3] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[4] ; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B[2] ; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_1_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_1_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[3] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[4] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[10] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[11] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[12] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[13] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[14] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[15] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[16] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[17] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[18] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[19] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[20] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[21] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[22] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[23] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[24] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[25] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[26] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[27] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[28] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[29] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[30] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[31] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[3] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[4] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[5] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[6] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[7] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[8] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[9] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[10] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[12] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[14] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[16] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[18] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[20] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[22] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[24] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[26] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[28] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[30] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[4] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[6] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[8] ; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[5] ; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[5] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[6] ; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[3] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[4] ; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[3] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[4] ; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_C[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_C[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_C[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_C[3] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_C[5] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_1_C[6] ; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_A_LUT4_Z_A[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A[3] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[3] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[4] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[5] ; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D0; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D1; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_PFUMX_Z_ALUT; - wire alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_PFUMX_Z_BLUT; - wire \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[3] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[4] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_D[0] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_D[1] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_D[2] ; - wire \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_D[3] ; - wire alu_output_PFUMX_Z_10_ALUT; - wire alu_output_PFUMX_Z_10_BLUT; - wire \alu_output_PFUMX_Z_10_C0[0] ; - wire \alu_output_PFUMX_Z_10_C0[1] ; - wire \alu_output_PFUMX_Z_10_C0[2] ; - wire \alu_output_PFUMX_Z_10_C0[3] ; - wire \alu_output_PFUMX_Z_10_C0[4] ; - wire \alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[0] ; - wire \alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[1] ; - wire \alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[2] ; - wire \alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[3] ; - wire \alu_output_PFUMX_Z_10_C0_LUT4_Z_C[0] ; - wire \alu_output_PFUMX_Z_10_C0_LUT4_Z_C[1] ; - wire \alu_output_PFUMX_Z_10_C0_LUT4_Z_C[2] ; - wire \alu_output_PFUMX_Z_10_C0_LUT4_Z_C[3] ; - wire alu_output_PFUMX_Z_10_C0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_10_C0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_11_ALUT; - wire alu_output_PFUMX_Z_11_BLUT; - wire alu_output_PFUMX_Z_12_ALUT; - wire alu_output_PFUMX_Z_12_BLUT; - wire \alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[0] ; - wire \alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[1] ; - wire \alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[2] ; - wire \alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[3] ; - wire \alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[4] ; - wire alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_1_ALUT; - wire alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_1_BLUT; - wire alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_13_ALUT; - wire alu_output_PFUMX_Z_13_BLUT; - wire alu_output_PFUMX_Z_14_ALUT; - wire alu_output_PFUMX_Z_14_BLUT; - wire alu_output_PFUMX_Z_1_ALUT; - wire alu_output_PFUMX_Z_1_BLUT; - wire \alu_output_PFUMX_Z_1_C0[0] ; - wire \alu_output_PFUMX_Z_1_C0[1] ; - wire \alu_output_PFUMX_Z_1_C0[2] ; - wire \alu_output_PFUMX_Z_1_C0[3] ; - wire \alu_output_PFUMX_Z_1_C0[4] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C[0] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C[1] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C[2] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C[3] ; - wire alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[0] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[1] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[2] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[3] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[4] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[5] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[6] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[0] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[1] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[2] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[3] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[4] ; - wire alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A[0] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A[1] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A[2] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[0] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[1] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[2] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[3] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[4] ; - wire alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[0] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[1] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[2] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[3] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[4] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[5] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[6] ; - wire alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_1_Z; - wire alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_Z; - wire alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_Z_PFUMX_ALUT_Z; - wire alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_A[0] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_A[1] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_C[0] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_C[1] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_C[2] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_C[3] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_C_LUT4_Z_D[0] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_C_LUT4_Z_D[1] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_C_LUT4_Z_D[2] ; - wire \alu_output_PFUMX_Z_1_C0_LUT4_Z_C_LUT4_Z_D[3] ; - wire alu_output_PFUMX_Z_2_ALUT; - wire alu_output_PFUMX_Z_2_BLUT; - wire \alu_output_PFUMX_Z_2_C0[0] ; - wire \alu_output_PFUMX_Z_2_C0[1] ; - wire \alu_output_PFUMX_Z_2_C0[2] ; - wire \alu_output_PFUMX_Z_2_C0[3] ; - wire \alu_output_PFUMX_Z_2_C0[4] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B[0] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B[1] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B[2] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B[3] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[0] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[1] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[2] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[3] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[4] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[0] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[1] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[2] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[3] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[4] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[5] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[6] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[0] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[1] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[2] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[3] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[4] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[5] ; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[0] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[1] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[2] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[4] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[5] ; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[5] ; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[0] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[2] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[3] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[5] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[6] ; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[4] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[5] ; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_B[0] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_B[1] ; - wire \alu_output_PFUMX_Z_2_C0_LUT4_Z_B[2] ; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_3_ALUT; - wire alu_output_PFUMX_Z_3_BLUT; - wire \alu_output_PFUMX_Z_3_C0[0] ; - wire \alu_output_PFUMX_Z_3_C0[1] ; - wire \alu_output_PFUMX_Z_3_C0[2] ; - wire \alu_output_PFUMX_Z_3_C0[3] ; - wire \alu_output_PFUMX_Z_3_C0[4] ; - wire alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_3_C0_LUT4_Z_C[0] ; - wire \alu_output_PFUMX_Z_3_C0_LUT4_Z_C[1] ; - wire \alu_output_PFUMX_Z_3_C0_LUT4_Z_C[2] ; - wire \alu_output_PFUMX_Z_3_C0_LUT4_Z_C[3] ; - wire alu_output_PFUMX_Z_3_C0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_3_C0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_4_ALUT; - wire alu_output_PFUMX_Z_4_BLUT; - wire alu_output_PFUMX_Z_5_ALUT; - wire alu_output_PFUMX_Z_5_BLUT; - wire alu_output_PFUMX_Z_6_ALUT; - wire alu_output_PFUMX_Z_6_BLUT; - wire alu_output_PFUMX_Z_7_ALUT; - wire alu_output_PFUMX_Z_7_BLUT; - wire alu_output_PFUMX_Z_8_ALUT; - wire alu_output_PFUMX_Z_8_BLUT; - wire alu_output_PFUMX_Z_9_ALUT; - wire alu_output_PFUMX_Z_9_BLUT; - wire \alu_output_PFUMX_Z_9_C0[0] ; - wire \alu_output_PFUMX_Z_9_C0[1] ; - wire \alu_output_PFUMX_Z_9_C0[2] ; - wire \alu_output_PFUMX_Z_9_C0[3] ; - wire \alu_output_PFUMX_Z_9_C0[4] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B[0] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B[1] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B[2] ; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[5] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[6] ; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[4] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[5] ; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[0] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[1] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[2] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[3] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[4] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[5] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[6] ; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_1_Z; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_D1; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[0] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[2] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[3] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] ; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[3] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_A[0] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_A[1] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_A[2] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_A[3] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_A[4] ; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[0] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[1] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[2] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[3] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[4] ; - wire \alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[5] ; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D0; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D1; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D0; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D1; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_9_C0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_9_C0_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[0] ; - wire \alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[1] ; - wire \alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[2] ; - wire \alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[3] ; - wire \alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[4] ; - wire alu_output_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_C0[0] ; - wire \alu_output_PFUMX_Z_C0[1] ; - wire \alu_output_PFUMX_Z_C0[2] ; - wire \alu_output_PFUMX_Z_C0[3] ; - wire \alu_output_PFUMX_Z_C0[4] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_1_A[0] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_1_A[1] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_1_A[2] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[0] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[1] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[2] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[3] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[4] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[5] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[6] ; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_2_B[0] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_2_B[1] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_2_B[2] ; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_2_B_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A[0] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A[1] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A[2] ; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] ; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[0] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[1] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[2] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[3] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[4] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[5] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[0] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[1] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[2] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[3] ; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[0] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[1] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[2] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[3] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[4] ; - wire alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[0] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[1] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[2] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[3] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_B[0] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_B[1] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_B[2] ; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[5] ; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z_PFUMX_ALUT_Z; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[0] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[1] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[2] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[3] ; - wire \alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[4] ; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT; - wire \alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[0] ; - wire \alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[1] ; - wire \alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[2] ; - wire \alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[3] ; - wire \alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[4] ; - wire alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0; - wire alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1; - wire alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT; - wire alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT; - wire alu_output_PFUMX_Z_C0_PFUMX_Z_BLUT; - wire \alu_output_PFUMX_Z_C0_PFUMX_Z_C0[0] ; - wire \alu_output_PFUMX_Z_C0_PFUMX_Z_C0[1] ; - wire \alu_output_PFUMX_Z_C0_PFUMX_Z_C0[2] ; - wire \alu_output_PFUMX_Z_C0_PFUMX_Z_C0[3] ; - wire \alu_output_PFUMX_Z_C0_PFUMX_Z_C0[4] ; - wire \alu_output_PFUMX_Z_C0_PFUMX_Z_C0_LUT4_Z_D[0] ; - wire \alu_output_PFUMX_Z_C0_PFUMX_Z_C0_LUT4_Z_D[1] ; - wire \alu_output_PFUMX_Z_C0_PFUMX_Z_C0_LUT4_Z_D[2] ; - wire \alu_output_PFUMX_Z_C0_PFUMX_Z_C0_LUT4_Z_D[3] ; - wire \complement2[0] ; - wire \complement2[10] ; - wire \complement2[11] ; - wire \complement2[12] ; - wire \complement2[13] ; - wire \complement2[14] ; - wire \complement2[15] ; - wire \complement2[16] ; - wire \complement2[17] ; - wire \complement2[18] ; - wire \complement2[19] ; - wire \complement2[1] ; - wire \complement2[20] ; - wire \complement2[21] ; - wire \complement2[22] ; - wire \complement2[23] ; - wire \complement2[24] ; - wire \complement2[25] ; - wire \complement2[26] ; - wire \complement2[27] ; - wire \complement2[28] ; - wire \complement2[29] ; - wire \complement2[2] ; - wire \complement2[30] ; - wire \complement2[31] ; - wire \complement2[3] ; - wire \complement2[4] ; - wire \complement2[5] ; - wire \complement2[6] ; - wire \complement2[7] ; - wire \complement2[8] ; - wire \complement2[9] ; - wire \complement2_CCU2C_S0_3_COUT[0] ; - wire \complement2_CCU2C_S0_3_COUT[10] ; - wire \complement2_CCU2C_S0_3_COUT[11] ; - wire \complement2_CCU2C_S0_3_COUT[12] ; - wire \complement2_CCU2C_S0_3_COUT[13] ; - wire \complement2_CCU2C_S0_3_COUT[14] ; - wire \complement2_CCU2C_S0_3_COUT[15] ; - wire \complement2_CCU2C_S0_3_COUT[16] ; - wire \complement2_CCU2C_S0_3_COUT[17] ; - wire \complement2_CCU2C_S0_3_COUT[18] ; - wire \complement2_CCU2C_S0_3_COUT[19] ; - wire \complement2_CCU2C_S0_3_COUT[1] ; - wire \complement2_CCU2C_S0_3_COUT[20] ; - wire \complement2_CCU2C_S0_3_COUT[21] ; - wire \complement2_CCU2C_S0_3_COUT[22] ; - wire \complement2_CCU2C_S0_3_COUT[23] ; - wire \complement2_CCU2C_S0_3_COUT[24] ; - wire \complement2_CCU2C_S0_3_COUT[25] ; - wire \complement2_CCU2C_S0_3_COUT[26] ; - wire \complement2_CCU2C_S0_3_COUT[27] ; - wire \complement2_CCU2C_S0_3_COUT[28] ; - wire \complement2_CCU2C_S0_3_COUT[29] ; - wire \complement2_CCU2C_S0_3_COUT[2] ; - wire \complement2_CCU2C_S0_3_COUT[30] ; - wire \complement2_CCU2C_S0_3_COUT[31] ; - wire \complement2_CCU2C_S0_3_COUT[3] ; - wire \complement2_CCU2C_S0_3_COUT[4] ; - wire \complement2_CCU2C_S0_3_COUT[5] ; - wire \complement2_CCU2C_S0_3_COUT[6] ; - wire \complement2_CCU2C_S0_3_COUT[7] ; - wire \complement2_CCU2C_S0_3_COUT[8] ; - wire \complement2_CCU2C_S0_3_COUT[9] ; - wire \complement2_CCU2C_S0_B0[0] ; - wire \complement2_CCU2C_S0_B0[10] ; - wire \complement2_CCU2C_S0_B0[11] ; - wire \complement2_CCU2C_S0_B0[12] ; - wire \complement2_CCU2C_S0_B0[13] ; - wire \complement2_CCU2C_S0_B0[14] ; - wire \complement2_CCU2C_S0_B0[15] ; - wire \complement2_CCU2C_S0_B0[16] ; - wire \complement2_CCU2C_S0_B0[17] ; - wire \complement2_CCU2C_S0_B0[18] ; - wire \complement2_CCU2C_S0_B0[19] ; - wire \complement2_CCU2C_S0_B0[1] ; - wire \complement2_CCU2C_S0_B0[20] ; - wire \complement2_CCU2C_S0_B0[21] ; - wire \complement2_CCU2C_S0_B0[22] ; - wire \complement2_CCU2C_S0_B0[23] ; - wire \complement2_CCU2C_S0_B0[24] ; - wire \complement2_CCU2C_S0_B0[25] ; - wire \complement2_CCU2C_S0_B0[26] ; - wire \complement2_CCU2C_S0_B0[27] ; - wire \complement2_CCU2C_S0_B0[28] ; - wire \complement2_CCU2C_S0_B0[29] ; - wire \complement2_CCU2C_S0_B0[2] ; - wire \complement2_CCU2C_S0_B0[30] ; - wire \complement2_CCU2C_S0_B0[31] ; - wire \complement2_CCU2C_S0_B0[3] ; - wire \complement2_CCU2C_S0_B0[4] ; - wire \complement2_CCU2C_S0_B0[5] ; - wire \complement2_CCU2C_S0_B0[6] ; - wire \complement2_CCU2C_S0_B0[7] ; - wire \complement2_CCU2C_S0_B0[8] ; - wire \complement2_CCU2C_S0_B0[9] ; - wire \complement2_CCU2C_S0_COUT[0] ; - wire \complement2_CCU2C_S0_COUT[10] ; - wire \complement2_CCU2C_S0_COUT[11] ; - wire \complement2_CCU2C_S0_COUT[12] ; - wire \complement2_CCU2C_S0_COUT[13] ; - wire \complement2_CCU2C_S0_COUT[14] ; - wire \complement2_CCU2C_S0_COUT[15] ; - wire \complement2_CCU2C_S0_COUT[16] ; - wire \complement2_CCU2C_S0_COUT[17] ; - wire \complement2_CCU2C_S0_COUT[18] ; - wire \complement2_CCU2C_S0_COUT[19] ; - wire \complement2_CCU2C_S0_COUT[1] ; - wire \complement2_CCU2C_S0_COUT[20] ; - wire \complement2_CCU2C_S0_COUT[21] ; - wire \complement2_CCU2C_S0_COUT[22] ; - wire \complement2_CCU2C_S0_COUT[23] ; - wire \complement2_CCU2C_S0_COUT[24] ; - wire \complement2_CCU2C_S0_COUT[25] ; - wire \complement2_CCU2C_S0_COUT[26] ; - wire \complement2_CCU2C_S0_COUT[27] ; - wire \complement2_CCU2C_S0_COUT[28] ; - wire \complement2_CCU2C_S0_COUT[29] ; - wire \complement2_CCU2C_S0_COUT[2] ; - wire \complement2_CCU2C_S0_COUT[30] ; - wire \complement2_CCU2C_S0_COUT[31] ; - wire \complement2_CCU2C_S0_COUT[3] ; - wire \complement2_CCU2C_S0_COUT[4] ; - wire \complement2_CCU2C_S0_COUT[5] ; - wire \complement2_CCU2C_S0_COUT[6] ; - wire \complement2_CCU2C_S0_COUT[7] ; - wire \complement2_CCU2C_S0_COUT[8] ; - wire \complement2_CCU2C_S0_COUT[9] ; - wire \complement2_LUT4_C_D[0] ; - wire \complement2_LUT4_C_D[1] ; - wire \complement2_LUT4_C_D[2] ; - wire \sum[0] ; - wire \sum[10] ; - wire \sum[11] ; - wire \sum[12] ; - wire \sum[13] ; - wire \sum[14] ; - wire \sum[15] ; - wire \sum[16] ; - wire \sum[17] ; - wire \sum[18] ; - wire \sum[19] ; - wire \sum[1] ; - wire \sum[20] ; - wire \sum[21] ; - wire \sum[22] ; - wire \sum[23] ; - wire \sum[24] ; - wire \sum[25] ; - wire \sum[26] ; - wire \sum[27] ; - wire \sum[28] ; - wire \sum[29] ; - wire \sum[2] ; - wire \sum[30] ; - wire \sum[31] ; - wire \sum[3] ; - wire \sum[4] ; - wire \sum[5] ; - wire \sum[6] ; - wire \sum[7] ; - wire \sum[8] ; - wire \sum[9] ; - wire \sum_CCU2C_S0_3_COUT[0] ; - wire \sum_CCU2C_S0_3_COUT[10] ; - wire \sum_CCU2C_S0_3_COUT[11] ; - wire \sum_CCU2C_S0_3_COUT[12] ; - wire \sum_CCU2C_S0_3_COUT[13] ; - wire \sum_CCU2C_S0_3_COUT[14] ; - wire \sum_CCU2C_S0_3_COUT[15] ; - wire \sum_CCU2C_S0_3_COUT[16] ; - wire \sum_CCU2C_S0_3_COUT[17] ; - wire \sum_CCU2C_S0_3_COUT[18] ; - wire \sum_CCU2C_S0_3_COUT[19] ; - wire \sum_CCU2C_S0_3_COUT[1] ; - wire \sum_CCU2C_S0_3_COUT[20] ; - wire \sum_CCU2C_S0_3_COUT[21] ; - wire \sum_CCU2C_S0_3_COUT[22] ; - wire \sum_CCU2C_S0_3_COUT[23] ; - wire \sum_CCU2C_S0_3_COUT[24] ; - wire \sum_CCU2C_S0_3_COUT[25] ; - wire \sum_CCU2C_S0_3_COUT[26] ; - wire \sum_CCU2C_S0_3_COUT[27] ; - wire \sum_CCU2C_S0_3_COUT[28] ; - wire \sum_CCU2C_S0_3_COUT[29] ; - wire \sum_CCU2C_S0_3_COUT[2] ; - wire \sum_CCU2C_S0_3_COUT[30] ; - wire \sum_CCU2C_S0_3_COUT[31] ; - wire \sum_CCU2C_S0_3_COUT[3] ; - wire \sum_CCU2C_S0_3_COUT[4] ; - wire \sum_CCU2C_S0_3_COUT[5] ; - wire \sum_CCU2C_S0_3_COUT[6] ; - wire \sum_CCU2C_S0_3_COUT[7] ; - wire \sum_CCU2C_S0_3_COUT[8] ; - wire \sum_CCU2C_S0_3_COUT[9] ; - wire \sum_CCU2C_S0_B0[0] ; - wire \sum_CCU2C_S0_B0[10] ; - wire \sum_CCU2C_S0_B0[11] ; - wire \sum_CCU2C_S0_B0[12] ; - wire \sum_CCU2C_S0_B0[13] ; - wire \sum_CCU2C_S0_B0[14] ; - wire \sum_CCU2C_S0_B0[15] ; - wire \sum_CCU2C_S0_B0[16] ; - wire \sum_CCU2C_S0_B0[17] ; - wire \sum_CCU2C_S0_B0[18] ; - wire \sum_CCU2C_S0_B0[19] ; - wire \sum_CCU2C_S0_B0[1] ; - wire \sum_CCU2C_S0_B0[20] ; - wire \sum_CCU2C_S0_B0[21] ; - wire \sum_CCU2C_S0_B0[22] ; - wire \sum_CCU2C_S0_B0[23] ; - wire \sum_CCU2C_S0_B0[24] ; - wire \sum_CCU2C_S0_B0[25] ; - wire \sum_CCU2C_S0_B0[26] ; - wire \sum_CCU2C_S0_B0[27] ; - wire \sum_CCU2C_S0_B0[28] ; - wire \sum_CCU2C_S0_B0[29] ; - wire \sum_CCU2C_S0_B0[2] ; - wire \sum_CCU2C_S0_B0[30] ; - wire \sum_CCU2C_S0_B0[31] ; - wire \sum_CCU2C_S0_B0[3] ; - wire \sum_CCU2C_S0_B0[4] ; - wire \sum_CCU2C_S0_B0[5] ; - wire \sum_CCU2C_S0_B0[6] ; - wire \sum_CCU2C_S0_B0[7] ; - wire \sum_CCU2C_S0_B0[8] ; - wire \sum_CCU2C_S0_B0[9] ; - wire \sum_CCU2C_S0_COUT[0] ; - wire \sum_CCU2C_S0_COUT[10] ; - wire \sum_CCU2C_S0_COUT[11] ; - wire \sum_CCU2C_S0_COUT[12] ; - wire \sum_CCU2C_S0_COUT[13] ; - wire \sum_CCU2C_S0_COUT[14] ; - wire \sum_CCU2C_S0_COUT[15] ; - wire \sum_CCU2C_S0_COUT[16] ; - wire \sum_CCU2C_S0_COUT[17] ; - wire \sum_CCU2C_S0_COUT[18] ; - wire \sum_CCU2C_S0_COUT[19] ; - wire \sum_CCU2C_S0_COUT[1] ; - wire \sum_CCU2C_S0_COUT[20] ; - wire \sum_CCU2C_S0_COUT[21] ; - wire \sum_CCU2C_S0_COUT[22] ; - wire \sum_CCU2C_S0_COUT[23] ; - wire \sum_CCU2C_S0_COUT[24] ; - wire \sum_CCU2C_S0_COUT[25] ; - wire \sum_CCU2C_S0_COUT[26] ; - wire \sum_CCU2C_S0_COUT[27] ; - wire \sum_CCU2C_S0_COUT[28] ; - wire \sum_CCU2C_S0_COUT[29] ; - wire \sum_CCU2C_S0_COUT[2] ; - wire \sum_CCU2C_S0_COUT[30] ; - wire \sum_CCU2C_S0_COUT[31] ; - wire \sum_CCU2C_S0_COUT[3] ; - wire \sum_CCU2C_S0_COUT[4] ; - wire \sum_CCU2C_S0_COUT[5] ; - wire \sum_CCU2C_S0_COUT[6] ; - wire \sum_CCU2C_S0_COUT[7] ; - wire \sum_CCU2C_S0_COUT[8] ; - wire \sum_CCU2C_S0_COUT[9] ; - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0003_ ( - .D0(alu_output_L6MUX21_Z_D0), - .D1(alu_output_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[5] ), - .Z(\alu_output[24] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0004_ ( - .D0(alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D0), - .D1(alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[5] ), - .Z(alu_output_L6MUX21_Z_2_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0005_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0006_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0007_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0003) - ) _0008_ ( - .A(_0000_), - .B(\alu_in_1[16] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0009_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0010_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0011_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0012_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[2] ), - .C(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[3] ), - .D(\alu_in_2[1] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0013_ ( - .A(_0000_), - .B(\alu_in_1[26] ), - .C(\alu_in_1[27] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'h0f00) - ) _0014_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_9_B_LUT4_Z_1_B[1] ), - .D(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ), - .Z(\alu_output_PFUMX_Z_2_C0[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hf100) - ) _0015_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .B(\alu_output_LUT4_Z_9_B_LUT4_Z_1_B[0] ), - .C(\alu_output_LUT4_Z_9_B_LUT4_Z_1_C[2] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] ), - .Z(\alu_output_PFUMX_Z_2_C0[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hafcf) - ) _0016_ ( - .A(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[0] ), - .B(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[1] ), - .C(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .D(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0017_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D1), - .SD(\alu_op_i[2] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_B[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0018_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[27] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hfff3) - ) _0019_ ( - .A(_0000_), - .B(\sum[27] ), - .C(\alu_op_i[1] ), - .D(\alu_op_i[0] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hfff3) - ) _0020_ ( - .A(_0000_), - .B(\sum[27] ), - .C(\alu_op_i[1] ), - .D(\alu_op_i[0] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0021_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[27] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h33f0) - ) _0022_ ( - .A(_0000_), - .B(\alu_op_i[1] ), - .C(\alu_op_i[0] ), - .D(\alu_in_1[27] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hf0ff) - ) _0023_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_op_i[0] ), - .D(\alu_in_1[27] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0c05) - ) _0024_ ( - .A(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[0] ), - .B(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[1] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0025_ ( - .ALUT(alu_output_PFUMX_Z_3_ALUT), - .BLUT(alu_output_PFUMX_Z_3_BLUT), - .C0(\alu_output_PFUMX_Z_3_C0[4] ), - .Z(\alu_output[26] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hff0b) - ) _0026_ ( - .A(\alu_output_PFUMX_Z_3_C0[0] ), - .B(\alu_output_PFUMX_Z_3_C0[1] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ), - .D(\alu_output_PFUMX_Z_3_C0[3] ), - .Z(alu_output_PFUMX_Z_3_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0027_ ( - .D0(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D1), - .SD(\alu_in_2[1] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0028_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_3_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0029_ ( - .D0(alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ), - .Z(\alu_output_PFUMX_Z_3_C0[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0030_ ( - .ALUT(alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff0f) - ) _0031_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] ), - .Z(alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff0f) - ) _0032_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] ), - .Z(alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0033_ ( - .ALUT(alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h3303) - ) _0034_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[0] ), - .C(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] ), - .Z(alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h3303) - ) _0035_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[1] ), - .C(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] ), - .Z(alu_output_PFUMX_Z_3_C0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0007) - ) _0036_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[26] ), - .C(\alu_output_PFUMX_Z_3_C0_LUT4_Z_C[2] ), - .D(\alu_output_PFUMX_Z_3_C0_LUT4_Z_C[3] ), - .Z(\alu_output_PFUMX_Z_3_C0[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'ha300) - ) _0037_ ( - .A(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] ), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] ), - .Z(\alu_output_PFUMX_Z_3_C0[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0038_ ( - .D0(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0), - .D1(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0039_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[26] ), - .D(\alu_in_2[26] ), - .Z(\alu_output_PFUMX_Z_3_C0_LUT4_Z_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0040_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[26] ), - .D(\alu_in_2[26] ), - .Z(\alu_output_PFUMX_Z_3_C0_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0041_ ( - .ALUT(alu_output_PFUMX_Z_3_C0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_3_C0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .Z(\alu_output_PFUMX_Z_3_C0[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0c05) - ) _0042_ ( - .A(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[2] ), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[3] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(alu_output_PFUMX_Z_3_C0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0043_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_3_C0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0044_ ( - .ALUT(alu_output_PFUMX_Z_4_ALUT), - .BLUT(alu_output_PFUMX_Z_4_BLUT), - .C0(\alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[4] ), - .Z(\alu_output[23] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0045_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[3] ), - .Z(alu_output_PFUMX_Z_4_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h1fff) - ) _0046_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .B(\alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[1] ), - .C(\alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[2] ), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[3] ), - .Z(alu_output_PFUMX_Z_4_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0047_ ( - .ALUT(alu_output_PFUMX_Z_5_ALUT), - .BLUT(alu_output_PFUMX_Z_5_BLUT), - .C0(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[4] ), - .Z(\alu_output[22] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0048_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[3] ), - .Z(alu_output_PFUMX_Z_5_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0049_ ( - .D0(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h1fff) - ) _0050_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .B(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[1] ), - .C(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[2] ), - .D(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[3] ), - .Z(alu_output_PFUMX_Z_5_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0051_ ( - .ALUT(alu_output_PFUMX_Z_6_ALUT), - .BLUT(alu_output_PFUMX_Z_6_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[4] ), - .Z(\alu_output[21] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hf4ff) - ) _0052_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[0] ), - .B(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[1] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[3] ), - .Z(alu_output_PFUMX_Z_6_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0053_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[3] ), - .Z(alu_output_PFUMX_Z_6_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0054_ ( - .ALUT(alu_output_PFUMX_Z_7_ALUT), - .BLUT(alu_output_PFUMX_Z_7_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] ), - .Z(\alu_output[17] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hf8ff) - ) _0055_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[0] ), - .B(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[1] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[2] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[3] ), - .Z(alu_output_PFUMX_Z_7_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0056_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[3] ), - .Z(alu_output_PFUMX_Z_7_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0057_ ( - .ALUT(alu_output_PFUMX_Z_8_ALUT), - .BLUT(alu_output_PFUMX_Z_8_BLUT), - .C0(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[4] ), - .Z(\alu_output[16] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h44f4) - ) _0058_ ( - .A(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[0] ), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[1] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[0] ), - .Z(alu_output_PFUMX_Z_8_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0059_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_8_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0060_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0061_ ( - .ALUT(alu_output_PFUMX_Z_9_ALUT), - .BLUT(alu_output_PFUMX_Z_9_BLUT), - .C0(\alu_output_PFUMX_Z_9_C0[4] ), - .Z(\alu_output[14] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hffe0) - ) _0062_ ( - .A(\alu_output_PFUMX_Z_9_C0[0] ), - .B(\alu_output_PFUMX_Z_9_C0[1] ), - .C(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .D(\alu_output_PFUMX_Z_9_C0[3] ), - .Z(alu_output_PFUMX_Z_9_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0063_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h5300) - ) _0064_ ( - .A(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[2] ), - .C(\alu_in_2[3] ), - .D(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_PFUMX_Z_9_C0[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'hf000) - ) _0065_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_PFUMX_Z_1_C0_LUT4_Z_A[0] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ), - .Z(\alu_output_PFUMX_Z_9_C0[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'ha300) - ) _0066_ ( - .A(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] ), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B[0] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ), - .Z(\alu_output_PFUMX_Z_9_C0[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0067_ ( - .D0(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0068_ ( - .D0(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[2] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0069_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0070_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0002) - ) _0071_ ( - .A(\alu_in_1[0] ), - .B(\alu_op_i[1] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0072_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0073_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0074_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0075_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0076_ ( - .D0(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[2] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0077_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0078_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0079_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0080_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0081_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0082_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0083_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0084_ ( - .A(_0000_), - .B(\alu_in_1[13] ), - .C(\alu_in_1[14] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0085_ ( - .A(_0000_), - .B(\alu_in_1[11] ), - .C(\alu_in_1[12] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0086_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0087_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0088_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h330f) - ) _0089_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] ), - .C(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] ), - .D(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0090_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z), - .C0(\alu_in_2[2] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0091_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[2] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0092_ ( - .D0(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D1), - .SD(\alu_in_2[1] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0093_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0094_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0095_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[5] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0096_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[6] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0097_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0098_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[3] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0099_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[4] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0100_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[2] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0101_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[2] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_1_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0102_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_1_Z), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0103_ ( - .D0(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z), - .D1(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_D1), - .SD(\alu_in_2[2] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'hfffe) - ) _0104_ ( - .A(\alu_in_1[0] ), - .B(\alu_op_i[1] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0105_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0106_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0107_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[2] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0108_ ( - .D0(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0), - .D1(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z), - .SD(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0109_ ( - .D0(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[2] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0110_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0111_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'hfff0) - ) _0112_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_in_2[31] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0113_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0114_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0115_ ( - .ALUT(alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[4] ), - .Z(alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0116_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0117_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0118_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_2[6] ), - .D(\alu_in_1[6] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'hf000) - ) _0119_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .D(\sum[6] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0120_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_2[6] ), - .D(\alu_in_1[6] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0121_ ( - .D0(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0), - .D1(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z), - .SD(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0122_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[2] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0123_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0124_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0125_ ( - .D0(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z), - .SD(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0126_ ( - .D0(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0), - .D1(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1), - .SD(\alu_in_2[4] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0127_ ( - .D0(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0128_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0129_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hfeff) - ) _0130_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0131_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h0100) - ) _0132_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h0100) - ) _0133_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0134_ ( - .D0(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[2] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0135_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0136_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0137_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0138_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0139_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0140_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0141_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0142_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h00fc) - ) _0143_ ( - .A(_0000_), - .B(\alu_op_i[2] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[2] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h00f0) - ) _0144_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0145_ ( - .A(_0000_), - .B(\alu_in_1[9] ), - .C(\alu_in_1[10] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0146_ ( - .A(_0000_), - .B(\alu_in_1[7] ), - .C(\alu_in_1[8] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h00cf) - ) _0147_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B[0] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0148_ ( - .D0(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D1), - .SD(\alu_op_i[2] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'hfffc) - ) _0149_ ( - .A(_0000_), - .B(\alu_op_i[1] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0150_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[22] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hfff3) - ) _0151_ ( - .A(_0000_), - .B(\sum[22] ), - .C(\alu_op_i[1] ), - .D(\alu_op_i[0] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hfff3) - ) _0152_ ( - .A(_0000_), - .B(\sum[22] ), - .C(\alu_op_i[1] ), - .D(\alu_op_i[0] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0153_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[22] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h33f0) - ) _0154_ ( - .A(_0000_), - .B(\alu_op_i[1] ), - .C(\alu_op_i[0] ), - .D(\alu_in_1[22] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hf0ff) - ) _0155_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_op_i[0] ), - .D(\alu_in_1[22] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'h0f00) - ) _0156_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_in_2[2] ), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[3] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hf0cc) - ) _0157_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[1] ), - .C(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[2] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0158_ ( - .D0(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0159_ ( - .D0(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D0), - .D1(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0160_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0161_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0162_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[24] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0163_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[22] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0164_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0165_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[25] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0166_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[23] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_1_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0167_ ( - .D0(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D0), - .D1(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0168_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0169_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[20] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0170_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[18] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0171_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0172_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0173_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[21] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0174_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[19] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_2_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0175_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0176_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[28] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0177_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[26] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0178_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0179_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[29] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0180_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[27] ), - .Z(alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0c0a) - ) _0181_ ( - .A(\alu_in_1[30] ), - .B(\alu_in_1[31] ), - .C(\alu_in_2[1] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'hfffc) - ) _0182_ ( - .A(_0000_), - .B(\alu_op_i[1] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0183_ ( - .ALUT(alu_output_PFUMX_Z_9_C0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_9_C0_PFUMX_Z_BLUT), - .C0(\alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[4] ), - .Z(\alu_output_PFUMX_Z_9_C0[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0184_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_9_C0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0777) - ) _0185_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .B(\alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[1] ), - .C(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .D(\sum[14] ), - .Z(alu_output_PFUMX_Z_9_C0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'hf000) - ) _0186_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_in_1[14] ), - .D(\alu_in_2[14] ), - .Z(\alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0187_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[14] ), - .D(\alu_in_2[14] ), - .Z(\alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h00fe) - ) _0188_ ( - .A(\alu_output_PFUMX_Z_C0[0] ), - .B(\alu_output_PFUMX_Z_C0[1] ), - .C(\alu_output_PFUMX_Z_C0[2] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ), - .Z(alu_output_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0189_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h5300) - ) _0190_ ( - .A(\alu_output_PFUMX_Z_C0_LUT4_Z_A[1] ), - .B(\alu_output_PFUMX_Z_C0_LUT4_Z_B[0] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] ), - .Z(\alu_output_PFUMX_Z_C0[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h5300) - ) _0191_ ( - .A(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A[0] ), - .B(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A[1] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .D(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ), - .Z(\alu_output_PFUMX_Z_C0[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0192_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .C(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[2] ), - .D(\alu_in_2[1] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0193_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0194_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .C(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ), - .D(\alu_in_2[1] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0195_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1), - .SD(\alu_op_i[0] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0196_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1), - .SD(\alu_op_i[0] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0197_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0198_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0199_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0200_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0201_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0202_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0203_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0204_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0205_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0206_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0207_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h0003) - ) _0208_ ( - .A(_0000_), - .B(\alu_in_1[23] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0209_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0210_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0003) - ) _0211_ ( - .A(_0000_), - .B(\alu_in_1[22] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0212_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0213_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0214_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0215_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0216_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0217_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0218_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0219_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0220_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0221_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0222_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h0003) - ) _0223_ ( - .A(_0000_), - .B(\alu_in_1[25] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0224_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0225_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0226_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h0100) - ) _0227_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0003) - ) _0228_ ( - .A(_0000_), - .B(\alu_in_1[24] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h0300) - ) _0229_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_C0_LUT4_Z_2_B[0] ), - .C(\alu_output_PFUMX_Z_C0_LUT4_Z_2_B[1] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ), - .Z(\alu_output_PFUMX_Z_C0[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0230_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_2_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0231_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0232_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0233_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0234_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0235_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0236_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0237_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0238_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0239_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0240_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0241_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0242_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[2] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0243_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0244_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h330f) - ) _0245_ ( - .A(_0000_), - .B(\alu_in_1[30] ), - .C(\alu_in_1[31] ), - .D(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0246_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_2_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hf044) - ) _0247_ ( - .A(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .C(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[3] ), - .D(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0248_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_2_B_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hfeff) - ) _0249_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0250_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_A[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0251_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0252_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0253_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0254_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0255_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0256_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0257_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0258_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0259_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hfeff) - ) _0260_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0261_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0262_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0263_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1), - .SD(\alu_op_i[0] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0264_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0265_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0266_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0267_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0268_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0269_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0270_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0271_ ( - .A(_0000_), - .B(\alu_in_1[1] ), - .C(\alu_in_1[2] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0272_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0273_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0274_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h0003) - ) _0275_ ( - .A(_0000_), - .B(\alu_in_1[3] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0276_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0277_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0003) - ) _0278_ ( - .A(_0000_), - .B(\alu_in_1[2] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'h0f00) - ) _0279_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0280_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0f00) - ) _0281_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hf400) - ) _0282_ ( - .A(\alu_output_LUT4_Z_10_B_LUT4_Z_2_A[0] ), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_2_A[1] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_2_A[2] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .Z(\alu_output_LUT4_Z_10_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0f00) - ) _0283_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'h0f00) - ) _0284_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_PFUMX_Z_C0_LUT4_Z_A[1] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0007) - ) _0285_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[7] ), - .C(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[2] ), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[3] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[5] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h3f00) - ) _0286_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] ), - .C(\alu_in_2[3] ), - .D(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0c0a) - ) _0287_ ( - .A(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[0] ), - .B(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0288_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0289_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[2] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hf0cc) - ) _0290_ ( - .A(_0000_), - .B(\alu_in_1[9] ), - .C(\alu_in_1[10] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0f33) - ) _0291_ ( - .A(_0000_), - .B(\alu_in_1[7] ), - .C(\alu_in_1[8] ), - .D(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0292_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[7] ), - .D(\alu_in_2[7] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hca00) - ) _0293_ ( - .A(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[0] ), - .B(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[1] ), - .C(\alu_in_2[2] ), - .D(\alu_in_2[3] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_2_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0294_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[7] ), - .D(\alu_in_2[7] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0295_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0296_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0297_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0298_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0299_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1), - .SD(\alu_op_i[0] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0300_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0301_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0302_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0303_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0304_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_2_A[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0305_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0306_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0307_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0308_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0309_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0310_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h0003) - ) _0311_ ( - .A(_0000_), - .B(\alu_in_1[15] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0312_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0313_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0003) - ) _0314_ ( - .A(_0000_), - .B(\alu_in_1[14] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0315_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_1_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_1_BLUT), - .C0(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_2_A[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0316_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0317_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0318_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z_PFUMX_ALUT_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0319_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0320_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_C[3] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0321_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h00cf) - ) _0322_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_C0_LUT4_Z_B[0] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0323_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A[0] ), - .C(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A[1] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h00f3) - ) _0324_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[1] ), - .C(\alu_output_PFUMX_Z_C0_LUT4_Z_A[1] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0325_ ( - .ALUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT), - .C0(\alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[4] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0305) - ) _0326_ ( - .A(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[2] ), - .B(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[3] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_1_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h3faf) - ) _0327_ ( - .A(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] ), - .B(\alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[1] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .D(\alu_in_2[3] ), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0328_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0329_ ( - .ALUT(alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_PFUMX_Z_BLUT), - .C0(\alu_output_PFUMX_Z_C0_PFUMX_Z_C0[4] ), - .Z(\alu_output_PFUMX_Z_C0[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h00f7) - ) _0330_ ( - .A(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .B(\alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[1] ), - .C(\alu_in_2[3] ), - .D(\alu_output_PFUMX_Z_C0_PFUMX_Z_C0[3] ), - .Z(alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0331_ ( - .D0(alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1), - .SD(\alu_op_i[2] ), - .Z(\alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0332_ ( - .ALUT(alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[23] ), - .Z(alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hfff3) - ) _0333_ ( - .A(_0000_), - .B(\sum[23] ), - .C(\alu_op_i[1] ), - .D(\alu_op_i[0] ), - .Z(alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hfff3) - ) _0334_ ( - .A(_0000_), - .B(\sum[23] ), - .C(\alu_op_i[1] ), - .D(\alu_op_i[0] ), - .Z(alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0335_ ( - .ALUT(alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[23] ), - .Z(alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h33f0) - ) _0336_ ( - .A(_0000_), - .B(\alu_op_i[1] ), - .C(\alu_op_i[0] ), - .D(\alu_in_1[23] ), - .Z(alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0337_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0338_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_1_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hf0ff) - ) _0339_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_op_i[0] ), - .D(\alu_in_1[23] ), - .Z(alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hc500) - ) _0340_ ( - .A(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] ), - .B(\alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[1] ), - .C(\alu_in_2[3] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ), - .Z(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h3000) - ) _0341_ ( - .A(_0000_), - .B(\alu_in_2[3] ), - .C(\alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[1] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ), - .Z(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0100) - ) _0342_ ( - .A(\alu_in_2[0] ), - .B(\alu_in_2[1] ), - .C(\alu_in_2[2] ), - .D(\alu_in_1[31] ), - .Z(\alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0343_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_C0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h007f) - ) _0344_ ( - .A(\alu_in_1[31] ), - .B(\alu_in_2[31] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .D(\alu_output_PFUMX_Z_C0_PFUMX_Z_C0_LUT4_Z_D[3] ), - .Z(\alu_output_PFUMX_Z_C0_PFUMX_Z_C0[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0345_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[31] ), - .D(\alu_in_2[31] ), - .Z(\alu_output_PFUMX_Z_C0_PFUMX_Z_C0[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0100) - ) _0346_ ( - .A(\alu_op_i[0] ), - .B(\alu_op_i[1] ), - .C(\alu_op_i[2] ), - .D(\sum[31] ), - .Z(\alu_output_PFUMX_Z_C0_PFUMX_Z_C0_LUT4_Z_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0347_ ( - .A0(_0000_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[8] ), - .B1(\complement2_CCU2C_S0_B0[9] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\complement2_CCU2C_S0_COUT[8] ), - .COUT(\complement2_CCU2C_S0_COUT[10] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[8] ), - .S1(\complement2[9] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0348_ ( - .A0(_0000_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[6] ), - .B1(\complement2_CCU2C_S0_B0[7] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\complement2_CCU2C_S0_COUT[6] ), - .COUT(\complement2_CCU2C_S0_COUT[8] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[6] ), - .S1(\complement2[7] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hf3f5) - ) _0349_ ( - .A(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[0] ), - .B(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[1] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0350_ ( - .A0(_0000_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[18] ), - .B1(\complement2_CCU2C_S0_B0[19] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\complement2_CCU2C_S0_COUT[18] ), - .COUT(\complement2_CCU2C_S0_COUT[20] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[18] ), - .S1(\complement2[19] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0351_ ( - .A0(_0000_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[16] ), - .B1(\complement2_CCU2C_S0_B0[17] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\complement2_CCU2C_S0_COUT[16] ), - .COUT(\complement2_CCU2C_S0_COUT[18] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[16] ), - .S1(\complement2[17] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0352_ ( - .A0(_0000_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[14] ), - .B1(\complement2_CCU2C_S0_B0[15] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\complement2_CCU2C_S0_COUT[14] ), - .COUT(\complement2_CCU2C_S0_COUT[16] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[14] ), - .S1(\complement2[15] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0353_ ( - .A0(_0000_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[12] ), - .B1(\complement2_CCU2C_S0_B0[13] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\complement2_CCU2C_S0_COUT[12] ), - .COUT(\complement2_CCU2C_S0_COUT[14] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[12] ), - .S1(\complement2[13] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0354_ ( - .A0(_0000_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[10] ), - .B1(\complement2_CCU2C_S0_B0[11] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\complement2_CCU2C_S0_COUT[10] ), - .COUT(\complement2_CCU2C_S0_COUT[12] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[10] ), - .S1(\complement2[11] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0355_ ( - .A0(_0001_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[0] ), - .B1(\complement2_CCU2C_S0_B0[1] ), - .C0(_0000_), - .C1(_0000_), - .CIN(_0000_), - .COUT(\complement2_CCU2C_S0_COUT[2] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[0] ), - .S1(\complement2[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0356_ ( - .A0(_0000_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[4] ), - .B1(\complement2_CCU2C_S0_B0[5] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\complement2_CCU2C_S0_COUT[4] ), - .COUT(\complement2_CCU2C_S0_COUT[6] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[4] ), - .S1(\complement2[5] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0357_ ( - .A0(_0000_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[30] ), - .B1(\complement2_CCU2C_S0_B0[31] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\complement2_CCU2C_S0_COUT[30] ), - .COUT(\complement2_CCU2C_S0_3_COUT[31] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[30] ), - .S1(\complement2[31] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0358_ ( - .A0(_0000_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[2] ), - .B1(\complement2_CCU2C_S0_B0[3] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\complement2_CCU2C_S0_COUT[2] ), - .COUT(\complement2_CCU2C_S0_COUT[4] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[2] ), - .S1(\complement2[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0359_ ( - .A0(_0000_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[28] ), - .B1(\complement2_CCU2C_S0_B0[29] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\complement2_CCU2C_S0_COUT[28] ), - .COUT(\complement2_CCU2C_S0_COUT[30] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[28] ), - .S1(\complement2[29] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0360_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_2_A_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0361_ ( - .A0(_0000_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[26] ), - .B1(\complement2_CCU2C_S0_B0[27] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\complement2_CCU2C_S0_COUT[26] ), - .COUT(\complement2_CCU2C_S0_COUT[28] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[26] ), - .S1(\complement2[27] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0362_ ( - .A0(_0000_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[24] ), - .B1(\complement2_CCU2C_S0_B0[25] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\complement2_CCU2C_S0_COUT[24] ), - .COUT(\complement2_CCU2C_S0_COUT[26] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[24] ), - .S1(\complement2[25] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0363_ ( - .A0(_0000_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[22] ), - .B1(\complement2_CCU2C_S0_B0[23] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\complement2_CCU2C_S0_COUT[22] ), - .COUT(\complement2_CCU2C_S0_COUT[24] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[22] ), - .S1(\complement2[23] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:14.27-14.43|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0364_ ( - .A0(_0000_), - .A1(_0000_), - .B0(\complement2_CCU2C_S0_B0[20] ), - .B1(\complement2_CCU2C_S0_B0[21] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\complement2_CCU2C_S0_COUT[20] ), - .COUT(\complement2_CCU2C_S0_COUT[22] ), - .D0(_0001_), - .D1(_0001_), - .S0(\complement2[20] ), - .S1(\complement2[21] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0365_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[29] ), - .Z(\complement2_CCU2C_S0_B0[29] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0366_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[31] ), - .Z(\complement2_CCU2C_S0_B0[31] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0367_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[21] ), - .Z(\complement2_CCU2C_S0_B0[21] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0368_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[20] ), - .Z(\complement2_CCU2C_S0_B0[20] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0369_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[19] ), - .Z(\complement2_CCU2C_S0_B0[19] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0370_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[18] ), - .Z(\complement2_CCU2C_S0_B0[18] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0371_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[8] ), - .D(\alu_in_2[8] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0372_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[17] ), - .Z(\complement2_CCU2C_S0_B0[17] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0373_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[16] ), - .Z(\complement2_CCU2C_S0_B0[16] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0374_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[15] ), - .Z(\complement2_CCU2C_S0_B0[15] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0375_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[14] ), - .Z(\complement2_CCU2C_S0_B0[14] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0376_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[13] ), - .Z(\complement2_CCU2C_S0_B0[13] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0377_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[12] ), - .Z(\complement2_CCU2C_S0_B0[12] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0378_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[30] ), - .Z(\complement2_CCU2C_S0_B0[30] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0379_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[11] ), - .Z(\complement2_CCU2C_S0_B0[11] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0380_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[10] ), - .Z(\complement2_CCU2C_S0_B0[10] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0381_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[9] ), - .Z(\complement2_CCU2C_S0_B0[9] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0382_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[8] ), - .D(\alu_in_2[8] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0383_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[8] ), - .Z(\complement2_CCU2C_S0_B0[8] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0384_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[7] ), - .Z(\complement2_CCU2C_S0_B0[7] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0385_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[6] ), - .Z(\complement2_CCU2C_S0_B0[6] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0386_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[5] ), - .Z(\complement2_CCU2C_S0_B0[5] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0387_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[4] ), - .Z(\complement2_CCU2C_S0_B0[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0388_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[3] ), - .Z(\complement2_CCU2C_S0_B0[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0389_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[2] ), - .Z(\complement2_CCU2C_S0_B0[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0390_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[28] ), - .Z(\complement2_CCU2C_S0_B0[28] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0391_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[1] ), - .Z(\complement2_CCU2C_S0_B0[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0392_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[0] ), - .Z(\complement2_CCU2C_S0_B0[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hf2ff) - ) _0393_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] ), - .B(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[0] ), - .C(\alu_output_LUT4_Z_11_C[2] ), - .D(\alu_output_LUT4_Z_11_C[3] ), - .Z(\alu_output[5] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0394_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[27] ), - .Z(\complement2_CCU2C_S0_B0[27] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0395_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[26] ), - .Z(\complement2_CCU2C_S0_B0[26] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0396_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[25] ), - .Z(\complement2_CCU2C_S0_B0[25] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0397_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[24] ), - .Z(\complement2_CCU2C_S0_B0[24] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0398_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[23] ), - .Z(\complement2_CCU2C_S0_B0[23] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:114.33-115.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0399_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_2[22] ), - .Z(\complement2_CCU2C_S0_B0[22] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0400_ ( - .A(_0000_), - .B(\alu_in_2[31] ), - .C(\complement2[31] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[31] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0401_ ( - .A(_0000_), - .B(\alu_in_2[30] ), - .C(\complement2[30] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[30] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0402_ ( - .A(_0000_), - .B(\alu_in_2[21] ), - .C(\complement2[21] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[21] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0403_ ( - .A(_0000_), - .B(\alu_in_2[20] ), - .C(\complement2[20] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[20] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0007) - ) _0404_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[5] ), - .C(\alu_output_LUT4_Z_11_C_LUT4_Z_C[2] ), - .D(\alu_output_LUT4_Z_11_C_LUT4_Z_C[3] ), - .Z(\alu_output_LUT4_Z_11_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0405_ ( - .A(_0000_), - .B(\alu_in_2[19] ), - .C(\complement2[19] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[19] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0406_ ( - .A(_0000_), - .B(\alu_in_2[18] ), - .C(\complement2[18] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[18] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0407_ ( - .A(_0000_), - .B(\alu_in_2[17] ), - .C(\complement2[17] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[17] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0408_ ( - .A(_0000_), - .B(\alu_in_2[16] ), - .C(\complement2[16] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[16] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0409_ ( - .A(_0000_), - .B(\alu_in_2[15] ), - .C(\complement2[15] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[15] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0410_ ( - .A(_0000_), - .B(\alu_in_2[14] ), - .C(\complement2[14] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[14] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0411_ ( - .A(_0000_), - .B(\alu_in_2[13] ), - .C(\complement2[13] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[13] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0412_ ( - .A(_0000_), - .B(\alu_in_2[12] ), - .C(\complement2[12] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[12] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0413_ ( - .A(_0000_), - .B(\alu_in_2[29] ), - .C(\complement2[29] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[29] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0414_ ( - .A(_0000_), - .B(\alu_in_2[11] ), - .C(\complement2[11] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[11] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0415_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[5] ), - .D(\alu_in_2[5] ), - .Z(\alu_output_LUT4_Z_11_C_LUT4_Z_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0416_ ( - .A(_0000_), - .B(\alu_in_2[10] ), - .C(\complement2[10] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[10] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0417_ ( - .A(_0000_), - .B(\alu_in_2[9] ), - .C(\complement2[9] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[9] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0418_ ( - .A(_0000_), - .B(\alu_in_2[8] ), - .C(\complement2[8] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[8] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0419_ ( - .A(_0000_), - .B(\alu_in_2[7] ), - .C(\complement2[7] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[7] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0420_ ( - .A(_0000_), - .B(\alu_in_2[6] ), - .C(\complement2[6] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[6] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0421_ ( - .A(_0000_), - .B(\alu_in_2[5] ), - .C(\complement2[5] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[5] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0422_ ( - .A(_0000_), - .B(\alu_in_2[4] ), - .C(\complement2[4] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0423_ ( - .A(_0000_), - .B(\alu_in_2[3] ), - .C(\complement2[3] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0424_ ( - .A(_0000_), - .B(\alu_in_2[2] ), - .C(\complement2[2] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0425_ ( - .A(_0000_), - .B(\alu_in_2[28] ), - .C(\complement2[28] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[28] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0426_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[5] ), - .D(\alu_in_2[5] ), - .Z(\alu_output_LUT4_Z_11_C_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0427_ ( - .A(_0000_), - .B(\alu_in_2[1] ), - .C(\complement2[1] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0428_ ( - .A(_0000_), - .B(\alu_in_2[0] ), - .C(\complement2[0] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0429_ ( - .A(_0000_), - .B(\alu_in_2[27] ), - .C(\complement2[27] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[27] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0430_ ( - .A(_0000_), - .B(\alu_in_2[26] ), - .C(\complement2[26] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[26] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0431_ ( - .A(_0000_), - .B(\alu_in_2[25] ), - .C(\complement2[25] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[25] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0432_ ( - .A(_0000_), - .B(\alu_in_2[24] ), - .C(\complement2[24] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[24] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0433_ ( - .A(_0000_), - .B(\alu_in_2[23] ), - .C(\complement2[23] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[23] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0434_ ( - .A(_0000_), - .B(\alu_in_2[22] ), - .C(\complement2[22] ), - .D(\complement2_LUT4_C_D[2] ), - .Z(\sum_CCU2C_S0_B0[22] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h00cf) - ) _0435_ ( - .A(_0000_), - .B(\alu_op_i[0] ), - .C(\alu_op_i[1] ), - .D(\alu_op_i[3] ), - .Z(\complement2_LUT4_C_D[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0436_ ( - .A0(\alu_in_1[8] ), - .A1(\alu_in_1[9] ), - .B0(\sum_CCU2C_S0_B0[8] ), - .B1(\sum_CCU2C_S0_B0[9] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\sum_CCU2C_S0_COUT[8] ), - .COUT(\sum_CCU2C_S0_COUT[10] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[8] ), - .S1(\sum[9] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0437_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .Z(\alu_output_LUT4_Z_11_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0438_ ( - .A0(\alu_in_1[6] ), - .A1(\alu_in_1[7] ), - .B0(\sum_CCU2C_S0_B0[6] ), - .B1(\sum_CCU2C_S0_B0[7] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\sum_CCU2C_S0_COUT[6] ), - .COUT(\sum_CCU2C_S0_COUT[8] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[6] ), - .S1(\sum[7] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0439_ ( - .A0(\alu_in_1[18] ), - .A1(\alu_in_1[19] ), - .B0(\sum_CCU2C_S0_B0[18] ), - .B1(\sum_CCU2C_S0_B0[19] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\sum_CCU2C_S0_COUT[18] ), - .COUT(\sum_CCU2C_S0_COUT[20] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[18] ), - .S1(\sum[19] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0440_ ( - .A0(\alu_in_1[16] ), - .A1(\alu_in_1[17] ), - .B0(\sum_CCU2C_S0_B0[16] ), - .B1(\sum_CCU2C_S0_B0[17] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\sum_CCU2C_S0_COUT[16] ), - .COUT(\sum_CCU2C_S0_COUT[18] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[16] ), - .S1(\sum[17] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0441_ ( - .A0(\alu_in_1[14] ), - .A1(\alu_in_1[15] ), - .B0(\sum_CCU2C_S0_B0[14] ), - .B1(\sum_CCU2C_S0_B0[15] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\sum_CCU2C_S0_COUT[14] ), - .COUT(\sum_CCU2C_S0_COUT[16] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[14] ), - .S1(\sum[15] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0442_ ( - .A0(\alu_in_1[12] ), - .A1(\alu_in_1[13] ), - .B0(\sum_CCU2C_S0_B0[12] ), - .B1(\sum_CCU2C_S0_B0[13] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\sum_CCU2C_S0_COUT[12] ), - .COUT(\sum_CCU2C_S0_COUT[14] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[12] ), - .S1(\sum[13] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0443_ ( - .A0(\alu_in_1[10] ), - .A1(\alu_in_1[11] ), - .B0(\sum_CCU2C_S0_B0[10] ), - .B1(\sum_CCU2C_S0_B0[11] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\sum_CCU2C_S0_COUT[10] ), - .COUT(\sum_CCU2C_S0_COUT[12] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[10] ), - .S1(\sum[11] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0444_ ( - .A0(\alu_in_1[0] ), - .A1(\alu_in_1[1] ), - .B0(\sum_CCU2C_S0_B0[0] ), - .B1(\sum_CCU2C_S0_B0[1] ), - .C0(_0000_), - .C1(_0000_), - .CIN(_0000_), - .COUT(\sum_CCU2C_S0_COUT[2] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[0] ), - .S1(\sum[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0445_ ( - .A0(\alu_in_1[4] ), - .A1(\alu_in_1[5] ), - .B0(\sum_CCU2C_S0_B0[4] ), - .B1(\sum_CCU2C_S0_B0[5] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\sum_CCU2C_S0_COUT[4] ), - .COUT(\sum_CCU2C_S0_COUT[6] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[4] ), - .S1(\sum[5] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0446_ ( - .A0(\alu_in_1[30] ), - .A1(\alu_in_1[31] ), - .B0(\sum_CCU2C_S0_B0[30] ), - .B1(\sum_CCU2C_S0_B0[31] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\sum_CCU2C_S0_COUT[30] ), - .COUT(\sum_CCU2C_S0_3_COUT[31] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[30] ), - .S1(\sum[31] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0447_ ( - .A0(\alu_in_1[2] ), - .A1(\alu_in_1[3] ), - .B0(\sum_CCU2C_S0_B0[2] ), - .B1(\sum_CCU2C_S0_B0[3] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\sum_CCU2C_S0_COUT[2] ), - .COUT(\sum_CCU2C_S0_COUT[4] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[2] ), - .S1(\sum[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0448_ ( - .ALUT(alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[4] ), - .Z(alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h4f44) - ) _0449_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ), - .C(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[2] ), - .D(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[3] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0450_ ( - .A0(\alu_in_1[28] ), - .A1(\alu_in_1[29] ), - .B0(\sum_CCU2C_S0_B0[28] ), - .B1(\sum_CCU2C_S0_B0[29] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\sum_CCU2C_S0_COUT[28] ), - .COUT(\sum_CCU2C_S0_COUT[30] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[28] ), - .S1(\sum[29] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0451_ ( - .A0(\alu_in_1[26] ), - .A1(\alu_in_1[27] ), - .B0(\sum_CCU2C_S0_B0[26] ), - .B1(\sum_CCU2C_S0_B0[27] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\sum_CCU2C_S0_COUT[26] ), - .COUT(\sum_CCU2C_S0_COUT[28] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[26] ), - .S1(\sum[27] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0452_ ( - .A0(\alu_in_1[24] ), - .A1(\alu_in_1[25] ), - .B0(\sum_CCU2C_S0_B0[24] ), - .B1(\sum_CCU2C_S0_B0[25] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\sum_CCU2C_S0_COUT[24] ), - .COUT(\sum_CCU2C_S0_COUT[26] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[24] ), - .S1(\sum[25] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0453_ ( - .A0(\alu_in_1[22] ), - .A1(\alu_in_1[23] ), - .B0(\sum_CCU2C_S0_B0[22] ), - .B1(\sum_CCU2C_S0_B0[23] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\sum_CCU2C_S0_COUT[22] ), - .COUT(\sum_CCU2C_S0_COUT[24] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[22] ), - .S1(\sum[23] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:15.19-15.108|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _0454_ ( - .A0(\alu_in_1[20] ), - .A1(\alu_in_1[21] ), - .B0(\sum_CCU2C_S0_B0[20] ), - .B1(\sum_CCU2C_S0_B0[21] ), - .C0(_0000_), - .C1(_0000_), - .CIN(\sum_CCU2C_S0_COUT[20] ), - .COUT(\sum_CCU2C_S0_COUT[22] ), - .D0(_0001_), - .D1(_0001_), - .S0(\sum[20] ), - .S1(\sum[21] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0c0a) - ) _0455_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[1] ), - .B(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B[0] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0456_ ( - .D0(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0457_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0458_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[11] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0459_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[9] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0460_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0461_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[12] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0462_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[10] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hf0cc) - ) _0463_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B[0] ), - .C(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[1] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0464_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0465_ ( - .D0(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0466_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0467_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[7] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0468_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[5] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0469_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0470_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[8] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0471_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[6] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hf5f3) - ) _0472_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[0] ), - .B(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[2] ), - .C(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[2] ), - .D(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hf0cc) - ) _0473_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[0] ), - .C(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[1] ), - .D(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_1_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hf0cc) - ) _0474_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[0] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[1] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0475_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_2_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0476_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0305) - ) _0477_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[2] ), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[3] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0478_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0479_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_BLUT), - .C0(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0480_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[2] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0481_ ( - .D0(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_D0), - .D1(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z), - .SD(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0482_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0483_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0484_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0485_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[9] ), - .D(\alu_in_2[9] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0486_ ( - .D0(alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D0), - .D1(alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[5] ), - .Z(alu_output_L6MUX21_Z_2_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h001f) - ) _0487_ ( - .A(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[3] ), - .B(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[2] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ), - .D(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_Z_1_D[3] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0488_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[9] ), - .D(\alu_in_2[9] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_Z_1_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h0003) - ) _0489_ ( - .A(_0000_), - .B(\alu_op_i[0] ), - .C(\alu_op_i[1] ), - .D(\alu_op_i[2] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0490_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[2] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0491_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_1_Z), - .C0(\alu_in_2[3] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0007) - ) _0492_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[1] ), - .C(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[2] ), - .D(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[3] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[5] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'hf000) - ) _0493_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[1] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'h0f00) - ) _0494_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[0] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0495_ ( - .D0(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D1), - .SD(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0496_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0497_ ( - .ALUT(alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[4] ), - .Z(alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0498_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[2] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0499_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[0] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0500_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0501_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[3] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0502_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[1] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0503_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[17] ), - .D(\alu_in_2[17] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h007f) - ) _0504_ ( - .A(\alu_in_1[17] ), - .B(\alu_in_2[17] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .D(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_LUT4_Z_1_D[3] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0100) - ) _0505_ ( - .A(\alu_op_i[0] ), - .B(\alu_op_i[1] ), - .C(\alu_op_i[2] ), - .D(\sum[17] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_LUT4_Z_1_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0506_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[1] ), - .D(\alu_in_2[1] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0507_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[1] ), - .D(\alu_in_2[1] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0508_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0509_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0f33) - ) _0510_ ( - .A(_0000_), - .B(\alu_in_1[3] ), - .C(\alu_in_1[4] ), - .D(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0511_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[2] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hf0cc) - ) _0512_ ( - .A(_0000_), - .B(\alu_in_1[1] ), - .C(\alu_in_1[2] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0513_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0514_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_1_ALUT), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_1_BLUT), - .C0(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hfff0) - ) _0515_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[2] ), - .D(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_1_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hf0cc) - ) _0516_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[1] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[3] ), - .D(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_1_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h5f3f) - ) _0517_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[0] ), - .B(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[1] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0518_ ( - .D0(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0519_ ( - .D0(alu_output_L6MUX21_Z_1_D0), - .D1(alu_output_L6MUX21_Z_1_D1), - .SD(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[5] ), - .Z(\alu_output[7] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0520_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0521_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0522_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[15] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0523_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[13] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0524_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0525_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[16] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0526_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[14] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0a0c) - ) _0527_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[0] ), - .B(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[1] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0100) - ) _0528_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[3] ), - .B(\alu_in_2[2] ), - .C(\alu_in_2[3] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0529_ ( - .ALUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h3f5f) - ) _0530_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[1] ), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[2] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0531_ ( - .ALUT(alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[4] ), - .Z(alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0532_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0533_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0534_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_11_C_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hf8ff) - ) _0535_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] ), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] ), - .C(\alu_output_LUT4_Z_12_C[2] ), - .D(\alu_output_LUT4_Z_12_C[3] ), - .Z(\alu_output[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0536_ ( - .D0(alu_output_LUT4_Z_12_C_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_12_C_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .Z(\alu_output_LUT4_Z_12_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0537_ ( - .ALUT(alu_output_LUT4_Z_12_C_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_12_C_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[4] ), - .Z(alu_output_LUT4_Z_12_C_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0538_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_12_C_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0539_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_12_C_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0540_ ( - .ALUT(alu_output_LUT4_Z_12_C_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_12_C_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[4] ), - .Z(alu_output_LUT4_Z_12_C_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h000f) - ) _0541_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_5_B_LUT4_Z_A[2] ), - .D(\alu_in_2[5] ), - .Z(alu_output_LUT4_Z_12_C_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0542_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h0003) - ) _0543_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_5_B_LUT4_Z_A[0] ), - .C(\alu_output_LUT4_Z_5_B_LUT4_Z_A[1] ), - .D(\alu_in_2[5] ), - .Z(alu_output_LUT4_Z_12_C_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0007) - ) _0544_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[2] ), - .C(\alu_output_LUT4_Z_12_C_LUT4_Z_C[2] ), - .D(\alu_output_LUT4_Z_12_C_LUT4_Z_C[3] ), - .Z(\alu_output_LUT4_Z_12_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0545_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[2] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_12_C_LUT4_Z_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0546_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[2] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_12_C_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0547_ ( - .D0(alu_output_LUT4_Z_1_B_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_1_B_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ), - .Z(\alu_output_LUT4_Z_1_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0548_ ( - .D0(alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] ), - .Z(alu_output_LUT4_Z_1_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0549_ ( - .ALUT(alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .Z(alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0550_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'hf000) - ) _0551_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] ), - .Z(alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0552_ ( - .ALUT(alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .Z(alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h4f44) - ) _0553_ ( - .A(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[0] ), - .B(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ), - .C(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[2] ), - .D(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[3] ), - .Z(alu_output_L6MUX21_Z_2_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0554_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'hfff8) - ) _0555_ ( - .A(\alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[3] ), - .Z(alu_output_LUT4_Z_1_B_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0556_ ( - .D0(alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] ), - .Z(alu_output_LUT4_Z_1_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0557_ ( - .ALUT(alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .Z(alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0558_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0559_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0560_ ( - .ALUT(alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .Z(alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0561_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0562_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_1_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0007) - ) _0563_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[28] ), - .C(\alu_output_LUT4_Z_1_B_LUT4_Z_C[2] ), - .D(\alu_output_LUT4_Z_1_B_LUT4_Z_C[3] ), - .Z(\alu_output_LUT4_Z_1_B[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0564_ ( - .D0(alu_output_L6MUX21_Z_3_D0), - .D1(alu_output_L6MUX21_Z_3_D1), - .SD(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[5] ), - .Z(\alu_output[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0100) - ) _0565_ ( - .A(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[3] ), - .B(\alu_in_2[2] ), - .C(\alu_in_2[3] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .Z(\alu_output_LUT4_Z_1_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0566_ ( - .D0(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0567_ ( - .D0(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D0), - .D1(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0568_ ( - .ALUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0569_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[26] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0570_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[24] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0571_ ( - .ALUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0572_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[27] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0573_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[25] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0574_ ( - .D0(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D0), - .D1(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0575_ ( - .ALUT(alu_output_L6MUX21_Z_3_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_L6MUX21_Z_3_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[4] ), - .Z(alu_output_L6MUX21_Z_3_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0576_ ( - .ALUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0577_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[22] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0578_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[20] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0579_ ( - .ALUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0580_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[23] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0581_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[21] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_2_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0582_ ( - .D0(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D0), - .D1(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0583_ ( - .ALUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0584_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[18] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0585_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[16] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0586_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_3_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0587_ ( - .ALUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0588_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[19] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0589_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[17] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_3_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0590_ ( - .ALUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0591_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[30] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0592_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[28] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0593_ ( - .ALUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0594_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[31] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0595_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[29] ), - .Z(alu_output_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0596_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[28] ), - .D(\alu_in_2[28] ), - .Z(\alu_output_LUT4_Z_1_B_LUT4_Z_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0597_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_3_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0598_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[28] ), - .D(\alu_in_2[28] ), - .Z(\alu_output_LUT4_Z_1_B_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hfeff) - ) _0599_ ( - .A(\alu_output_LUT4_Z_2_A[0] ), - .B(\alu_output_LUT4_Z_2_A[1] ), - .C(\alu_output_LUT4_Z_2_A[2] ), - .D(\alu_output_LUT4_Z_2_A[3] ), - .Z(\alu_output[25] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0600_ ( - .D0(alu_output_LUT4_Z_2_A_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_2_A_L6MUX21_Z_D1), - .SD(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .Z(\alu_output_LUT4_Z_2_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0601_ ( - .D0(alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ), - .Z(alu_output_LUT4_Z_2_A_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0602_ ( - .ALUT(alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] ), - .Z(alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0603_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h000f) - ) _0604_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[0] ), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] ), - .Z(alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0605_ ( - .ALUT(alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] ), - .Z(alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0606_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0607_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_2_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0608_ ( - .ALUT(alu_output_L6MUX21_Z_3_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_L6MUX21_Z_3_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[4] ), - .Z(alu_output_L6MUX21_Z_3_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0609_ ( - .D0(alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ), - .Z(alu_output_LUT4_Z_2_A_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0610_ ( - .ALUT(alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] ), - .Z(alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0611_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'hfff0) - ) _0612_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[2] ), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[3] ), - .Z(alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0613_ ( - .ALUT(alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] ), - .Z(alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0614_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0615_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_2_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0616_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[25] ), - .D(\alu_in_2[25] ), - .Z(\alu_output_LUT4_Z_2_A[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0617_ ( - .ALUT(alu_output_LUT4_Z_2_A_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_2_A_PFUMX_Z_BLUT), - .C0(\sum[25] ), - .Z(\alu_output_LUT4_Z_2_A[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0618_ ( - .ALUT(alu_output_LUT4_Z_2_A_PFUMX_Z_1_ALUT), - .BLUT(alu_output_LUT4_Z_2_A_PFUMX_Z_1_BLUT), - .C0(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .Z(\alu_output_LUT4_Z_2_A[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0619_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_3_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0305) - ) _0620_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[2] ), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[3] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_2_A_PFUMX_Z_1_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0621_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_2_A_PFUMX_Z_1_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h007f) - ) _0622_ ( - .A(\alu_in_2[25] ), - .B(\alu_in_1[25] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .D(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .Z(alu_output_LUT4_Z_2_A_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h3fff) - ) _0623_ ( - .A(_0000_), - .B(\alu_in_2[25] ), - .C(\alu_in_1[25] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .Z(alu_output_LUT4_Z_2_A_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hf8ff) - ) _0624_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[20] ), - .C(\alu_output_LUT4_Z_3_C[2] ), - .D(\alu_output_LUT4_Z_3_C[3] ), - .Z(\alu_output[20] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0625_ ( - .D0(alu_output_LUT4_Z_3_C_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] ), - .Z(\alu_output_LUT4_Z_3_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0626_ ( - .D0(alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0627_ ( - .ALUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0628_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0629_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0630_ ( - .ALUT(alu_output_L6MUX21_Z_1_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_L6MUX21_Z_1_D0_PFUMX_Z_BLUT), - .C0(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[4] ), - .Z(alu_output_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hf040) - ) _0631_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[0] ), - .B(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .C(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .D(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[3] ), - .Z(alu_output_L6MUX21_Z_3_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0632_ ( - .ALUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0633_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0634_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0635_ ( - .D0(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0636_ ( - .ALUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0637_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0638_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h5300) - ) _0639_ ( - .A(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_A_L6MUX21_Z_SD[2] ), - .C(\alu_in_2[2] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h5300) - ) _0640_ ( - .A(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[0] ), - .B(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[1] ), - .C(\alu_in_2[2] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0641_ ( - .D0(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D1), - .SD(\alu_in_2[1] ), - .Z(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0642_ ( - .ALUT(alu_output_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[4] ), - .Z(alu_output_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0643_ ( - .D0(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D0), - .D1(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D1), - .SD(\alu_in_2[1] ), - .Z(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0644_ ( - .ALUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0645_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[7] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0646_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[8] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0647_ ( - .ALUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0648_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[5] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0649_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[6] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_1_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0650_ ( - .ALUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0651_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[11] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0652_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[12] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0653_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0654_ ( - .ALUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0655_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[9] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0656_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[10] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0657_ ( - .D0(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1), - .SD(\alu_in_2[3] ), - .Z(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[5] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0658_ ( - .D0(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D0), - .D1(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D1), - .SD(\alu_in_2[1] ), - .Z(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0659_ ( - .ALUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0660_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[15] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0661_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[16] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0662_ ( - .ALUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0663_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[13] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0664_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0665_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[14] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_1_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0666_ ( - .D0(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[4] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0667_ ( - .ALUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0668_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0669_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0670_ ( - .ALUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0671_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'hfeff) - ) _0672_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0673_ ( - .D0(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[4] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0674_ ( - .ALUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0675_ ( - .ALUT(alu_output_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[4] ), - .Z(alu_output_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0100) - ) _0676_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h0100) - ) _0677_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0678_ ( - .ALUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0679_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0680_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h5300) - ) _0681_ ( - .A(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[1] ), - .B(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[0] ), - .C(\alu_in_2[2] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_B_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h3f00) - ) _0682_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .C(\alu_in_2[5] ), - .D(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[5] ), - .Z(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hacff) - ) _0683_ ( - .A(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[1] ), - .B(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[2] ), - .C(\alu_in_2[1] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hacff) - ) _0684_ ( - .A(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z_LUT4_Z_1_A[0] ), - .B(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[0] ), - .C(\alu_in_2[1] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0685_ ( - .A(_0000_), - .B(\alu_in_1[19] ), - .C(\alu_in_1[20] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z_LUT4_Z_1_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0686_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0687_ ( - .ALUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0688_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h000f) - ) _0689_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[0] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[1] ), - .Z(alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h000b) - ) _0690_ ( - .A(\alu_output_LUT4_Z_3_C_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .C(\alu_output_LUT4_Z_3_C_LUT4_Z_C[2] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_C[3] ), - .Z(\alu_output_LUT4_Z_3_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h4f44) - ) _0691_ ( - .A(\alu_output_LUT4_Z_3_C_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ), - .C(\alu_output_LUT4_Z_3_C_LUT4_Z_A[2] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_A[3] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0692_ ( - .ALUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z), - .BLUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_BLUT), - .C0(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0693_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h0300) - ) _0694_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[3] ), - .C(\alu_in_2[2] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h3f00) - ) _0695_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0007) - ) _0696_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[4] ), - .C(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[2] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[3] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00fe) - ) _0697_ ( - .A(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[0] ), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[1] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[2] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ), - .Z(alu_output_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0698_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[4] ), - .D(\alu_in_2[4] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0699_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[4] ), - .D(\alu_in_2[4] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0c0a) - ) _0700_ ( - .A(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[0] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0701_ ( - .D0(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0702_ ( - .D0(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0), - .D1(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0703_ ( - .D0(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0704_ ( - .ALUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0705_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0706_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[0] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0707_ ( - .ALUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0bff) - ) _0708_ ( - .A(\alu_output_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_A[1] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ), - .D(\alu_output_LUT4_Z_A[3] ), - .Z(\alu_output[29] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0709_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0710_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[2] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0711_ ( - .D0(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0712_ ( - .ALUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0713_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0714_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[1] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _0715_ ( - .ALUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0716_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0717_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[3] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0718_ ( - .ALUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hfcff) - ) _0719_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_1_B[0] ), - .C(\alu_output_LUT4_Z_1_B[1] ), - .D(\alu_output_LUT4_Z_1_B[2] ), - .Z(\alu_output[28] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0720_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[6] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0721_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[4] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0722_ ( - .ALUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0723_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[7] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0724_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[5] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h000b) - ) _0725_ ( - .A(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[0] ), - .B(\alu_in_2[2] ), - .C(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[2] ), - .D(\alu_in_2[3] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0726_ ( - .D0(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1), - .SD(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0727_ ( - .ALUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0728_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[2] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0729_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[0] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hfcff) - ) _0730_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_10_B[0] ), - .C(\alu_output_LUT4_Z_10_B[1] ), - .D(\alu_output_LUT4_Z_10_B[2] ), - .Z(\alu_output[8] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0731_ ( - .ALUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0732_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[3] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0733_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[1] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'h0f00) - ) _0734_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_in_2[5] ), - .D(\alu_in_2[4] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h3000) - ) _0735_ ( - .A(_0000_), - .B(\alu_op_i[1] ), - .C(\alu_op_i[0] ), - .D(\alu_op_i[2] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0736_ ( - .ALUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h3f5f) - ) _0737_ ( - .A(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[0] ), - .B(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[1] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0738_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0739_ ( - .ALUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0740_ ( - .ALUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_1_ALUT), - .BLUT(alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_1_BLUT), - .C0(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0741_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_1_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0007) - ) _0742_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[8] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_C[2] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_C[3] ), - .Z(\alu_output_LUT4_Z_10_B[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hfff0) - ) _0743_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[2] ), - .D(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_1_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hf0cc) - ) _0744_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[1] ), - .C(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[3] ), - .D(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_1_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h5f3f) - ) _0745_ ( - .A(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[0] ), - .B(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[1] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0746_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_3_C_LUT4_Z_A_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0747_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[20] ), - .D(\alu_in_2[20] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0748_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[20] ), - .D(\alu_in_2[20] ), - .Z(\alu_output_LUT4_Z_3_C_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hf4ff) - ) _0749_ ( - .A(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[0] ), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .C(\alu_output_LUT4_Z_4_C[2] ), - .D(\alu_output_LUT4_Z_4_C[3] ), - .Z(\alu_output[19] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0750_ ( - .D0(alu_output_LUT4_Z_4_C_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_4_C_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] ), - .Z(\alu_output_LUT4_Z_4_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0751_ ( - .ALUT(alu_output_LUT4_Z_4_C_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_4_C_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_LUT4_Z_4_C_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0752_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_4_C_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hf100) - ) _0753_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B[1] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B[2] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ), - .Z(\alu_output_LUT4_Z_10_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0754_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_4_C_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0755_ ( - .ALUT(alu_output_LUT4_Z_4_C_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_4_C_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_LUT4_Z_4_C_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hf0f3) - ) _0756_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_9_B_LUT4_Z_1_B[0] ), - .C(\alu_output_LUT4_Z_9_B_LUT4_Z_1_B[2] ), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .Z(alu_output_LUT4_Z_4_C_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hf0f3) - ) _0757_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_9_B_LUT4_Z_1_B[1] ), - .C(\alu_output_LUT4_Z_9_B_LUT4_Z_1_B[2] ), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .Z(alu_output_LUT4_Z_4_C_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0758_ ( - .ALUT(alu_output_LUT4_Z_4_C_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_4_C_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_4_C_PFUMX_Z_C0[4] ), - .Z(\alu_output_LUT4_Z_4_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0759_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_4_C_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0777) - ) _0760_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .B(\alu_output_LUT4_Z_4_C_PFUMX_Z_C0[1] ), - .C(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .D(\sum[19] ), - .Z(alu_output_LUT4_Z_4_C_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'hf000) - ) _0761_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_in_1[19] ), - .D(\alu_in_2[19] ), - .Z(\alu_output_LUT4_Z_4_C_PFUMX_Z_C0[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0762_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[19] ), - .D(\alu_in_2[19] ), - .Z(\alu_output_LUT4_Z_4_C_PFUMX_Z_C0[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h30ff) - ) _0763_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_5_B[0] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] ), - .D(\alu_output_LUT4_Z_5_B[2] ), - .Z(\alu_output[18] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hf5f3) - ) _0764_ ( - .A(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B[1] ), - .B(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_B_Z[0] ), - .C(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hb000) - ) _0765_ ( - .A(\alu_output_LUT4_Z_5_B_LUT4_Z_A[2] ), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .C(\alu_output_LUT4_Z_5_B_LUT4_Z_C[2] ), - .D(\alu_output_LUT4_Z_5_B_LUT4_Z_C[3] ), - .Z(\alu_output_LUT4_Z_5_B[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0766_ ( - .D0(alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D1), - .SD(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_5_B_LUT4_Z_A[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0767_ ( - .ALUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0768_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[2] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0769_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[0] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0770_ ( - .ALUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0771_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[3] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0772_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[1] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hca00) - ) _0773_ ( - .A(\alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[1] ), - .B(\alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B[1] ), - .C(\alu_in_2[2] ), - .D(\alu_in_2[3] ), - .Z(\alu_output_LUT4_Z_5_B_LUT4_Z_A[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0774_ ( - .D0(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'hf000) - ) _0775_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .D(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0776_ ( - .ALUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0777_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[16] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0778_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[14] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0779_ ( - .ALUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0780_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[17] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0781_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[15] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0782_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[0] ), - .C(\alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B[1] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0783_ ( - .D0(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0784_ ( - .ALUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0785_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[12] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0007) - ) _0786_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[16] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[2] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[3] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0787_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[10] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0788_ ( - .ALUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0789_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[13] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0790_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[11] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0791_ ( - .ALUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT), - .C0(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_5_B_LUT4_Z_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h00f0) - ) _0792_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[2] ), - .D(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0003) - ) _0793_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[0] ), - .C(\alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[1] ), - .D(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0794_ ( - .D0(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0795_ ( - .ALUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0796_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[8] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0797_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[16] ), - .D(\alu_in_2[16] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0798_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[6] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0799_ ( - .ALUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0800_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[9] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0801_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[7] ), - .Z(alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hca00) - ) _0802_ ( - .A(\alu_in_1[4] ), - .B(\alu_in_1[5] ), - .C(\alu_in_2[0] ), - .D(\alu_in_2[1] ), - .Z(\alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0c0a) - ) _0803_ ( - .A(\alu_in_1[2] ), - .B(\alu_in_1[3] ), - .C(\alu_in_2[1] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h533f) - ) _0804_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .C(\alu_in_1[18] ), - .D(\alu_in_2[18] ), - .Z(\alu_output_LUT4_Z_5_B_LUT4_Z_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h0f33) - ) _0805_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_5_B_LUT4_Z_C_LUT4_Z_1_B[0] ), - .C(\alu_in_2[18] ), - .D(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .Z(\alu_output_LUT4_Z_5_B_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0100) - ) _0806_ ( - .A(\alu_op_i[0] ), - .B(\alu_op_i[1] ), - .C(\alu_op_i[2] ), - .D(\sum[18] ), - .Z(\alu_output_LUT4_Z_5_B_LUT4_Z_C_LUT4_Z_1_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0807_ ( - .ALUT(alu_output_LUT4_Z_5_B_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_5_B_PFUMX_Z_BLUT), - .C0(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .Z(\alu_output_LUT4_Z_5_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0808_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[16] ), - .D(\alu_in_2[16] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hff0f) - ) _0809_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_LUT4_Z_5_B_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0810_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] ), - .C(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_LUT4_Z_5_B_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hfeff) - ) _0811_ ( - .A(\alu_output_LUT4_Z_6_A[0] ), - .B(\alu_output_LUT4_Z_6_A[1] ), - .C(\alu_output_LUT4_Z_6_A[2] ), - .D(\alu_output_LUT4_Z_6_A[3] ), - .Z(\alu_output[15] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0812_ ( - .D0(alu_output_LUT4_Z_6_A_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .Z(\alu_output_LUT4_Z_6_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0813_ ( - .ALUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0814_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0815_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0816_ ( - .ALUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hf5f3) - ) _0817_ ( - .A(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] ), - .B(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] ), - .C(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] ), - .D(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0818_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h00bf) - ) _0819_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .B(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[1] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[2] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0820_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] ), - .C(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[1] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hf0cc) - ) _0821_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B[0] ), - .C(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[0] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0822_ ( - .D0(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0823_ ( - .ALUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0824_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[25] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0825_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[23] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0826_ ( - .ALUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0827_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[26] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0828_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[24] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0829_ ( - .D0(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hf100) - ) _0830_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B[1] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B[2] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0831_ ( - .ALUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0832_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[21] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0833_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[19] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0834_ ( - .ALUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0835_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[22] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0836_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[20] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hf0cc) - ) _0837_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] ), - .C(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B[0] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0838_ ( - .D0(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0839_ ( - .ALUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0840_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[29] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h003f) - ) _0841_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .C(\alu_op_i[3] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0842_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[27] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0843_ ( - .ALUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0844_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[30] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0845_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[28] ), - .Z(alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h0300) - ) _0846_ ( - .A(_0000_), - .B(\alu_in_2[0] ), - .C(\alu_in_2[1] ), - .D(\alu_in_1[31] ), - .Z(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0847_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[15] ), - .D(\alu_in_2[15] ), - .Z(\alu_output_LUT4_Z_6_A[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h5300) - ) _0848_ ( - .A(\alu_output_PFUMX_Z_C0_LUT4_Z_A[1] ), - .B(\alu_output_PFUMX_Z_C0_LUT4_Z_B[0] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ), - .Z(\alu_output_LUT4_Z_6_A[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0849_ ( - .ALUT(alu_output_LUT4_Z_6_A_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_6_A_PFUMX_Z_BLUT), - .C0(\sum[15] ), - .Z(\alu_output_LUT4_Z_6_A[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h007f) - ) _0850_ ( - .A(\alu_in_2[15] ), - .B(\alu_in_1[15] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .D(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .Z(alu_output_LUT4_Z_6_A_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h3fff) - ) _0851_ ( - .A(_0000_), - .B(\alu_in_2[15] ), - .C(\alu_in_1[15] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .Z(alu_output_LUT4_Z_6_A_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hffff) - ) _0852_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_1_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0007) - ) _0853_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[24] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[2] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[3] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[5] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hfeff) - ) _0854_ ( - .A(\alu_output_LUT4_Z_7_A[0] ), - .B(\alu_output_LUT4_Z_7_A[1] ), - .C(\alu_output_LUT4_Z_7_A[2] ), - .D(\alu_output_LUT4_Z_7_A[3] ), - .Z(\alu_output[13] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0855_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[13] ), - .D(\alu_in_2[13] ), - .Z(\alu_output_LUT4_Z_7_A[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hf400) - ) _0856_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[0] ), - .B(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[1] ), - .C(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[2] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .Z(\alu_output_LUT4_Z_7_A[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h5300) - ) _0857_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[0] ), - .B(\alu_output_LUT4_Z_A_LUT4_Z_1_B[1] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ), - .Z(\alu_output_LUT4_Z_7_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'h0f00) - ) _0858_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_op_i[0] ), - .D(\alu_op_i[2] ), - .Z(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h3000) - ) _0859_ ( - .A(_0000_), - .B(\alu_op_i[0] ), - .C(\alu_op_i[1] ), - .D(\alu_op_i[2] ), - .Z(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0860_ ( - .ALUT(alu_output_LUT4_Z_7_A_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_7_A_PFUMX_Z_BLUT), - .C0(\sum[13] ), - .Z(\alu_output_LUT4_Z_7_A[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h007f) - ) _0861_ ( - .A(\alu_in_2[13] ), - .B(\alu_in_1[13] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .D(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .Z(alu_output_LUT4_Z_7_A_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h3fff) - ) _0862_ ( - .A(_0000_), - .B(\alu_in_2[13] ), - .C(\alu_in_1[13] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .Z(alu_output_LUT4_Z_7_A_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hf4ff) - ) _0863_ ( - .A(\alu_output_LUT4_Z_8_A[0] ), - .B(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .C(\alu_output_LUT4_Z_8_A[2] ), - .D(\alu_output_LUT4_Z_8_A[3] ), - .Z(\alu_output[12] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0864_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[24] ), - .D(\alu_in_2[24] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0007) - ) _0865_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[12] ), - .C(\alu_output_LUT4_Z_8_A_LUT4_Z_C[2] ), - .D(\alu_output_LUT4_Z_8_A_LUT4_Z_C[3] ), - .Z(\alu_output_LUT4_Z_8_A[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h00ef) - ) _0866_ ( - .A(\alu_output_LUT4_Z_8_A_LUT4_Z_1_A[0] ), - .B(\alu_output_LUT4_Z_8_A_LUT4_Z_1_A[1] ), - .C(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .D(\alu_output_LUT4_Z_8_A_LUT4_Z_1_A[3] ), - .Z(\alu_output_LUT4_Z_8_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hca00) - ) _0867_ ( - .A(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[1] ), - .B(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[2] ), - .C(\alu_in_2[2] ), - .D(\alu_in_2[3] ), - .Z(\alu_output_LUT4_Z_8_A_LUT4_Z_1_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0a0c) - ) _0868_ ( - .A(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[0] ), - .B(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[1] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_8_A_LUT4_Z_1_A[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0100) - ) _0869_ ( - .A(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[3] ), - .B(\alu_in_2[2] ), - .C(\alu_in_2[3] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ), - .Z(\alu_output_LUT4_Z_8_A_LUT4_Z_1_A[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0870_ ( - .D0(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0871_ ( - .D0(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D0), - .D1(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0872_ ( - .ALUT(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0873_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[10] ), - .Z(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0874_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[8] ), - .Z(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0875_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[24] ), - .D(\alu_in_2[24] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0876_ ( - .ALUT(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0877_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[11] ), - .Z(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0878_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[9] ), - .Z(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0879_ ( - .ALUT(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0880_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[14] ), - .Z(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0881_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[12] ), - .Z(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0882_ ( - .ALUT(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0883_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[15] ), - .Z(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0884_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[13] ), - .Z(alu_output_LUT4_Z_8_A_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'h000f) - ) _0885_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_in_2[4] ), - .D(\alu_in_2[5] ), - .Z(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'h0f00) - ) _0886_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_B_Z[0] ), - .D(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hfc00) - ) _0887_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[3] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ), - .Z(\alu_output_LUT4_Z_8_A[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0888_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[12] ), - .D(\alu_in_2[12] ), - .Z(\alu_output_LUT4_Z_8_A_LUT4_Z_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0889_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[12] ), - .D(\alu_in_2[12] ), - .Z(\alu_output_LUT4_Z_8_A_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hfcff) - ) _0890_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_9_B[0] ), - .C(\alu_output_LUT4_Z_9_B[1] ), - .D(\alu_output_LUT4_Z_9_B[2] ), - .Z(\alu_output[11] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0891_ ( - .D0(alu_output_LUT4_Z_9_B_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .Z(\alu_output_LUT4_Z_9_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0892_ ( - .ALUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0893_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0894_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0895_ ( - .ALUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hf5f3) - ) _0896_ ( - .A(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[2] ), - .B(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] ), - .C(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] ), - .D(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0897_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0898_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h3f00) - ) _0899_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] ), - .C(\alu_in_2[3] ), - .D(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0007) - ) _0900_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[3] ), - .C(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[2] ), - .D(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[3] ), - .Z(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[5] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0c0a) - ) _0901_ ( - .A(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A[0] ), - .B(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[0] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0902_ ( - .ALUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0f33) - ) _0903_ ( - .A(_0000_), - .B(\alu_in_1[5] ), - .C(\alu_in_1[6] ), - .D(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0904_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[2] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hf0cc) - ) _0905_ ( - .A(_0000_), - .B(\alu_in_1[3] ), - .C(\alu_in_1[4] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0906_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[3] ), - .D(\alu_in_2[3] ), - .Z(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0907_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[3] ), - .D(\alu_in_2[3] ), - .Z(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0908_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_1_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_1_BLUT), - .C0(\alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0909_ ( - .ALUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] ), - .Z(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0910_ ( - .ALUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_1_ALUT), - .BLUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_1_BLUT), - .C0(\alu_in_2[3] ), - .Z(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0fcc) - ) _0911_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[0] ), - .C(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[1] ), - .D(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_1_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0912_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[2] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_1_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0503) - ) _0913_ ( - .A(\alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] ), - .B(\alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .D(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0914_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hf0cc) - ) _0915_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] ), - .C(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[1] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0916_ ( - .D0(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0917_ ( - .D0(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D0), - .D1(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0918_ ( - .ALUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hf3aa) - ) _0919_ ( - .A(\alu_output_LUT4_Z_A_L6MUX21_Z_SD[0] ), - .B(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .C(\alu_output_LUT4_Z_A_L6MUX21_Z_SD[2] ), - .D(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_1_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0920_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[13] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0921_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[11] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0922_ ( - .ALUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0923_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[14] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0924_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[12] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_1_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0925_ ( - .ALUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0926_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[17] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0927_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[15] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0928_ ( - .ALUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0929_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[18] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0930_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_1_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _0931_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[16] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _0932_ ( - .ALUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ), - .Z(\alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0c05) - ) _0933_ ( - .A(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[0] ), - .B(\alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[1] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0934_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0007) - ) _0935_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[11] ), - .C(\alu_output_LUT4_Z_9_B_LUT4_Z_C[2] ), - .D(\alu_output_LUT4_Z_9_B_LUT4_Z_C[3] ), - .Z(\alu_output_LUT4_Z_9_B[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hf100) - ) _0936_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .B(\alu_output_LUT4_Z_9_B_LUT4_Z_1_B[0] ), - .C(\alu_output_LUT4_Z_9_B_LUT4_Z_1_C[2] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ), - .Z(\alu_output_LUT4_Z_9_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0937_ ( - .D0(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[0] ), - .Z(\alu_output_LUT4_Z_9_B_LUT4_Z_1_B[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0938_ ( - .D0(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_1_D0), - .D1(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_1_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(\alu_output_LUT4_Z_9_B_LUT4_Z_1_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0939_ ( - .D0(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D0), - .D1(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(\alu_output_LUT4_Z_9_B_LUT4_Z_1_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0940_ ( - .ALUT(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0305) - ) _0941_ ( - .A(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[2] ), - .B(\alu_output_LUT4_Z_1_B_LUT4_Z_1_A[3] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0942_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] ), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0943_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] ), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0944_ ( - .ALUT(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0945_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0946_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0947_ ( - .ALUT(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0948_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hafcf) - ) _0949_ ( - .A(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] ), - .B(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[1] ), - .C(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .D(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0950_ ( - .D0(alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_LUT4_Z_9_B_LUT4_Z_1_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0951_ ( - .ALUT(alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0952_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0953_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0954_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0955_ ( - .ALUT(alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0956_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hafcf) - ) _0957_ ( - .A(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] ), - .B(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[1] ), - .C(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .D(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_C_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _0958_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[11] ), - .D(\alu_in_2[11] ), - .Z(\alu_output_LUT4_Z_9_B_LUT4_Z_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _0959_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[11] ), - .D(\alu_in_2[11] ), - .Z(\alu_output_LUT4_Z_9_B_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0960_ ( - .D0(alu_output_LUT4_Z_A_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ), - .Z(\alu_output_LUT4_Z_A[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0961_ ( - .ALUT(alu_output_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_LUT4_Z_A_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff0f) - ) _0962_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[3] ), - .Z(alu_output_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0963_ ( - .ALUT(alu_output_L6MUX21_Z_1_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_L6MUX21_Z_1_D1_PFUMX_Z_BLUT), - .C0(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[4] ), - .Z(alu_output_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h4000) - ) _0964_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff0f) - ) _0965_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[3] ), - .Z(alu_output_LUT4_Z_A_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0966_ ( - .ALUT(alu_output_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_LUT4_Z_A_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hcc0c) - ) _0967_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[0] ), - .C(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[3] ), - .Z(alu_output_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h3303) - ) _0968_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[1] ), - .C(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[3] ), - .Z(alu_output_LUT4_Z_A_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0969_ ( - .D0(alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D1), - .SD(\alu_in_2[1] ), - .Z(\alu_output_LUT4_Z_A_L6MUX21_Z_SD[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0970_ ( - .ALUT(alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0971_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[19] ), - .Z(alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0972_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[20] ), - .Z(alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _0973_ ( - .ALUT(alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0974_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[17] ), - .Z(alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h5300) - ) _0975_ ( - .A(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[3] ), - .B(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[0] ), - .C(\alu_in_2[2] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0976_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[18] ), - .Z(alu_output_LUT4_Z_A_L6MUX21_Z_SD_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hacff) - ) _0977_ ( - .A(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[0] ), - .B(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[1] ), - .C(\alu_in_2[1] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_LUT4_Z_A_L6MUX21_Z_SD[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0007) - ) _0978_ ( - .A(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .B(\alu_in_2[5] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .Z(\alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0979_ ( - .A(_0000_), - .B(\alu_in_1[4] ), - .C(\alu_in_1[5] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0980_ ( - .A(_0000_), - .B(\alu_in_1[2] ), - .C(\alu_in_1[3] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _0981_ ( - .A(_0000_), - .B(\alu_in_1[0] ), - .C(\alu_in_1[1] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0100) - ) _0982_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0700) - ) _0983_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_A[2] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_A[3] ), - .Z(\alu_output_LUT4_Z_A[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h5300) - ) _0984_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[0] ), - .B(\alu_output_LUT4_Z_A_LUT4_Z_1_B[1] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] ), - .Z(\alu_output_LUT4_Z_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0985_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _0986_ ( - .D0(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1), - .SD(\alu_in_2[1] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0987_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _0988_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _0989_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1), - .SD(\alu_op_i[0] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _0990_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _0991_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0992_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0993_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _0994_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0995_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _0996_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _0997_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _0998_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _0999_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1000_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1001_ ( - .A(_0000_), - .B(\alu_in_1[11] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _1002_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1003_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1004_ ( - .A(_0000_), - .B(\alu_in_1[10] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1005_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1006_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_1_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _1007_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_1_Z_PFUMX_BLUT_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_1_Z), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_2_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1008_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[3] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1009_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_C[3] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_1_Z_PFUMX_BLUT_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _1010_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _1011_ ( - .D0(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z_PFUMX_ALUT_Z), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _1012_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _1013_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1014_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1015_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_C[3] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _1016_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1017_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1018_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1019_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[4] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0503) - ) _1020_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[1] ), - .C(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _1021_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1), - .SD(\alu_in_2[4] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _1022_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D1), - .SD(\alu_op_i[0] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _1023_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[2] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1024_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1025_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _1026_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[2] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00f0) - ) _1027_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_op_i[3] ), - .D(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1028_ ( - .A(_0000_), - .B(\alu_in_2[5] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _1029_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _1030_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _1031_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1032_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1033_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _1034_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1035_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'hfeff) - ) _1036_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _1037_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[3] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _1038_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0100) - ) _1039_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h0100) - ) _1040_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1041_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[1] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _1042_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1043_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1044_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h0300) - ) _1045_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _1046_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D1), - .SD(\alu_in_2[2] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _1047_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1048_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hfeff) - ) _1049_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _1050_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h0100) - ) _1051_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1052_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[2] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h0100) - ) _1053_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hfc00) - ) _1054_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B[0] ), - .C(\alu_op_i[2] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B[2] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'hf000) - ) _1055_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1056_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1057_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_1_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_1_BLUT), - .C0(\alu_op_i[2] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h5ccf) - ) _1058_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[0] ), - .C(\alu_in_1[0] ), - .D(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_1_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hffff) - ) _1059_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_1_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hcc0f) - ) _1060_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[0] ), - .C(\sum[31] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1061_ ( - .A0(\alu_in_1[30] ), - .A1(\alu_in_1[31] ), - .B0(\alu_in_2[30] ), - .B1(\alu_in_2[31] ), - .C0(_0001_), - .C1(_0001_), - .CIN(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[30] ), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[0] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[30] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[31] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1062_ ( - .A0(\alu_in_1[8] ), - .A1(\alu_in_1[9] ), - .B0(\alu_in_2[8] ), - .B1(\alu_in_2[9] ), - .C0(_0001_), - .C1(_0001_), - .CIN(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[8] ), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[10] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[8] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[9] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff0f) - ) _1063_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[3] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1064_ ( - .A0(\alu_in_1[6] ), - .A1(\alu_in_1[7] ), - .B0(\alu_in_2[6] ), - .B1(\alu_in_2[7] ), - .C0(_0001_), - .C1(_0001_), - .CIN(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[6] ), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[8] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[6] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[7] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1065_ ( - .A0(\alu_in_1[16] ), - .A1(\alu_in_1[17] ), - .B0(\alu_in_2[16] ), - .B1(\alu_in_2[17] ), - .C0(_0001_), - .C1(_0001_), - .CIN(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[16] ), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[18] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[16] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[17] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1066_ ( - .A0(\alu_in_1[14] ), - .A1(\alu_in_1[15] ), - .B0(\alu_in_2[14] ), - .B1(\alu_in_2[15] ), - .C0(_0001_), - .C1(_0001_), - .CIN(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[14] ), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[16] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[14] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[15] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1067_ ( - .A0(\alu_in_1[12] ), - .A1(\alu_in_1[13] ), - .B0(\alu_in_2[12] ), - .B1(\alu_in_2[13] ), - .C0(_0001_), - .C1(_0001_), - .CIN(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[12] ), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[14] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[12] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[13] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1068_ ( - .A0(\alu_in_1[10] ), - .A1(\alu_in_1[11] ), - .B0(\alu_in_2[10] ), - .B1(\alu_in_2[11] ), - .C0(_0001_), - .C1(_0001_), - .CIN(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[10] ), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[12] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[10] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[11] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1069_ ( - .A0(\alu_in_1[0] ), - .A1(\alu_in_1[1] ), - .B0(\alu_in_2[0] ), - .B1(\alu_in_2[1] ), - .C0(_0001_), - .C1(_0001_), - .CIN(_0001_), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[2] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[0] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1070_ ( - .A0(\alu_in_1[4] ), - .A1(\alu_in_1[5] ), - .B0(\alu_in_2[4] ), - .B1(\alu_in_2[5] ), - .C0(_0001_), - .C1(_0001_), - .CIN(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[4] ), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[6] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[4] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[5] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1071_ ( - .A0(\alu_in_1[2] ), - .A1(\alu_in_1[3] ), - .B0(\alu_in_2[2] ), - .B1(\alu_in_2[3] ), - .C0(_0001_), - .C1(_0001_), - .CIN(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[2] ), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[4] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[2] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1072_ ( - .A0(\alu_in_1[28] ), - .A1(\alu_in_1[29] ), - .B0(\alu_in_2[28] ), - .B1(\alu_in_2[29] ), - .C0(_0001_), - .C1(_0001_), - .CIN(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[28] ), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[30] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[28] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[29] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1073_ ( - .A0(\alu_in_1[26] ), - .A1(\alu_in_1[27] ), - .B0(\alu_in_2[26] ), - .B1(\alu_in_2[27] ), - .C0(_0001_), - .C1(_0001_), - .CIN(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[26] ), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[28] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[26] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[27] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hffff) - ) _1074_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_L6MUX21_Z_1_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _1075_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1076_ ( - .A0(\alu_in_1[24] ), - .A1(\alu_in_1[25] ), - .B0(\alu_in_2[24] ), - .B1(\alu_in_2[25] ), - .C0(_0001_), - .C1(_0001_), - .CIN(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[24] ), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[26] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[24] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[25] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1077_ ( - .A0(\alu_in_1[22] ), - .A1(\alu_in_1[23] ), - .B0(\alu_in_2[22] ), - .B1(\alu_in_2[23] ), - .C0(_0001_), - .C1(_0001_), - .CIN(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[22] ), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[24] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[22] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[23] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1078_ ( - .A0(\alu_in_1[20] ), - .A1(\alu_in_1[21] ), - .B0(\alu_in_2[20] ), - .B1(\alu_in_2[21] ), - .C0(_0001_), - .C1(_0001_), - .CIN(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[20] ), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[22] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[20] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[21] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "alu6.v:27.29-27.48|/usr/bin/../share/yosys/ecp5/arith_map.v:74.7-80.4" *) - CCU2C #( - .INIT0(16'h96aa), - .INIT1(16'h96aa), - .INJECT1_0("NO"), - .INJECT1_1("NO") - ) _1079_ ( - .A0(\alu_in_1[18] ), - .A1(\alu_in_1[19] ), - .B0(\alu_in_2[18] ), - .B1(\alu_in_2[19] ), - .C0(_0001_), - .C1(_0001_), - .CIN(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[18] ), - .COUT(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[20] ), - .D0(_0001_), - .D1(_0001_), - .S0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[18] ), - .S1(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0[19] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hff0f) - ) _1080_ ( - .A(_0000_), - .B(_0000_), - .C(\sum[0] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1081_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h4f44) - ) _1082_ ( - .A(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[0] ), - .B(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ), - .C(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[2] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[3] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1083_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0b00) - ) _1084_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[0] ), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .C(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[2] ), - .D(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[3] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0d00) - ) _1085_ ( - .A(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .B(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hf000) - ) _1086_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1087_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _1088_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1), - .SD(\alu_op_i[0] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _1089_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _1090_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1091_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1092_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _1093_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1094_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1095_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _1096_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _1097_ ( - .D0(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0), - .D1(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _1098_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1099_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1100_ ( - .A(_0000_), - .B(\alu_in_1[13] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _1101_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1102_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1103_ ( - .A(_0000_), - .B(\alu_in_1[12] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1104_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1105_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_1_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _1106_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z), - .BLUT(alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_9_B_LUT4_Z_1_B_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _1107_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _1108_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1109_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _1110_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1), - .SD(\alu_op_i[0] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _1111_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1), - .SD(\alu_op_i[0] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _1112_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _1113_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1114_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1115_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _1116_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1117_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1118_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1119_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _1120_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _1121_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1122_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1123_ ( - .A(_0000_), - .B(\alu_in_1[5] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _1124_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1125_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1126_ ( - .A(_0000_), - .B(\alu_in_1[4] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _1127_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _1128_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1129_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1130_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1131_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _1132_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1133_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1134_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _1135_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _1136_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1137_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1138_ ( - .A(_0000_), - .B(\alu_in_1[7] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _1139_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1140_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _1141_ ( - .D0(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1142_ ( - .A(_0000_), - .B(\alu_in_1[6] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1143_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_C[3] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hf5f3) - ) _1144_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_B[1] ), - .B(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[3] ), - .C(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _1145_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _1146_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1147_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1148_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _1149_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h0f33) - ) _1150_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[0] ), - .C(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff0f) - ) _1151_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[1] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _1152_ ( - .D0(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0), - .D1(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1), - .SD(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[5] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'h0f00) - ) _1153_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'h0f00) - ) _1154_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1155_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[4] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0bbb) - ) _1156_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .C(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .D(\sum[21] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1157_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1158_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0_PFUMX_Z_BLUT), - .C0(\alu_op_i[2] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h5ccf) - ) _1159_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[0] ), - .C(\alu_in_1[21] ), - .D(\alu_in_2[21] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hffff) - ) _1160_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _1161_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1), - .SD(\alu_op_i[0] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _1162_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D1), - .SD(\alu_in_2[3] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _1163_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _1164_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1165_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hfeff) - ) _1166_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _1167_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[31] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h0100) - ) _1168_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h0100) - ) _1169_ ( - .A(\alu_op_i[1] ), - .B(\alu_op_i[2] ), - .C(\alu_in_2[6] ), - .D(\alu_op_i[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_1_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _1170_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _1171_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1172_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1173_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1174_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _1175_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1176_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1177_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _1178_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _1179_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1180_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1181_ ( - .A(_0000_), - .B(\alu_in_1[9] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _1182_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1183_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1184_ ( - .A(_0000_), - .B(\alu_in_1[8] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_1_C_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hf040) - ) _1185_ ( - .A(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[0] ), - .B(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[1] ), - .C(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[3] ), - .Z(alu_output_L6MUX21_Z_1_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1186_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h007f) - ) _1187_ ( - .A(\alu_in_1[29] ), - .B(\alu_in_2[29] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_D[3] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_A[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _1188_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[29] ), - .D(\alu_in_2[29] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_A[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1189_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[3] ), - .C(\alu_in_2[2] ), - .D(\alu_in_2[3] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _1190_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _1191_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _1192_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1193_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[23] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1194_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[21] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _1195_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1196_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[24] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _1197_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[2] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1198_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[22] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_1_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _1199_ ( - .D0(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D0), - .D1(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D1), - .SD(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _1200_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1201_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[19] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1202_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[17] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _1203_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1204_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[20] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1205_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[18] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_2_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _1206_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1207_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[27] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h0fcf) - ) _1208_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[0] ), - .C(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .D(\alu_in_2[5] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1209_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[25] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _1210_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1211_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[28] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1212_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_in_1[26] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1213_ ( - .ALUT(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_PFUMX_Z_BLUT), - .C0(\alu_in_2[0] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hff0f) - ) _1214_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_in_1[30] ), - .D(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0f33) - ) _1215_ ( - .A(_0000_), - .B(\alu_in_1[29] ), - .C(\alu_in_1[31] ), - .D(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _1216_ ( - .A(_0000_), - .B(\alu_op_i[0] ), - .C(\alu_op_i[1] ), - .D(\alu_op_i[2] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0100) - ) _1217_ ( - .A(\alu_op_i[0] ), - .B(\alu_op_i[1] ), - .C(\alu_op_i[2] ), - .D(\sum[29] ), - .Z(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1218_ ( - .ALUT(alu_output_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_BLUT), - .C0(\alu_output_PFUMX_Z_C0[4] ), - .Z(\alu_output[31] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'h0fcf) - ) _1219_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_L6MUX21_Z_SD[2] ), - .C(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .D(\alu_in_2[5] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1220_ ( - .ALUT(alu_output_PFUMX_Z_1_ALUT), - .BLUT(alu_output_PFUMX_Z_1_BLUT), - .C0(\alu_output_PFUMX_Z_1_C0[4] ), - .Z(\alu_output[30] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1221_ ( - .ALUT(alu_output_PFUMX_Z_10_ALUT), - .BLUT(alu_output_PFUMX_Z_10_BLUT), - .C0(\alu_output_PFUMX_Z_10_C0[4] ), - .Z(\alu_output[10] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hffe0) - ) _1222_ ( - .A(\alu_output_PFUMX_Z_10_C0[0] ), - .B(\alu_output_PFUMX_Z_10_C0[1] ), - .C(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .D(\alu_output_PFUMX_Z_10_C0[3] ), - .Z(alu_output_PFUMX_Z_10_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hffff) - ) _1223_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_10_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0007) - ) _1224_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[10] ), - .C(\alu_output_PFUMX_Z_10_C0_LUT4_Z_C[2] ), - .D(\alu_output_PFUMX_Z_10_C0_LUT4_Z_C[3] ), - .Z(\alu_output_PFUMX_Z_10_C0[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h5300) - ) _1225_ ( - .A(\alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[0] ), - .B(\alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[1] ), - .C(\alu_in_2[3] ), - .D(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_PFUMX_Z_10_C0[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hf0cc) - ) _1226_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[1] ), - .C(\alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B[1] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hf0cc) - ) _1227_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[0] ), - .C(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[1] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'ha300) - ) _1228_ ( - .A(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] ), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[1] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ), - .Z(\alu_output_PFUMX_Z_10_C0[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hc000) - ) _1229_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .C(\alu_in_1[10] ), - .D(\alu_in_2[10] ), - .Z(\alu_output_PFUMX_Z_10_C0_LUT4_Z_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _1230_ ( - .D0(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _1231_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[10] ), - .D(\alu_in_2[10] ), - .Z(\alu_output_PFUMX_Z_10_C0_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1232_ ( - .ALUT(alu_output_PFUMX_Z_10_C0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_10_C0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ), - .Z(\alu_output_PFUMX_Z_10_C0[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0c05) - ) _1233_ ( - .A(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[2] ), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[3] ), - .C(\alu_in_2[3] ), - .D(\alu_in_2[2] ), - .Z(alu_output_PFUMX_Z_10_C0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1234_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_10_C0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1235_ ( - .ALUT(alu_output_PFUMX_Z_11_ALUT), - .BLUT(alu_output_PFUMX_Z_11_BLUT), - .C0(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[4] ), - .Z(\alu_output[9] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hfff8) - ) _1236_ ( - .A(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ), - .B(\sum[9] ), - .C(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[2] ), - .D(\alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[3] ), - .Z(alu_output_PFUMX_Z_11_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hffff) - ) _1237_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_11_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1238_ ( - .ALUT(alu_output_PFUMX_Z_12_ALUT), - .BLUT(alu_output_PFUMX_Z_12_BLUT), - .C0(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .Z(\alu_output[6] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hf4ff) - ) _1239_ ( - .A(\alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[0] ), - .B(\alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ), - .C(\alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[2] ), - .D(\alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_12_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1240_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_12_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _1241_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hc500) - ) _1242_ ( - .A(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A[0] ), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A[1] ), - .C(\alu_in_2[3] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ), - .Z(\alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1243_ ( - .ALUT(alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_BLUT), - .C0(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] ), - .Z(\alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1244_ ( - .ALUT(alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_1_ALUT), - .BLUT(alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_1_BLUT), - .C0(\alu_in_2[3] ), - .Z(\alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1245_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[2] ), - .Z(alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_1_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hf0cc) - ) _1246_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[2] ), - .C(\alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[1] ), - .D(\alu_in_2[2] ), - .Z(alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_1_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1247_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0007) - ) _1248_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] ), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] ), - .C(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[2] ), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[3] ), - .Z(alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1249_ ( - .ALUT(alu_output_PFUMX_Z_13_ALUT), - .BLUT(alu_output_PFUMX_Z_13_BLUT), - .C0(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[4] ), - .Z(\alu_output[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hff10) - ) _1250_ ( - .A(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[0] ), - .B(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[1] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] ), - .D(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[3] ), - .Z(alu_output_PFUMX_Z_13_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hffff) - ) _1251_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_13_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'hffff) - ) _1252_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1253_ ( - .ALUT(alu_output_PFUMX_Z_14_ALUT), - .BLUT(alu_output_PFUMX_Z_14_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[4] ), - .Z(\alu_output[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'hff40) - ) _1254_ ( - .A(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .B(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[2] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[3] ), - .Z(alu_output_PFUMX_Z_14_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hffff) - ) _1255_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_14_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h00fe) - ) _1256_ ( - .A(\alu_output_PFUMX_Z_1_C0[0] ), - .B(\alu_output_PFUMX_Z_1_C0[1] ), - .C(\alu_output_PFUMX_Z_1_C0[2] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ), - .Z(alu_output_PFUMX_Z_1_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hffff) - ) _1257_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_1_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0700) - ) _1258_ ( - .A(\alu_output_PFUMX_Z_1_C0_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .C(\alu_output_PFUMX_Z_1_C0_LUT4_Z_C[2] ), - .D(\alu_output_PFUMX_Z_1_C0_LUT4_Z_C[3] ), - .Z(\alu_output_PFUMX_Z_1_C0[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0b00) - ) _1259_ ( - .A(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[1] ), - .B(\alu_in_2[2] ), - .C(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C[2] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ), - .Z(\alu_output_PFUMX_Z_1_C0[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1260_ ( - .ALUT(alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0503) - ) _1261_ ( - .A(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[3] ), - .B(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[1] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .D(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _1262_ ( - .A(_0000_), - .B(\alu_in_1[27] ), - .C(\alu_in_1[28] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'hffff) - ) _1263_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _1264_ ( - .A(_0000_), - .B(\alu_in_1[25] ), - .C(\alu_in_1[26] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _1265_ ( - .A(_0000_), - .B(\alu_in_1[23] ), - .C(\alu_in_1[24] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _1266_ ( - .A(_0000_), - .B(\alu_in_1[21] ), - .C(\alu_in_1[22] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _1267_ ( - .A(_0000_), - .B(\alu_in_1[29] ), - .C(\alu_in_1[30] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1268_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hac00) - ) _1269_ ( - .A(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A[0] ), - .B(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[0] ), - .C(\alu_in_2[2] ), - .D(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ), - .Z(\alu_output_PFUMX_Z_1_C0[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h330f) - ) _1270_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A[0] ), - .C(\alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[0] ), - .D(\alu_in_2[2] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h003f) - ) _1271_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[1] ), - .C(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1272_ ( - .ALUT(alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z_PFUMX_Z_BLUT), - .C0(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A[4] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h3faf) - ) _1273_ ( - .A(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A[0] ), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A[1] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .D(\alu_in_2[3] ), - .Z(alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _1274_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1275_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hacff) - ) _1276_ ( - .A(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[2] ), - .B(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[3] ), - .C(\alu_in_2[1] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1277_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[2] ), - .Z(alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1278_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[3] ), - .Z(alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_1_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _1279_ ( - .ALUT(alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_Z), - .BLUT(alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_1_Z), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_Z_PFUMX_ALUT_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _1280_ ( - .D0(alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_Z_PFUMX_ALUT_Z), - .D1(alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z), - .SD(\alu_in_2[2] ), - .Z(alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _1281_ ( - .A(_0000_), - .B(\alu_in_1[17] ), - .C(\alu_in_1[18] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _1282_ ( - .A(_0000_), - .B(\alu_in_1[15] ), - .C(\alu_in_1[16] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'ha300) - ) _1283_ ( - .A(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] ), - .B(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B[0] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] ), - .Z(\alu_output_PFUMX_Z_1_C0[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h0300) - ) _1284_ ( - .A(_0000_), - .B(\alu_in_2[2] ), - .C(\alu_in_2[3] ), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[3] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_A[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'hffff) - ) _1285_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h007f) - ) _1286_ ( - .A(\alu_in_1[30] ), - .B(\alu_in_2[30] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ), - .D(\alu_output_PFUMX_Z_1_C0_LUT4_Z_C_LUT4_Z_D[3] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_C[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hcee0) - ) _1287_ ( - .A(\alu_output_LUT4_Z_7_A_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ), - .C(\alu_in_1[30] ), - .D(\alu_in_2[30] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_C[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h0100) - ) _1288_ ( - .A(\alu_op_i[0] ), - .B(\alu_op_i[1] ), - .C(\alu_op_i[2] ), - .D(\sum[30] ), - .Z(\alu_output_PFUMX_Z_1_C0_LUT4_Z_C_LUT4_Z_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1289_ ( - .ALUT(alu_output_PFUMX_Z_2_ALUT), - .BLUT(alu_output_PFUMX_Z_2_BLUT), - .C0(\alu_output_PFUMX_Z_2_C0[4] ), - .Z(\alu_output[27] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h00fe) - ) _1290_ ( - .A(\alu_output_PFUMX_Z_2_C0[0] ), - .B(\alu_output_PFUMX_Z_2_C0[1] ), - .C(\alu_output_PFUMX_Z_2_C0[2] ), - .D(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ), - .Z(alu_output_PFUMX_Z_2_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'hffff) - ) _1291_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h3f00) - ) _1292_ ( - .A(_0000_), - .B(\alu_output_PFUMX_Z_2_C0_LUT4_Z_B[0] ), - .C(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_B[2] ), - .Z(\alu_output_PFUMX_Z_2_C0[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'h5300) - ) _1293_ ( - .A(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A[1] ), - .B(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B[1] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ), - .Z(\alu_output_PFUMX_Z_2_C0[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hf044) - ) _1294_ ( - .A(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[0] ), - .B(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .C(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[3] ), - .D(\alu_in_2[1] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:128.32-129.56" *) - LUT4 #( - .INIT(16'hacff) - ) _1295_ ( - .A(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[0] ), - .B(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[2] ), - .C(\alu_in_2[1] ), - .D(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _1296_ ( - .D0(alu_output_L6MUX21_Z_2_D0), - .D1(alu_output_L6MUX21_Z_2_D1), - .SD(\alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ), - .Z(\alu_output[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'hffff) - ) _1297_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'hccf0) - ) _1298_ ( - .A(_0000_), - .B(\alu_in_1[28] ), - .C(\alu_in_1[29] ), - .D(\alu_in_2[0] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:154.21-154.62" *) - L6MUX21 _1299_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:152.19-152.65" *) - PFUMX _1300_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:144.39-145.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1301_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _1302_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1), - .SD(\alu_op_i[0] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _1303_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _1304_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1305_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1306_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _1307_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _1308_ ( - .D0(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1309_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1310_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _1311_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _1312_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1313_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1314_ ( - .A(_0000_), - .B(\alu_in_1[19] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _1315_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1316_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1317_ ( - .A(_0000_), - .B(\alu_in_1[18] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1318_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _1319_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:142.39-143.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1320_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _1321_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1), - .SD(\alu_op_i[0] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _1322_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _1323_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1324_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1325_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _1326_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1327_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1328_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _1329_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1330_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[2] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _1331_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1332_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1333_ ( - .A(_0000_), - .B(\alu_in_1[21] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _1334_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1335_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1336_ ( - .A(_0000_), - .B(\alu_in_1[20] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1337_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _1338_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1339_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _1340_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_D1), - .SD(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1341_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[3] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _1342_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1343_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1344_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _1345_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[0] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _1346_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _1347_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1348_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1349_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _1350_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1351_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _1352_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1353_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[2] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _1354_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[1] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _1355_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _1356_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _1357_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1358_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1359_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_C[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _1360_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1361_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1362_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1363_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[0] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _1364_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _1365_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1366_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1367_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _1368_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1369_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'h00ff) - ) _1370_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_1_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _1371_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _1372_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1373_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1374_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[1] ), - .Z(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1375_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _1376_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1377_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1378_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _1379_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _1380_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1381_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1382_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:181.19-181.65" *) - PFUMX _1383_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:175.41-176.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1384_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:124.33-125.56" *) - LUT4 #( - .INIT(16'h3f00) - ) _1385_ ( - .A(_0000_), - .B(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .C(\alu_in_2[5] ), - .D(\alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:173.41-174.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1386_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:119.33-120.56" *) - LUT4 #( - .INIT(16'hf000) - ) _1387_ ( - .A(_0000_), - .B(_0000_), - .C(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .D(\alu_in_2[5] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[4] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1388_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:136.39-137.56" *) - LUT4 #( - .INIT(16'h0d00) - ) _1389_ ( - .A(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ), - .B(\alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] ), - .C(\alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ), - .D(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:134.39-135.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1390_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:153.19-153.65" *) - PFUMX _1391_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_in_2[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:149.39-150.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1392_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:147.39-148.56" *) - LUT4 #( - .INIT(16'hff00) - ) _1393_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:184.21-184.63" *) - L6MUX21 _1394_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1), - .SD(\alu_op_i[0] ), - .Z(\alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:182.21-182.64" *) - L6MUX21 _1395_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:138.19-138.63" *) - PFUMX _1396_ ( - .ALUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_ALUT), - .BLUT(alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z_PFUMX_Z_BLUT), - .C0(\alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ), - .Z(\alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] ) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:178.19-178.65" *) - PFUMX _1397_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:160.39-161.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1398_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:158.39-159.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1399_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:179.19-179.65" *) - PFUMX _1400_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:165.39-166.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1401_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:163.39-164.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1402_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D0_L6MUX21_Z_D1_PFUMX_Z_BLUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:183.21-183.64" *) - L6MUX21 _1403_ ( - .D0(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0), - .D1(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D1), - .SD(\alu_in_2[0] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:180.19-180.65" *) - PFUMX _1404_ ( - .ALUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT), - .BLUT(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT), - .C0(\alu_op_i[1] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:170.39-171.56" *) - LUT4 #( - .INIT(16'h0000) - ) _1405_ ( - .A(_0000_), - .B(_0000_), - .C(_0000_), - .D(_0000_), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_ALUT) - ); - (* module_not_derived = 32'd1 *) - (* src = "/usr/bin/../share/yosys/ecp5/cells_map.v:168.39-169.56" *) - LUT4 #( - .INIT(16'h0003) - ) _1406_ ( - .A(_0000_), - .B(\alu_in_1[17] ), - .C(\alu_op_i[2] ), - .D(\alu_in_2[6] ), - .Z(alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT) - ); - assign _0000_ = 1'h0; - assign _0001_ = 1'h1; - assign _0002_ = 1'hx; - assign \sum_CCU2C_S0_3_COUT[30] = \sum_CCU2C_S0_COUT[31] ; - assign \sum_CCU2C_S0_3_COUT[29] = \sum_CCU2C_S0_COUT[30] ; - assign \sum_CCU2C_S0_3_COUT[28] = \sum_CCU2C_S0_COUT[29] ; - assign \sum_CCU2C_S0_3_COUT[27] = \sum_CCU2C_S0_COUT[28] ; - assign \sum_CCU2C_S0_3_COUT[26] = \sum_CCU2C_S0_COUT[27] ; - assign \sum_CCU2C_S0_3_COUT[25] = \sum_CCU2C_S0_COUT[26] ; - assign \sum_CCU2C_S0_3_COUT[24] = \sum_CCU2C_S0_COUT[25] ; - assign \sum_CCU2C_S0_3_COUT[23] = \sum_CCU2C_S0_COUT[24] ; - assign \sum_CCU2C_S0_3_COUT[22] = \sum_CCU2C_S0_COUT[23] ; - assign \sum_CCU2C_S0_3_COUT[21] = \sum_CCU2C_S0_COUT[22] ; - assign \sum_CCU2C_S0_3_COUT[20] = \sum_CCU2C_S0_COUT[21] ; - assign \sum_CCU2C_S0_3_COUT[19] = \sum_CCU2C_S0_COUT[20] ; - assign \sum_CCU2C_S0_3_COUT[18] = \sum_CCU2C_S0_COUT[19] ; - assign \sum_CCU2C_S0_3_COUT[17] = \sum_CCU2C_S0_COUT[18] ; - assign \sum_CCU2C_S0_3_COUT[16] = \sum_CCU2C_S0_COUT[17] ; - assign \sum_CCU2C_S0_3_COUT[15] = \sum_CCU2C_S0_COUT[16] ; - assign \sum_CCU2C_S0_3_COUT[14] = \sum_CCU2C_S0_COUT[15] ; - assign \sum_CCU2C_S0_3_COUT[13] = \sum_CCU2C_S0_COUT[14] ; - assign \sum_CCU2C_S0_3_COUT[12] = \sum_CCU2C_S0_COUT[13] ; - assign \sum_CCU2C_S0_3_COUT[11] = \sum_CCU2C_S0_COUT[12] ; - assign \sum_CCU2C_S0_3_COUT[10] = \sum_CCU2C_S0_COUT[11] ; - assign \sum_CCU2C_S0_3_COUT[9] = \sum_CCU2C_S0_COUT[10] ; - assign \sum_CCU2C_S0_3_COUT[8] = \sum_CCU2C_S0_COUT[9] ; - assign \sum_CCU2C_S0_3_COUT[7] = \sum_CCU2C_S0_COUT[8] ; - assign \sum_CCU2C_S0_3_COUT[6] = \sum_CCU2C_S0_COUT[7] ; - assign \sum_CCU2C_S0_3_COUT[5] = \sum_CCU2C_S0_COUT[6] ; - assign \sum_CCU2C_S0_3_COUT[4] = \sum_CCU2C_S0_COUT[5] ; - assign \sum_CCU2C_S0_3_COUT[3] = \sum_CCU2C_S0_COUT[4] ; - assign \sum_CCU2C_S0_3_COUT[2] = \sum_CCU2C_S0_COUT[3] ; - assign \sum_CCU2C_S0_3_COUT[1] = \sum_CCU2C_S0_COUT[2] ; - assign \sum_CCU2C_S0_3_COUT[0] = \sum_CCU2C_S0_COUT[1] ; - assign \sum_CCU2C_S0_COUT[0] = _0000_; - assign \complement2_CCU2C_S0_3_COUT[30] = \complement2_CCU2C_S0_COUT[31] ; - assign \complement2_CCU2C_S0_3_COUT[29] = \complement2_CCU2C_S0_COUT[30] ; - assign \complement2_CCU2C_S0_3_COUT[28] = \complement2_CCU2C_S0_COUT[29] ; - assign \complement2_CCU2C_S0_3_COUT[27] = \complement2_CCU2C_S0_COUT[28] ; - assign \complement2_CCU2C_S0_3_COUT[26] = \complement2_CCU2C_S0_COUT[27] ; - assign \complement2_CCU2C_S0_3_COUT[25] = \complement2_CCU2C_S0_COUT[26] ; - assign \complement2_CCU2C_S0_3_COUT[24] = \complement2_CCU2C_S0_COUT[25] ; - assign \complement2_CCU2C_S0_3_COUT[23] = \complement2_CCU2C_S0_COUT[24] ; - assign \complement2_CCU2C_S0_3_COUT[22] = \complement2_CCU2C_S0_COUT[23] ; - assign \complement2_CCU2C_S0_3_COUT[21] = \complement2_CCU2C_S0_COUT[22] ; - assign \complement2_CCU2C_S0_3_COUT[20] = \complement2_CCU2C_S0_COUT[21] ; - assign \complement2_CCU2C_S0_3_COUT[19] = \complement2_CCU2C_S0_COUT[20] ; - assign \complement2_CCU2C_S0_3_COUT[18] = \complement2_CCU2C_S0_COUT[19] ; - assign \complement2_CCU2C_S0_3_COUT[17] = \complement2_CCU2C_S0_COUT[18] ; - assign \complement2_CCU2C_S0_3_COUT[16] = \complement2_CCU2C_S0_COUT[17] ; - assign \complement2_CCU2C_S0_3_COUT[15] = \complement2_CCU2C_S0_COUT[16] ; - assign \complement2_CCU2C_S0_3_COUT[14] = \complement2_CCU2C_S0_COUT[15] ; - assign \complement2_CCU2C_S0_3_COUT[13] = \complement2_CCU2C_S0_COUT[14] ; - assign \complement2_CCU2C_S0_3_COUT[12] = \complement2_CCU2C_S0_COUT[13] ; - assign \complement2_CCU2C_S0_3_COUT[11] = \complement2_CCU2C_S0_COUT[12] ; - assign \complement2_CCU2C_S0_3_COUT[10] = \complement2_CCU2C_S0_COUT[11] ; - assign \complement2_CCU2C_S0_3_COUT[9] = \complement2_CCU2C_S0_COUT[10] ; - assign \complement2_CCU2C_S0_3_COUT[8] = \complement2_CCU2C_S0_COUT[9] ; - assign \complement2_CCU2C_S0_3_COUT[7] = \complement2_CCU2C_S0_COUT[8] ; - assign \complement2_CCU2C_S0_3_COUT[6] = \complement2_CCU2C_S0_COUT[7] ; - assign \complement2_CCU2C_S0_3_COUT[5] = \complement2_CCU2C_S0_COUT[6] ; - assign \complement2_CCU2C_S0_3_COUT[4] = \complement2_CCU2C_S0_COUT[5] ; - assign \complement2_CCU2C_S0_3_COUT[3] = \complement2_CCU2C_S0_COUT[4] ; - assign \complement2_CCU2C_S0_3_COUT[2] = \complement2_CCU2C_S0_COUT[3] ; - assign \complement2_CCU2C_S0_3_COUT[1] = \complement2_CCU2C_S0_COUT[2] ; - assign \complement2_CCU2C_S0_3_COUT[0] = \complement2_CCU2C_S0_B0[0] ; - assign \complement2_CCU2C_S0_COUT[1] = \complement2_CCU2C_S0_B0[0] ; - assign \complement2_CCU2C_S0_COUT[0] = _0000_; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[2] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B_CCU2C_COUT_S0_CCU2C_S0_COUT[0] = _0001_; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_A[3] = \alu_in_2[3] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_A[2] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A[2] = \alu_in_2[2] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A[1] = \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[0] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[6] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[5] = \alu_in_2[2] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[4] = \alu_in_2[1] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[3] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[1] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[2] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[0] = \alu_in_2[31] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_B_Z[0] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_8_A_LUT4_Z_C[1] = \sum[12] ; - assign \alu_output_LUT4_Z_8_A_LUT4_Z_C[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[5] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] = \alu_in_2[1] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[3] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_B[2] = \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_B[1] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B[2] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B[1] = \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[0] ; - assign \alu_output_PFUMX_Z_1_C0[3] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ; - assign \alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[3] = \alu_in_2[3] ; - assign \alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[2] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ; - assign \alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[0] = \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C[3] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C[1] = \alu_in_2[2] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C[0] = \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[1] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[4] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[3] = \alu_in_2[1] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[2] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_B[0] = \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[3] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_C[1] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_C[0] = \alu_output_PFUMX_Z_1_C0_LUT4_Z_A[0] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_C_LUT4_Z_D[2] = \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_C_LUT4_Z_D[1] = \alu_in_2[30] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_C_LUT4_Z_D[0] = \alu_in_1[30] ; - assign \alu_output_PFUMX_Z_C0[3] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_2_B[2] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[6] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[5] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[4] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[3] = \alu_in_2[0] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[1] = \alu_in_1[31] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_B[0] = \alu_in_1[30] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[4] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[3] = \alu_in_2[1] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[2] = \alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[3] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A[1] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[6] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[5] = \alu_in_2[1] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[2] = \alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[1] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[0] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[2] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_A[2] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_A[0] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[1] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_1_A[2] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_B_LUT4_B_Z[0] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[1] = \sum[7] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_C[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_B[1] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B[3] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B[2] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B[0] = \alu_output_PFUMX_Z_C0_LUT4_Z_1_A[1] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[5] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[4] = \alu_in_2[1] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[2] = \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[1] = \alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[0] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[5] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[4] = \alu_in_2[1] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[2] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[3] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[1] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[0] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] ; - assign \complement2_LUT4_C_D[1] = \complement2[16] ; - assign \complement2_LUT4_C_D[0] = \alu_in_2[16] ; - assign \alu_output_LUT4_Z_9_B_LUT4_Z_1_C[3] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] ; - assign \alu_output_LUT4_Z_9_B_LUT4_Z_1_C[1] = \alu_output_LUT4_Z_9_B_LUT4_Z_1_B[0] ; - assign \alu_output_LUT4_Z_9_B_LUT4_Z_1_C[0] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ; - assign \alu_output_PFUMX_Z_2_C0[3] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ; - assign \alu_output_PFUMX_Z_C0_PFUMX_Z_C0[2] = \alu_in_2[3] ; - assign \alu_output_PFUMX_Z_C0_PFUMX_Z_C0[1] = \alu_output_PFUMX_Z_C0_PFUMX_Z_ALUT_LUT4_Z_B[1] ; - assign \alu_output_PFUMX_Z_C0_PFUMX_Z_C0[0] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ; - assign \alu_output_PFUMX_Z_C0_PFUMX_Z_C0_LUT4_Z_D[2] = \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ; - assign \alu_output_PFUMX_Z_C0_PFUMX_Z_C0_LUT4_Z_D[1] = \alu_in_2[31] ; - assign \alu_output_PFUMX_Z_C0_PFUMX_Z_C0_LUT4_Z_D[0] = \alu_in_1[31] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[3] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[2] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] ; - assign \alu_output_LUT4_Z_3_C_LUT4_Z_A[4] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - assign \alu_output_LUT4_Z_3_C_LUT4_Z_A[1] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ; - assign \alu_output_PFUMX_Z_10_C0_LUT4_Z_C[1] = \sum[10] ; - assign \alu_output_PFUMX_Z_10_C0_LUT4_Z_C[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[2] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z[1] = \alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_5_B_LUT4_Z_C_LUT4_Z_1_B[2] = \alu_output_LUT4_Z_7_A_LUT4_Z_A[1] ; - assign \alu_output_LUT4_Z_5_B_LUT4_Z_C_LUT4_Z_1_B[1] = \alu_in_2[18] ; - assign \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[1] = \sum[4] ; - assign \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B_LUT4_B_Z[3] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[4] = \alu_in_2[3] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[3] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[4] = \alu_in_2[1] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[3] = \alu_in_2[0] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[1] = \alu_in_1[4] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_PFUMX_Z_BLUT_LUT4_Z_D[0] = \alu_in_1[3] ; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[6] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[1] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[4] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[3] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_A[2] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[5] = \alu_in_2[2] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[4] = \alu_in_2[3] ; - assign \alu_output_LUT4_Z_11_C[1] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[0] ; - assign \alu_output_LUT4_Z_11_C[0] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] ; - assign \alu_output_LUT4_Z_5_B_LUT4_Z_C[1] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ; - assign \alu_output_LUT4_Z_5_B_LUT4_Z_C[0] = \alu_output_LUT4_Z_5_B_LUT4_Z_A[2] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[4] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[1] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ; - assign \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[3] = \alu_in_2[3] ; - assign \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A[1] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_5_B[1] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[4] = \alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[3] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[2] = \alu_in_2[3] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[0] = \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[0] ; - assign \alu_output_LUT4_Z_8_A_LUT4_Z_1_C[3] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_8_A_LUT4_Z_1_C[2] = \alu_in_2[3] ; - assign \alu_output_LUT4_Z_11_C_LUT4_Z_C[1] = \sum[5] ; - assign \alu_output_LUT4_Z_11_C_LUT4_Z_C[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A[3] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A[2] = \alu_in_2[3] ; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A[1] = \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[0] ; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[4] = \alu_in_2[1] ; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[3] = \alu_in_2[0] ; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[1] = \alu_in_1[6] ; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_1_A_PFUMX_Z_BLUT_LUT4_Z_D[0] = \alu_in_1[5] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_LUT4_Z_1_D[2] = \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_LUT4_Z_1_D[1] = \alu_in_2[17] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C_LUT4_Z_1_D[0] = \alu_in_1[17] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[1] = \sum[1] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_C[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[4] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - assign \alu_output_PFUMX_Z_12_BLUT_LUT4_Z_D[1] = \alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_8_A[1] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[5] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[4] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[2] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[1] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[1] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A[0] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[4] = \sum[13] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[3] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[1] = \alu_in_1[13] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[0] = \alu_in_2[13] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] = \alu_in_2[1] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[4] = \alu_in_2[3] ; - assign \alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[3] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B_LUT4_C_Z[0] = \alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[2] ; - assign \alu_output_LUT4_Z_12_C[1] = \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_12_C[0] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] ; - assign \alu_output_LUT4_Z_12_C_LUT4_Z_C[1] = \sum[2] ; - assign \alu_output_LUT4_Z_12_C_LUT4_Z_C[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_5_B_LUT4_Z_A[5] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - assign \alu_output_LUT4_Z_5_B_LUT4_Z_A[4] = \alu_in_2[4] ; - assign \alu_output_LUT4_Z_5_B_LUT4_Z_A[3] = \alu_in_2[5] ; - assign \alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[4] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_5_B_LUT4_Z_A_PFUMX_Z_BLUT_LUT4_Z_B[3] = \alu_in_2[3] ; - assign \alu_output_LUT4_Z_7_A_LUT4_Z_A[3] = \alu_in_2[26] ; - assign \alu_output_LUT4_Z_7_A_LUT4_Z_A[2] = \alu_in_1[26] ; - assign \alu_output_PFUMX_Z_3_C0_LUT4_Z_C[1] = \sum[26] ; - assign \alu_output_PFUMX_Z_3_C0_LUT4_Z_C[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_9_B_LUT4_Z_C[1] = \sum[11] ; - assign \alu_output_LUT4_Z_9_B_LUT4_Z_C[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[5] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_2_B[4] = \alu_in_2[3] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_D_Z_PFUMX_ALUT_Z_LUT4_Z_2_C[1] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[0] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[1] ; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[1] = \sum[3] ; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_LUT4_Z_C[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B[1] = \alu_op_i[2] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[4] = \alu_op_i[1] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[3] = \alu_op_i[0] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[2] = \sum[0] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z_LUT4_Z_B_PFUMX_Z_ALUT_LUT4_Z_B[1] = \sum[31] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[6] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[5] = \alu_in_2[1] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[4] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[1] = \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_1_A_LUT4_Z_C[0] = \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[5] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[4] = \alu_in_2[1] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] = \alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ; - assign \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[5] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - assign \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[4] = \alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] = \alu_in_2[3] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_C[6] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_C[5] = \alu_in_2[1] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_C[2] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_C[1] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[3] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_C[0] = \alu_output_PFUMX_Z_C0_LUT4_Z_A_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[6] = \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[5] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ; - assign \alu_output_LUT4_Z_9_B_LUT4_Z_1_B[5] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] ; - assign \alu_output_LUT4_Z_9_B_LUT4_Z_1_B[4] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_9_B_LUT4_Z_1_B[3] = \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[3] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[2] = \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z_LUT4_Z_1_A[3] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z_LUT4_Z_1_A[2] = \alu_in_2[1] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z_LUT4_Z_1_A[1] = \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[0] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_C[1] = \sum[8] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_C[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[3] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[0] ; - assign \alu_output_LUT4_Z_1_B_LUT4_Z_1_A[5] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_1_B_LUT4_Z_1_A[4] = \alu_in_2[3] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[6] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[5] = \alu_in_2[2] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[4] = \alu_in_2[1] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[1] = \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_2_A_LUT4_Z_A[0] = \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[1] = \sum[16] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z_LUT4_Z_1_C[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[5] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[4] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[3] = \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[2] ; - assign \alu_output_LUT4_Z_4_C_PFUMX_Z_C0[3] = \sum[19] ; - assign \alu_output_LUT4_Z_4_C_PFUMX_Z_C0[2] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_4_C_PFUMX_Z_C0[0] = \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[5] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[4] = \alu_in_2[2] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] = \alu_in_2[1] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[2] = \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_ALUT_LUT4_Z_D[2] ; - assign \alu_output_LUT4_Z_3_C[1] = \sum[20] ; - assign \alu_output_LUT4_Z_3_C[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[2] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[1] = \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_1_B[0] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[3] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[0] = \alu_op_i[2] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_B_Z[1] = \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ; - assign \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[4] = \alu_in_2[3] ; - assign \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[3] = \alu_in_2[2] ; - assign \alu_output_PFUMX_Z_3_C0[2] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ; - assign \alu_output_LUT4_Z_4_C[1] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ; - assign \alu_output_LUT4_Z_4_C[0] = \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z[0] ; - assign \alu_output_LUT4_Z_A_L6MUX21_Z_SD[3] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_A_L6MUX21_Z_SD[1] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ; - assign \alu_output_PFUMX_Z_9_C0[2] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[1] = \sum[24] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z_LUT4_Z_1_C[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[6] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[0] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ; - assign \alu_output_LUT4_Z_1_B_LUT4_Z_C[1] = \sum[28] ; - assign \alu_output_LUT4_Z_1_B_LUT4_Z_C[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_8_A_LUT4_Z_1_A[2] = \alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[5] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] = \alu_in_2[1] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] = \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] = \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] = \alu_output_PFUMX_Z_C0_LUT4_Z_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[3] ; - assign \alu_output_PFUMX_Z_10_C0[2] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[5] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD[4] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[4] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z[2] = \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A_LUT4_D_Z[2] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[5] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] = \alu_in_2[1] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[2] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D[3] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[3] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D1_PFUMX_Z_ALUT_LUT4_Z_D[4] ; - assign \alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[3] = \alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ; - assign \alu_output_PFUMX_Z_10_C0_LUT4_Z_1_A[2] = \alu_in_2[3] ; - assign \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[4] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_B[4] ; - assign \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[3] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B[3] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_Z_1_A_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[5] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B[2] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B[0] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[0] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_A[1] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[1] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_2_A[3] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[1] = \sum[9] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_D[2] = \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_D[1] = \alu_in_2[29] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_D[0] = \alu_in_1[29] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B[3] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ; - assign \alu_output_LUT4_Z_10_B_LUT4_Z_1_B[0] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_A[1] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ; - assign \alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[3] = \sum[14] ; - assign \alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[2] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_PFUMX_Z_9_C0_PFUMX_Z_C0[0] = \alu_output_LUT4_Z_A_LUT4_Z_A_LUT4_Z_C[2] ; - assign \alu_output_LUT4_Z_A[2] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_B_Z[3] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[5] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[4] = \alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[3] = \alu_in_2[3] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_A[1] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z[2] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[3] = \sum[21] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[2] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z[0] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[1] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ; - assign \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z_PFUMX_Z_C0[0] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A[0] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B[2] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B[1] = \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_PFUMX_Z_ALUT_LUT4_Z_B[1] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z[2] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[3] = \alu_in_2[2] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[2] = \alu_in_2[3] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A[1] = \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B[0] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[4] = \alu_in_2[1] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[3] = \alu_in_2[0] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[1] = \alu_in_1[8] ; - assign \alu_output_PFUMX_Z_C0_LUT4_Z_A_LUT4_C_Z_LUT4_Z_2_A_PFUMX_Z_ALUT_LUT4_Z_D[0] = \alu_in_1[7] ; - assign \alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B[2] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_5_B_LUT4_Z_A_LUT4_Z_B[0] = \alu_output_PFUMX_Z_9_C0_LUT4_Z_A_LUT4_Z_D[0] ; - assign \alu_output_LUT4_Z_3_C_LUT4_Z_C[1] = \alu_output_LUT4_Z_10_B_LUT4_Z_1_B_LUT4_A_Z[2] ; - assign \alu_output_LUT4_Z_3_C_LUT4_Z_C[0] = \alu_output_LUT4_Z_3_C_LUT4_Z_A[0] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[6] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[5] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z_LUT4_D_Z[0] ; - assign \alu_output_PFUMX_Z_1_C0_LUT4_Z_1_C_PFUMX_Z_ALUT_LUT4_Z_A[4] = \alu_in_2[1] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_Z_1_D[2] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_LUT4_A_Z[2] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_Z_1_D[1] = \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[2] ; - assign \alu_output_LUT4_Z_11_C_PFUMX_Z_ALUT_LUT4_Z_A_LUT4_Z_B_LUT4_B_Z_LUT4_B_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_Z_1_D[0] = \alu_output_PFUMX_Z_2_C0_LUT4_Z_1_B_LUT4_Z_A_LUT4_A_Z_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_D_Z_PFUMX_BLUT_Z_L6MUX21_D0_Z_L6MUX21_D1_Z[3] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[6] = \alu_output_LUT4_Z_A_LUT4_Z_1_B_L6MUX21_Z_D0_PFUMX_Z_ALUT_LUT4_Z_D_LUT4_D_Z_PFUMX_ALUT_Z_L6MUX21_D1_Z_LUT4_A_Z[4] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[5] = \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[1] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_A_Z_PFUMX_ALUT_Z[0] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[4] = \alu_in_2[2] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[3] = \alu_in_2[5] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[2] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ; - assign \alu_output_LUT4_Z_3_C_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_A[1] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD[2] ; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[5] = \alu_output_LUT4_Z_3_C_LUT4_Z_A_LUT4_Z_A_LUT4_A_Z[4] ; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[4] = \alu_output_LUT4_Z_8_A_LUT4_Z_1_C[4] ; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[3] = \alu_in_2[3] ; - assign \alu_output_LUT4_Z_9_B_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] = \alu_output_LUT4_Z_6_A_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_Z_B_LUT4_B_Z[2] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[6] = \alu_output_LUT4_Z_A_L6MUX21_Z_SD_LUT4_Z_D[5] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[5] = \alu_in_2[2] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[4] = \alu_in_2[1] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[1] = \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[1] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D0_PFUMX_Z_BLUT_LUT4_Z_D[0] = \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D[0] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B[2] = \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B_L6MUX21_Z_D1_L6MUX21_Z_D1_PFUMX_Z_BLUT_LUT4_Z_D_LUT4_B_Z_PFUMX_BLUT_Z_L6MUX21_D1_Z[4] ; - assign \alu_output_PFUMX_Z_9_C0_LUT4_Z_2_B[1] = \alu_output_LUT4_Z_A_LUT4_Z_1_C[4] ; -endmodule diff --git a/verilog/alu/v6/synth_alu6.v alu6.blif b/verilog/alu/v6/synth_alu6.v alu6.blif deleted file mode 100644 index 8186d4c..0000000 --- a/verilog/alu/v6/synth_alu6.v alu6.blif +++ /dev/null @@ -1 +0,0 @@ -# Generated by Yosys 0.15+70 (git sha1 48d7a6c47, gcc 11.2.0 -march=x86-64 -mtune=generic -O2 -fno-plt -fexceptions -fstack-clash-protection -fcf-protection -fPIC -Os) diff --git a/verilog/alu/v6/tbalu.cpp b/verilog/alu/v6/tbalu.cpp deleted file mode 100644 index 6d02bf3..0000000 --- a/verilog/alu/v6/tbalu.cpp +++ /dev/null @@ -1,44 +0,0 @@ -#include <stdlib.h> -#include <iostream> -#include <verilated.h> -#include <verilated_vcd_c.h> -#include "Valu6.h" -#include "aluOp.h" - -vluint64_t sim_time = 0; - - -void benchmark(Valu6 * dut, VerilatedVcdC *m_trace, int opcodes, char op[6], char sign[6]) { - - dut->alu_op_i = opcodes; - for (int i = 0; i < 20; i++) { - for (int j = 0; j < 20; j++) { - int in1 = i - 10; - int in2 = j - 10; - dut->alu_in_1 = in1; - dut->alu_in_2 = in2; - dut->eval(); - std::cout << op <<(int) (dut->alu_in_1)<< sign << (int) dut->alu_in_2 << " = " << (int) dut->alu_output << "\n"; - sim_time++; - m_trace->dump(sim_time); - } - } -} - -int main(int argc, char** argv, char** env) { - Valu6 *dut = new Valu6; - - Verilated::traceEverOn(true); - VerilatedVcdC *m_trace = new VerilatedVcdC; - dut->trace(m_trace, 5); - m_trace->open("waveform.vcd"); - int opcodes[10] = { ADD, SUB, XOR, OR, AND, SLL, SRL, SRA, SLT, SLTU }; - char ops[10][6] = { "ADD: ", "SUB: ", "XOR: ", "OR: ", "AND: ", "SLL: ", "SRL: ", "SRA: ", "SLT: ", "SLTU:" }; - char signs[10][6] = { " + ", " - ", " ^ ", " | ", " & ", " << ", " >> ", " >>A ", " ? ", " ?U " }; - //for (int i = 0; i < 10; i++) - benchmark(dut, m_trace, SRA, ops[7], signs[7]); - - m_trace->close(); - delete dut; - exit(EXIT_SUCCESS); -} diff --git a/verilog/computer-architecture-parts.drawio b/verilog/computer-architecture-parts.drawio new file mode 100644 index 0000000..71c8870 --- /dev/null +++ b/verilog/computer-architecture-parts.drawio @@ -0,0 +1 @@ +<mxlibrary>[{"xml":"jVLLsqIwFPwaqmZ2GBRwKQ9REBXBB+xQIiEQCBAF/fqJ4p1bs7hVs0iq050+p+qcFiSd9FYTU+RWCSwEyRQkvakqNiDS67AoBCBmiSAZAgAiPwKY/6CO3qpI4waW7H8MYDDc4+IGB2YgWvYoPkSLYvqCLYPlJSt+NVGww+0yNc0jr4uKxPAO/TVIrlNjRMvVzkKzQyRxaTqhXrw+EoZuIvYj+GwXxC50uMnPwLMR0xdq/tSO+yW9Y1ft5xnZ36u9vNuIeRk5B3TD4/Gm056kOpm5E2m0c8rLTUKW0hEBaAqKjmDthdmjx+o4eSo6NZzQl1S80l/tC3k5zyRr5fQdSs2bgjOKTpOtJnNN1efiNFU9OSxknMttsPJZvLifXa5F+Oo+yuY6as3VGIRNc3S3u06JH7WszHjfdb3gt2i39T5xODIPlX2yZzQMdFNduqc2qKfEBBNeamTkS9XFinme+efUxp44p+ftM/JqKyF6zc25ZAQgDte9wg5jfD3pmveaumT8FiStQxmDPo0vr/F3PCOcQ4zwkBgjDj+rgw2D/Y/rf1Of3VuwIpA1D/6lyxKGhh/ykBARwSxFX65PbMS4HYj0r/U7TBx88vT1/M7tW/sn1n8A","w":60,"h":120,"aspect":"fixed","title":"alu/adder"},{"xml":"jVNfc6IwHPw0zNy9SVItPpIgFSWgglp5408kaaMIRIJ++qbFu849dOYeMrPZ324IsxsD4lP/0qQXRqqCCgPODIibqpIDOvWYCmGAES8M6BgAjPQygPvD1Pyaji5pQ8/yfwxgMHSpuNKBGYhW3sSDaFl6+YStpOeci19N8rrJKlK6Xnpk4uoQt+jcZzpFz7v2XXhKBY18PlAMC8Qm4j0+QD/0ewMgfQumSAkkD6cbtYF4Pnmzyws5Jt3cnOJXQtcgmUD/God3mwNxV5XJxHSMij5HM7YjNMi9YPna65OQJS3iADNtkmiOl2ZbdfdodVCLcX7kd4X9EdSfc2uMdtFqo/WcBRDO4sw7dN5yzK3r543GNVoAGk1VmIXWLXblEacQ+XHSanP2lHXRPOT9PMm2MDuWRyW2+22Vgf3qvDmXIGh7+6RPSeOVli9zbJm7rNaEO3uf+QIXhcbQWjzFSMRjLVHOem17ETbTeq+TQmQ/qcN8XTMf1bZY3DCemVZi84kYodZ5cWDA7Tpxk6kZ2fN6Aj2SxJ4f6N9xN/tIx4T8t5ZsE7LPHBmTU1fqjJ3fBkSKcUmjS5p/Bqd0uzTH5EnXyzE1fIROG0n7H4vzRT1a80KrE5XNTUsULyQbFOOhWyNGeckeLuvBpe2wL/86v1uowaOIf7bfhf+a/fMePgA=","w":50,"h":80,"aspect":"fixed","title":"2:1 Mux"},{"xml":"jVPLsqIwEP0aqmZ2Coi6VEAGBK+g8nAXSCBAeFyIBvz6ieLMrVncqlmk6vTpPklX94kgqdVgdKDFTgMRESRdkNSuaeiEqkFFhAjiLIeCpAmiOONHEHffZOev7KwFHarp/wjESXAH5IYmZiJ6OpI30WPQPmFPUZ3k5Ed3Db24N7OdCVJMbpqjwTsRFUHcbtfgQaLC3RyOdBlCEBSoMcy+0ty6tocV7wIzxw07YlB9E8Uu5owpM7pPLgGXK6kbsjWU/c8mjTKIr37+OW6aB7k98OKY8ApXx9A9PGvLJVnKJw7kgl8CB+UOgDlzQXyyya+Vwprz5cO6PnsaMOx3QbQYkwPVCntzfkQsrEy9A4stly5H55iN5plDFwaWorU4NBxCt3suFhu64Ing/kHg+uAFSNICO8tqI2h9NT/tGaWe/2xMF40Ln9U2MtOhjMjAalmzFEvN25XsPebJGh8d5PShfXPtjerp5Q1UfpIWh9tYV9bcs1Xfc8j+tMKDClBJW5wzM1bRqYojSi07eOw/i2ztDXrKYFnkJX/LXJaalHEQS3zyB42tU7QJfwrSluGcolMLkufaGPcW5zCtuLm0OYfvlaOOouFb27yot2cM1FSIdiMvYTmkeKqQF5MKozzDb9VqctsM9FOc/VV+eZCDtw3/hF92f+X++Q2/AQ==","w":45,"h":80,"aspect":"fixed","title":"(Alt) 2:1 Mux"}]</mxlibrary>
\ No newline at end of file diff --git a/verilog/data_mem.mem b/verilog/data_mem.mem new file mode 100644 index 0000000..d3d39ad --- /dev/null +++ b/verilog/data_mem.mem @@ -0,0 +1,59 @@ +00010203 // 0x00 +04050607 // 0x04 +08090A0B // 0x08 +0C0D0E0F // 0x0C +10111213 // 0x10 +14151617 // 0x14 +18191A1B // 0x08 +1C1D1E1F // 0x1C +00000000 // Zero Buffer +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 +00000000 diff --git a/verilog/datapath.v b/verilog/datapath.v new file mode 100644 index 0000000..1992e75 --- /dev/null +++ b/verilog/datapath.v @@ -0,0 +1,249 @@ +`default_nettype none +`timescale 1ns/1ps + +module datapath +( + input wire clk, rst +); + +// Pipeline Signals +wire stall_f; +wire stall_d; +wire flush_d; +wire flush_e; +wire [1:0] r1forward_e, r2forward_e; + +// Fetch Signals +wire [31:0] pc_f; +wire [31:0] pc_4_f = pc_f + 4; +wire [31:0] pc_new = branch_pc ? pc_b_j : pc_4_f; + +// Decode Signals +// From fetch +reg [31:0] instr_d; +reg [31:0] pc_d, pc_4_d; +// Controller Decode Signals +wire wb_pc_d, wb_mem_d; +wire wr_mem_d, wr_reg_d; +wire [4:0] alu_op_d; +wire alu_1_d, alu_2_d; +wire branch_d, jump_d, jump_r_d; +wire [3:0] i_b_j_u; +// Register Signals +wire [31:0] r1data_d, r2data_d; +wire [4:0] waddr_d = instr_d[11:7]; +wire [4:0] r1addr_d = instr_d[19:15]; +wire [4:0] r2addr_d = instr_d[24:20]; +// Immediate Generation +wire [31:0] imm_d; + +// Execute Signals +// PC and PC+4 +reg [31:0] pc_e, pc_4_e; +// Control Signals +reg wb_pc_e, wb_mem_e; +reg wr_mem_e, wr_reg_e; +reg [4:0] alu_op_e; +reg alu_1_e, alu_2_e; +reg branch_e, jump_e, jump_r_e; +// Registers +reg [31:0] r1data_e, r2data_e; +reg [4:0] waddr_e, r1addr_e, r2addr_e; +//Immediate +reg [31:0] imm_e; +// ALU signals +wire [31:0] r1forward_reg_e = r1forward_e[1] ? reg_write_w : (r1forward_e[0] ? alu_out_m : r1data_e); +wire [31:0] r2forward_reg_e = r2forward_e[1] ? reg_write_w : (r2forward_e[0] ? alu_out_m : r2data_e); +wire [31:0] alu_in_1 = alu_1_e ? r1forward_reg_e : pc_e; +wire [31:0] alu_in_2 = alu_2_e ? r2forward_reg_e : imm_e; +wire [31:0] alu_out_e; +// Control flow signals +wire alu_branch; +wire branch_pc = jump_e | (branch_e & alu_branch); +wire [31:0] pc_b_j = imm_e + (jump_r_e ? r1data_e : pc_e); + +// Memory Signals +// PC+4 +reg [31:0] pc_4_m; +// Control Signals +reg wb_pc_m, wb_mem_m; +reg wr_mem_m, wr_reg_m; +//Registers +reg [31:0] r2data_m; +reg [4:0] waddr_m; +// ALU Out +reg [31:0] alu_out_m; + +// WB signals +// Reg write back +reg wb_pc_w, wb_mem_w; +reg wr_reg_w; +reg [4:0] waddr_w; +reg [31:0] pc_4_w; +reg [31:0] alu_out_w, mem_out_w; +wire [31:0] reg_write_w = wb_pc_w ? pc_4_w : (wb_mem_w ? mem_out_w : alu_out_w); + + +always @ (posedge clk) begin + + // IF/ID Pipeline Stage + if (flush_d) begin + // Insert NOP + instr_d <= 32'b0000000000000000000000010011; + pc_d <= 32'hXXXXXXXX; + pc_4_d <= 32'hXXXXXXXX; + end + else if (stall_d) begin + instr_d <= instr_d; + pc_d <= pc_d; + pc_4_d <= pc_4_d; + end + else begin + pc_d <= pc_f; + pc_4_d <= pc_4_f; + end + + // ID/IE stage + // These Control signals don't affect arch state if left alone + // So don't need to be flushed + pc_e <= pc_d; + pc_4_e <= pc_4_d; + wb_pc_e <= wb_pc_d; + wb_mem_e <= wb_mem_d; + alu_op_e <= alu_op_d; + alu_1_e <= alu_1_d; + alu_2_e <= alu_2_d; + r1data_e <= r1data_d; + r2data_e <= r2data_d; + r1addr_e <= r1addr_d; + r2addr_e <= r2addr_d; + waddr_e <= waddr_d; + imm_e <= imm_d; + if (flush_e) begin + + wr_mem_e <= 1'b0; + wr_reg_e <= 1'b0; + branch_e <= 1'b0; + jump_e <= 1'b0; + jump_r_e <= 1'b0; + end + else begin + wr_mem_e <= wr_mem_d; + wr_reg_e <= wr_reg_d; + branch_e <= branch_d; + jump_e <= jump_d; + jump_r_e <= jump_r_d; + end + + // IE/M Stage + // Never flushed or stalled + pc_4_m <= pc_4_e; + wb_pc_m <= wb_pc_e; + wb_mem_m <= wb_mem_e; + wr_reg_m <= wr_reg_e; + wr_mem_m <= wr_mem_e; + waddr_m <= waddr_e; + r2data_m <= r2forward_reg_e; + alu_out_m <= alu_out_e; + + // M/W Stage + // Never flushed or stalled + pc_4_w <= pc_4_m; + wb_pc_w <= wb_pc_m; + wb_mem_w <= wb_mem_m; + wr_reg_w <= wr_reg_m; + waddr_w <= waddr_m; + alu_out_w <= alu_out_m; +end + + +// Pipeline Control +hazard hazard0 +( + .r1addr_e(r1addr_e), .r2addr_e(r2addr_e), + .waddr_e(waddr_e), .waddr_m(waddr_m), .waddr_w(waddr_w), + .wr_reg_m(wr_reg_m), .wr_reg_w(wr_reg_w), + .r1forward_e(r1forward_e), .r2forward_e(r2forward_e), + .r1addr_d(r1addr_d), .r2addr_d(r2addr_d), + .wb_mem_e(wb_mem_e), + .stall_f(stall_f), .stall_d(stall_d), .flush_e(flush_e), .flush_d(flush_d), + .branch_pc(branch_pc) +); + +// FETCH STAGE + +pc pc0( + .clk(clk), .we(~stall_f), .rst(rst), + .pc_new(pc_new), .pc(pc_f) +); + +memory #(.ADDR_WIDTH(8), .FILE_NAME("instr_mem.mem")) instr_mem +( + .clk(clk), .we(1'b0), + .be(4'b1111), + .addr(pc_f[7:0]), + .din(32'b0), + .dout(instr_d) +); + +// DECODE STAGE + +decode dec0 +( + .opcode(instr_d[6:2]), .func3(instr_d[14:12]), .func7(instr_d[31]), + .wb_pc_d(wb_pc_d), .wb_mem_d(wb_mem_d), + .wr_mem_d(wr_mem_d), .wr_reg_d(wr_reg_d), + .alu_op_d(alu_op_d), .alu_1_d(alu_1_d), .alu_2_d(alu_2_d), + .branch_d(branch_d), .jump_d(jump_d), .jump_r_d(jump_r_d), + .i_b_j_u(i_b_j_u) +); + +regfile reg0 +( + .clk(clk), .we(wr_reg_w), + .waddr(waddr_w), .wdata(reg_write_w), + .r1addr(r1addr_d), .r2addr(r2addr_d), .r1data(r1data_d), .r2data(r2data_d) +); + +immediate imm0 +( + .instr(instr_d[31:7]), + .i(i_b_j_u[3]), .b(i_b_j_u[2]), .j(i_b_j_u[1]), .u(i_b_j_u[0]), + .imm(imm_d) +); + +// EXECUTE STAGE + +alu alu0 +( + .A(alu_in_1), + .B(alu_in_2), + .C(alu_out_e), + .OP(alu_op_e), + .Branch(alu_branch) +); + +// MEMORY STAGE +memory #(.ADDR_WIDTH(8), .FILE_NAME("data_mem.mem")) data_mem +( + .clk(clk), .we(wr_mem_m), + .be(4'b1111), // TODO Add support for smaller byte writes + .addr(alu_out_m[7:0]), + .din(r2data_m), + .dout(mem_out_w) +); + +// WB Stage has no modules only a mux + + +// Debug Waveforms +`ifdef verilator + +initial begin + $dumpfile("./log_datapath/datapath.vcd"); + $dumpvars(0, datapath); +end + +`endif + +endmodule diff --git a/verilog/decode.v b/verilog/decode.v new file mode 100644 index 0000000..15108b6 --- /dev/null +++ b/verilog/decode.v @@ -0,0 +1,147 @@ +`default_nettype none +`timescale 1ns/1ps + +module decode +( + input wire [6:2] opcode, + input wire [2:0] func3, + input wire func7, + + output reg wb_pc_d, + output reg wb_mem_d, + + output reg wr_mem_d, + output reg wr_reg_d, + + output reg [4:0] alu_op_d, + output reg alu_1_d, + output reg alu_2_d, + + output reg branch_d, + output reg jump_d, + output reg jump_r_d, + + output reg [3:0] i_b_j_u +); + +always @ (*) begin + wb_pc_d = 1'bx; + wb_mem_d = 1'bx; + wr_mem_d = 1'bx; + wr_reg_d = 1'bx; + alu_op_d = 5'bxxxxx; + alu_1_d = 1'bx; + alu_2_d = 1'bx; + branch_d = 1'bx; + jump_d = 1'bx; + jump_r_d = 1'bx; + i_b_j_u = 4'bxxxx; + case (opcode[6:2]) + 5'b01100: // R Type + begin + wb_mem_d = 1'b0; + wr_mem_d = 1'b0; + wr_reg_d = 1'b1; + alu_op_d = {1'b0, func7, func3}; + alu_1_d = 1'b1; + alu_2_d = 1'b1; + branch_d = 1'b0; + jump_d = 1'b0; + i_b_j_u = 4'bxxxx; + end + 5'b00100: // Math I Type + begin + wb_mem_d = 1'b0; + wr_mem_d = 1'b0; + wr_reg_d = 1'b1; + alu_op_d = {2'b0, func3}; + alu_1_d = 1'b1; + alu_2_d = 1'b0; + branch_d = 1'b0; + jump_d = 1'b0; + i_b_j_u = 4'b1000; + end + 5'b00000: // Load I Type + begin + wb_mem_d = 1'b1; + wr_mem_d = 1'b0; + wr_reg_d = 1'b1; + alu_op_d = 5'b0; + alu_1_d = 1'b1; + alu_2_d = 1'b0; + branch_d = 1'b0; + jump_d = 1'b0; + i_b_j_u = 4'b1000; + end + 5'b01000: // S Type + begin + wr_mem_d = 1'b1; + wr_reg_d = 1'b0; + alu_op_d = 5'b0; + alu_1_d = 1'b1; + alu_2_d = 1'b0; + branch_d = 1'b0; + jump_d = 1'b0; + i_b_j_u = 4'b0; + end + 5'b11000: // B Type + begin + wr_mem_d = 1'b0; + wr_reg_d = 1'b0; + alu_op_d = {2'b0, ~func3[2], func3[2], func3[1]}; + alu_1_d = 1'b1; + alu_2_d = 1'b1; + branch_d = 1'b1; + jump_d = 1'b0; + jump_r_d = 1'b0; + i_b_j_u = 4'b0100; + end + 5'b11011: // JAL + begin + wb_pc_d = 1'b1; + wr_mem_d = 1'b0; + wr_reg_d = 1'b1; + branch_d = 1'b0; + jump_d = 1'b1; + jump_r_d = 1'b0; + i_b_j_u = 4'b0010; + end + 5'b11001: // JALR + begin + wb_pc_d = 1'b1; + wr_mem_d = 1'b0; + wr_reg_d = 1'b1; + branch_d = 1'b0; + jump_d = 1'b1; + jump_r_d = 1'b1; + i_b_j_u = 4'b0010; + end + 5'b01101: // LUI + begin + wb_mem_d = 1'b0; + wr_mem_d = 1'b0; + wr_reg_d = 1'b1; + alu_op_d = 5'b10000; // Pass through + alu_2_d = 1'b0; + branch_d = 1'b0; + jump_d = 1'b0; + i_b_j_u = 4'b0001; + end + 5'b00101: // AUIPC + begin + wb_mem_d = 1'b0; + wr_mem_d = 1'b0; + wr_reg_d = 1'b1; + alu_op_d = 5'b0; //ADD + alu_1_d = 1'b0; + alu_2_d = 1'b0; + branch_d = 1'b0; + jump_d = 1'b0; + i_b_j_u = 4'b0001; + end + default: begin + end + endcase +end + +endmodule diff --git a/verilog/hazard.v b/verilog/hazard.v new file mode 100644 index 0000000..7ded32b --- /dev/null +++ b/verilog/hazard.v @@ -0,0 +1,33 @@ +`default_nettype none +`timescale 1ns/1ps + +module hazard +( + input wire [4:0] r1addr_e, r2addr_e, + input wire [4:0] waddr_m, waddr_w, waddr_e, + input wire wr_reg_m, wr_reg_w, + output wire [1:0] r1forward_e, r2forward_e, + + input wire [4:0] r1addr_d, r2addr_d, + input wire wb_mem_e, + output wire stall_f, stall_d, flush_e, flush_d, + + input wire branch_pc +); + +// Forwarding Logic +assign r1forward_e = r1addr_e != 5'b0 ? (r1addr_e == waddr_m ? {1'b0, wr_reg_m} : (r1addr_e == waddr_w ? {wr_reg_w, 1'b0} : 2'b00)) : 2'b00; +assign r2forward_e = r2addr_e != 5'b0 ? (r2addr_e == waddr_m ? {1'b0, wr_reg_m} : (r2addr_e == waddr_w ? {wr_reg_w, 1'b0} : 2'b00)) : 2'b00; + +// Load Hazard Logic +// TODO: Incoporate wb_pc_e into the calculations +// so that if pc is being written back pipeline not stalled +wire load_hazard = (waddr_e != 0) & ((r1addr_d == waddr_e) | (r2addr_d == waddr_e)) & wb_mem_e; + +// Pipeline control outputs +assign stall_f = load_hazard; +assign stall_d = load_hazard; +assign flush_e = load_hazard | branch_pc; +assign flush_d = branch_pc; + +endmodule diff --git a/verilog/immediate.v b/verilog/immediate.v new file mode 100644 index 0000000..37111da --- /dev/null +++ b/verilog/immediate.v @@ -0,0 +1,20 @@ +`default_nettype none +`timescale 1ns/1ps + +module immediate +( + input wire [31:7] instr, + input wire i,u,j,b, + output wire [31:0] imm +); + +// Note, can get rid of S signal if needed +assign imm[31] = instr[31]; +assign imm[30:20] = u ? instr[30:20] : {11{instr[31]}}; +assign imm[19:12] = (u|j) ? instr[19:12] : {8{instr[31]}}; +assign imm[11] = ~u & (b ? instr[7] : (j ? instr[20] : instr[31])); +assign imm[10:5] = {6{~u}} & instr[30:25]; +assign imm[4:1] = {4{~u}} & (i|j ? instr[24:21] : instr[11:8]); +assign imm[0] = ~(u|j|b) & (i ? instr[20] : instr[7]); + +endmodule diff --git a/verilog/instr_mem.mem b/verilog/instr_mem.mem new file mode 100644 index 0000000..bd4c611 --- /dev/null +++ b/verilog/instr_mem.mem @@ -0,0 +1,55 @@ +01000093 +01234137 +00001197 +02000213 +03000293 +00000013 // NOP Buffer +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 +00000013 diff --git a/verilog/memory.v b/verilog/memory.v new file mode 100644 index 0000000..ec64832 --- /dev/null +++ b/verilog/memory.v @@ -0,0 +1,42 @@ +`default_nettype none +`timescale 1ns/1ps + +module memory +#( + parameter DATA_WIDTH = 32, // Word access are the largest, we need to get instructions in one cycle + parameter ADDR_WIDTH = 14, // Byte Addressable Memory + parameter FILE_NAME = "default.mem" +) +( + input wire clk, we, + input wire [3:0] be, + /* verilator lint_off UNUSEDSIGNAL */ + input wire [ADDR_WIDTH-1:0] addr, + /* lint_on */ + input wire [DATA_WIDTH-1:0] din, + output reg [DATA_WIDTH-1:0] dout +); + +reg [DATA_WIDTH-1:0] ram [0:(1 << (ADDR_WIDTH-2)) - 1]; // Word addressable memory + +initial $readmemh(FILE_NAME, ram); + +wire [ADDR_WIDTH-3:0] word_addr = addr[ADDR_WIDTH-1:2]; + +always @ (posedge clk) begin + if (we) begin + if (be[3]) + ram[word_addr][31:24] <= din[31:24]; + if (be[2]) + ram[word_addr][23:16] <= din[23:16]; + if (be[1]) + ram[word_addr][15:8] <= din[15:8]; + if (be[0]) + ram[word_addr][7:0] <= din[7:0]; + end + else begin + dout <= ram[word_addr]; + end +end + +endmodule diff --git a/verilog/pc.v b/verilog/pc.v new file mode 100644 index 0000000..a7c6b6d --- /dev/null +++ b/verilog/pc.v @@ -0,0 +1,20 @@ +`default_nettype none +`timescale 1ns/1ps + +module pc +( + input wire we, clk, rst, + input wire [31:0] pc_new, + output reg [31:0] pc +); + +always @ (posedge clk or posedge rst) begin + if (rst) begin + pc <= 0; + end + else if (we) begin + pc <= pc_new; + end +end + +endmodule diff --git a/verilog/regfile.v b/verilog/regfile.v new file mode 100644 index 0000000..56d107f --- /dev/null +++ b/verilog/regfile.v @@ -0,0 +1,36 @@ +`default_nettype none +`timescale 1ns/1ps + +module regfile ( + input wire clk, we, + input wire [4:0] r1addr, r2addr, waddr, + input wire [31:0] wdata, + output wire [31:0] r1data, r2data +); + +reg [31:0] registers [1:31]; + +/* Async Read on second half of cycle */ +assign r1data = registers[r1addr]; +assign r2data = registers[r2addr]; + +/* Async write at the beginning of the cycle */ +always @ (negedge clk) begin + if (we == 1'b1 && waddr != 5'b0) begin + registers[waddr] <= wdata; + end +end + +// Debugging Access Functions +`ifdef verilator + export "DPI-C" task get_reg_value; + task get_reg_value; + input bit [4:0] get_addr; + output bit [31:0] reg_val; + begin + reg_val = registers[get_addr]; + end + endtask +`endif + +endmodule diff --git a/verilog/register/a.out b/verilog/register/a.out deleted file mode 100755 index f6d832d..0000000 --- a/verilog/register/a.out +++ /dev/null @@ -1,66 +0,0 @@ -#! /usr/bin/vvp -:ivl_version "11.0 (stable)" "(v11_0)"; -:ivl_delay_selection "TYPICAL"; -:vpi_time_precision + 0; -:vpi_module "/usr/lib/ivl/system.vpi"; -:vpi_module "/usr/lib/ivl/vhdl_sys.vpi"; -:vpi_module "/usr/lib/ivl/vhdl_textio.vpi"; -:vpi_module "/usr/lib/ivl/v2005_math.vpi"; -:vpi_module "/usr/lib/ivl/va_math.vpi"; -S_0x55bafda5d0c0 .scope module, "registers" "registers" 2 1; - .timescale 0 0; - .port_info 0 /INPUT 1 "writeEnable"; - .port_info 1 /INPUT 1 "clk"; - .port_info 2 /INPUT 32 "addr1"; - .port_info 3 /INPUT 32 "addr2"; - .port_info 4 /INPUT 32 "addr3"; - .port_info 5 /INPUT 32 "writeData"; - .port_info 6 /OUTPUT 32 "readData1"; - .port_info 7 /OUTPUT 32 "readData2"; -L_0x55bafda6fe60 .functor BUFZ 32, L_0x55bafda6fda0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -L_0x55bafda6ffa0 .functor BUFZ 32, L_0x55bafda6fed0, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>, C4<00000000000000000000000000000000>; -v0x55bafda5d340_0 .net *"_ivl_0", 31 0, L_0x55bafda6fda0; 1 drivers -v0x55bafda6f380_0 .net *"_ivl_4", 31 0, L_0x55bafda6fed0; 1 drivers -o0x7fee24862078 .functor BUFZ 32, C4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive -v0x55bafda6f460_0 .net "addr1", 31 0, o0x7fee24862078; 0 drivers -o0x7fee248620a8 .functor BUFZ 32, C4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive -v0x55bafda6f520_0 .net "addr2", 31 0, o0x7fee248620a8; 0 drivers -o0x7fee248620d8 .functor BUFZ 32, C4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive -v0x55bafda6f600_0 .net "addr3", 31 0, o0x7fee248620d8; 0 drivers -o0x7fee24862108 .functor BUFZ 1, C4<z>; HiZ drive -v0x55bafda6f730_0 .net "clk", 0 0, o0x7fee24862108; 0 drivers -v0x55bafda6f7f0_0 .net "readData1", 31 0, L_0x55bafda6fe60; 1 drivers -v0x55bafda6f8d0_0 .net "readData2", 31 0, L_0x55bafda6ffa0; 1 drivers -v0x55bafda6f9b0 .array "register", 31 0, 31 0; -o0x7fee24862198 .functor BUFZ 32, C4<zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz>; HiZ drive -v0x55bafda6fb00_0 .net "writeData", 31 0, o0x7fee24862198; 0 drivers -o0x7fee248621c8 .functor BUFZ 1, C4<z>; HiZ drive -v0x55bafda6fbe0_0 .net "writeEnable", 0 0, o0x7fee248621c8; 0 drivers -E_0x55bafda5d640 .event posedge, v0x55bafda6f730_0; -L_0x55bafda6fda0 .array/port v0x55bafda6f9b0, o0x7fee24862078; -L_0x55bafda6fed0 .array/port v0x55bafda6f9b0, o0x7fee248620a8; - .scope S_0x55bafda5d0c0; -T_0 ; - %wait E_0x55bafda5d640; - %load/vec4 v0x55bafda6fbe0_0; - %flag_set/vec4 8; - %jmp/0 T_0.0, 8; - %load/vec4 v0x55bafda6fb00_0; - %jmp/1 T_0.1, 8; -T_0.0 ; End of true expr. - %ix/getv 4, v0x55bafda6f600_0; - %load/vec4a v0x55bafda6f9b0, 4; - %jmp/0 T_0.1, 8; - ; End of false expr. - %blend; -T_0.1; - %ix/getv 3, v0x55bafda6f600_0; - %ix/load 4, 0, 0; Constant delay - %assign/vec4/a/d v0x55bafda6f9b0, 0, 4; - %jmp T_0; - .thread T_0; -# The file index is used to find the file name in the following table. -:file_names 3; - "N/A"; - "<interactive>"; - "registers.v"; diff --git a/verilog/register/registers.v b/verilog/register/registers.v deleted file mode 100644 index f2dbb22..0000000 --- a/verilog/register/registers.v +++ /dev/null @@ -1,22 +0,0 @@ -module registers( - input wire writeEnable, - input wire clk, - input wire [31:0] addr1, - input wire [31:0] addr2, - input wire [31:0] addr3, - input wire [31:0] writeData, - output wire [31:0] readData1, - output wire [31:0] readData2 -); - -reg [31:0] register [0:31]; - -always @ (posedge clk) -begin - register[addr3] <= writeEnable ? writeData : register[addr3]; -end - -assign readData1 = register[addr1]; -assign readData2 = register[addr2]; - -endmodule diff --git a/verilog/riscv-processor.drawio b/verilog/riscv-processor.drawio new file mode 100644 index 0000000..75b2ee4 --- /dev/null +++ b/verilog/riscv-processor.drawio @@ -0,0 +1 @@ +<mxfile host="Electron" modified="2023-03-19T22:48:21.988Z" agent="5.0 (X11; Linux x86_64) AppleWebKit/537.36 (KHTML, like Gecko) draw.io/20.8.16 Chrome/106.0.5249.199 Electron/21.4.0 Safari/537.36" etag="xHEr1f1r6J-gPRNZx3_A" version="20.8.16" type="device"><diagram name="Page-1" id="AN2C7AuuA8TbywB6wP9e">7V1Zc+q4Ev41p2rmISlL8vrImkCAhCVheWMxq8EsJhAe7m+/9gQTkGRsjKyYnJyqmQLHG1L313v3H5Sabh+W7fmwaPZ04w8Uets/KP0HQklG9v+dAx+fB5AofR4YLEe9z0Pg60B1tNP3B4X90fWop69OTrRM07BG89ODXXM207vWybH2cmluTk/rm8bpU+ftgU4cqHbbBnm0PupZw/1RWRK//vCojwZD99FA1j7/Mm27Z+9/ymrY7pmbo0Mo8wellqZpfX6ablO64SyeuzCf12U9/np4s6U+s4Jc0Muj5/VHK7vuFz8S4qL41rW2d0De3+e9baz3v3n/utaHuwhLcz3r6c5thD8ouRmOLL06b3edv27sXbePDa2pYX8D9kfytdwn6EtL3x4d2r/mg25OdWv5YZ/i/lWV9mvmUo0C7/d0s/naBdElkuHRBojupe39zg8Ot/9aG/vDfnkuWSrKQsmG/dhkb/Rufxw4H3Olas09bD/l6C/fvqpQPV1UyV2poyUFkLKkclQrCokVrWQe7APZkb1G371ckoYtlxhwuYAY1XqhIBSY6PWWASnQXgnrdN1W1tKc6CnTMJf2kZk5s89M9keGgR1qG6PBzP7atddXt48nnXUd2bCZ2P9hOur1nMdQN+p0K6MgbYXcK0TZKhjVTolBdirdttp/204hJWY7JQXiKeC1T8Sp7qHOEj/ie2kCcnkKuuLiKy6t97g8RQ9+8U/lsSCSiyq4kBQRkylBmKwCuFBIBfZ+SUTGBSaFRGgwHJ1yTdNtsNXXZ72EY9J9rerRRgRcIr13Yu+RC3S0ANKZBVjqRtsavZ9aibRV2T/hxRzZb3JYfxFnURVb2JW5Xnb1/VXHRh12Iwn43MhqLwe6RdzIXsj2x9Fpc+eE1ZkXlujP8Xovrx/4RSOfb/BFMYc9uIKIaGqXNxF1jfZqNepGQ0dXEgixrzjnBSYQfCPwGzEiEK8XjnbDSe0tN7Mh2T70R0oC7Q9K2KdIaZIK7O0rtDu64ey4vhrt2p3//iScEkNw1CYJ5SyF7t1V+6f+OYjjAAgemLCuw2P557JSaKz1A+2oWIkLdpI62hErQdFmJedTjFhJvhVWUlmzkr0wy4/G8Zem8+VechDv80B6e/zn9Mfxtxd9ObJ/mrML5znzk57P/DTpezhYBmE5WMZuhLsVIuJg94Wj5WDtrDC0ySihxIqBVX4MjG2Te4rZ76906w/O4Qw24/AjWIVVKDalJ98GtwNFiImagHZghDGBAPGoCwxBfTuyGvu/OJ/3QLn/9oWSzpcTkKTAK5BEpvD6iVpn1kIMCMPuJsbFuMWcCzIeEAkK1yLCqFMLBtfMmDiAPRkDJsajpRIMxsRIiMybI6pUMVPdfzWX1tAcmLO2kfk6inHu1zkF05zvF3CsW9bHPkugvbbM0+VlyexQ8uH18GwN5YB8DSROJhIUJOmEhER4CLhz4jUgkurLP47+YusuCNh6y7+fSoyPAhNKYcG1nr16Z99cSjoPvMC8d3V9nHm91BxPphbuRaAiJnh8h2u5Eao9pNsg9fzSJLZsNWzPnY/2irYNQzfMwbI9dVb+SHae/O1IqPqD7FZ3M4lYJaRomCQSAS0hRaFpSgwwtqIk7zIztTlQ4a4w0B8b4P3uoO7fMMQKMl99CmkBgVcU+eAuALiGc7V3ljVHIxKW/0C5PXWYbtZZzT+DZ1d+FxKFV0+MWFn6rDsy/lm2apXxKjfIZOr2LxkavXT5bduv9fpaGsxnhcrDMPHWshEzq0nzcrtUn1rDtTCutvTd6nGaN1L686QDy/mhlXpUJ7tk/TU3fx8X1W12NH19N1/lyrMwmbWe3obrsSg+b5K7qdnITJ5ayfnmadZdo+GDspn+gUll2KrDUrk5+tiOVbG3U1Lz9FOzitRxIeU83pBz2RF6KDxtN8NBZq2MR/NhQ3pJ2tCYVVNZQRuoZblpyOOJvKoVqlb78b1TtP/WGtvrPlv2wSpTEGFzuawXXyobpf2xkJWE/dzS4tH+v5BfLV57T/anzJuZb+QT82YtlVFzxcaqttCmGVtvgVmQnuTU4ljJdBLVziA/LgvZeedl1yovHnrT1MK+eILSNdhulraK9SaO+41UsuysOrLFLJcMPwEHVI3UWWUKnAIWeErnedJiTydqiesUfhZLBQV/Gx3QUiEjC9aKgVIhE3yzSv7eYH4gCokqmk/VTaB0K7pJeGVChJx0BOSVt8veMqNvJqnTF3VbEArPa4u6zdxtsbM0yMIUQ7KsnOyBmwx+rWXmBrGw20ZvqLnUe5x73fvJEBkyJy46deM2fIsAYBGCg3PXZ+FQZFnwIi1lN4Yrh+N24JWLjuaYJ3V4RqLDOk/9Yx0yJ7GrKr4u0aBxDKCh03shxNu9Kp5N70C+flWegWGRY2aHh1zGNidCOXxZcsit573iiREKwrAubN7roa6EEz+pCpVdYmjhMIdoX8vIDVv4YjliDeVXSUeVTEF/SV2nWbBQIwJUbYoUho0sQUNDt075igb5xh20oMqN62yPXLkRMK1eFoR7QRYlIDuWEnKFECcwddfnnBAkowGNSscsDrK5dn9orNPFbO89q+haUnlbTYzcZlNaWkpTT6Fecigbk1oTFZ4L2z/Q8QoON8UBtEbPWmVTQalHeZwYzIv91vsj0FKNol6GLRkV1rXnXWIEjd3GBENDk5K9bTeZGb4V9VI3V3pqbO07JVVLLaYhaC9b1cfUE1iZ77vqS3OTl7r90W6TKghOQCC7SCXfqi8V+/zRsIRQptbJNd9zT9JIXTtvJC2SeahXtc1z51n9qGWtfqqNkoVaa2Vf3BE779XH59H2sdV5RZ3+oL8xXuuvZgfWX2aV2QCWVtuEE5Zo117s05+6KRW8dRwXfzYzyRSMVM8265NIzYu1pFFzggObdLmcyFVToL2o2wufLNblxXO3vBgWkouEkf9IpTJAbSVGsiEkV+mHNCqNEotWtqWBauJxIaNcsVXLFUr2z8lW6lV7m5KF8ar42irWO2mrVpy+D+yd5xRH0LCEToliY9E8n5EZp1oA4/Tq9DV4HvbsLzh2eUJhhFkuQbPXtHipqKroQVKXqqgalpZFZC0zSjbWzpcL+J7PJTlZY2vnRM0XgK+CoARkFRg0L4EPqyh4On3YvHwVD2BFF+KgUyctySHG1KlxrvOIG93hiKdo9yoISXoB7hV16qNL/cfBGJIAf0wwBk+mkzRaMh3XLiBAYFx2EDarmA4dysXQEV4W3azehqlbCk4sgREBUwDliCqmNcwGd32hnnobbrMrl53vVk9EW4QmQIKRclMnW+AzzIAS1CLSn4NthDihYRstsy1CbKOF/Y4yqQR3De2ji7XTjjC5/O+9Dl+PMqsuzexkeCjEKSFeN1w22kVrGC5f7TcfNqb5sEvTsgWX6ey+JhxB0icBsGlwh1talHRZWhQARFfiJdCaOnlrTFckE6hhfVT+BVZC0GwCPjoM9Oiyc7EOQ9wIp4PITZpvrU75igw1j/5yYXVKZJ5RIKjM6fMywrtUVUW4y3CfGxOxKkn6DMWfqzkiATc7SL2Ra4bioabgV2/81Rt/9cZI9caI1EZNi53aCEj/QFRqo+rrbGPsJRdirUyGb8OBJ+0FzLW7uMckLgHF8w4u/Hzl1CEWkVbCuFPpgXrBKfVGl0EdO6MHy3BT8C4vQekUT7hXeBs9lHaUEWGbJrNNYbs5bGNFM3iLoUNokRvNBEiMoOa+2RrcIfct3Xs3nMKIZFJr74zmuJwovVhKo9euj3XzIbeapsuzWWGrfua+lRtL48HKJJqd8tA+khM31lP31VYGk3K/3NhoPfFtYfabg96w9TZafCTMnbHeDaWXrn1GOTPslUvOuRPFUMSq/UEcOwroVn5vt3NCud2pFoxHVd6YtdfnfMt5p+2wt8rWm9JHt2Slx4VEbdfcNKa5zLItObqr8lF8GXzkavbHcq+el9O2mvdQNKyko5xB03IUsfr7s9HTSpW6jtL1wmAwe6jP31Kj6tPGsipvzotl4MOrvVbJZq6/nTSN7WYmpvNyPjWaq2JlB7ra8KWoF1eNwrpcSKQqmcm6PX3r9sel9cdsmgeVQuqtUjSequpwm2rrE2s+HG1ynZRenXaalpUv1HdPi/FAq2wz/U1vMh5N7GfllEkaDewPHWSvfCm90fp6osGrgt6/oM2tlDpmQNyjxE6zC9Ly7ps6t0WX5XbgX18EVYNmu/NBUIBHOXFhGby46XtzdwDiZlH4ZksyFroH4ooJzTCTujh4yXi1AiOLQqG/r9drKXSWiLiF+c1UEl2Bktwa2QEVq9rkXmkJJEof3kMGhBCoj/Y3d7FzSfL61gl3wj2Abme/mynKPJDrb0HKb0HKZWo5FPCycWqnQK41KUBiriF5rlRMNBWieh9poav3CZlCuVfkMoV0OpLl+8LdITC1jwQJx6l3MZc5Lo0yaNcjyEg92TFG7XpkjhKI+Sgj9iVgDPsXfxMqiOIVPT1wTVPijwpkYucnKtyMoulSOQumt2H5OirhwNby3zXmjmA4JbwYJkU6d4aDgLQLTsVwgBEr38xyBwpkwHLXMtxBOqvc5KrCLUQXoVhVgraJ+C6xqrJrlUW5V9RiVfESq7ehSR9InIX3RgFuo0KXWa/k+YNRRb0rBwRwfdjx97eGLiL0hBZ/R60LLf4gpMKAIHT1bBIcXQLLfQq6aCS6IKR9/QuEWvy67wOV1Dj+Oej47lgUNeaI5LIcC51Dgm68jy0g3UGFelseOgkZMPiZQ1OotZBRDU3xIMW/oDM5P2gmom38PaMqRVlznZ6fA6Bh3NGRZaNyATKCQ7czOQ+NDBJb6Il9v9G232jbsW6IAxBVxPCNtlH6iJLwE3vXfWAZ8k0+Bkm4wseAWxQKf7FFi+8Q021Ge03/WJAFqvmKk3hj5nB0kkkEeOVMRB7yLEBl/K88+5VnNJNJxFAOxkCeXda68Qp5Ft6xFUCeKTGXZ2SiYuAEFWJ6L3+fOaWF85HPPPaBaJXZ3F5bSMkK5jNnk30CMOdklBLssn6YcVVh487ypCM7OMvjgkLmz/Kk2X5LYbIDjTPRSxWVKct/UC+IkOO1v6EKQWM+cCSgX1Tib2BSGm5/+UXjzpsaswIEx2R0LVC2yaAIUO/Kg1cDOJh+7ctf+5JmX2qeKsi32ZfaZanOnFsvRxekC9r0P7jY4qTH4ila0jXpXrikDFyvd2ktKPmoQ/J38LeTsUsiqgm9cIpMTO2vuNEtYX99C92yI5KzaYpxz0M+kDiTLEXBLYW4lkYgLy0OXjhx4CcW5cnhR+oSJhblXlFXA9Ba3R85QP6rwJF8K/OAc54Ub279IlYGBpmsKaepdpAJdd0hxI93fy2wXwsspAVGdGX8dgsMCtyKTSOM8B2YMrbSLry7n1A3ZTL7JXJpd1bdBE7tW8zz0L/onIXOKUGJqcvffR+OUuwnWJnxZ3vS939TbE8mMx0H9kVHyY15OOGL0CPhe0bxBJ6Mzz68z9V3Gjeeh4LAjOdJw5Z7ZB9SBj8czFWH4WPP7yxD+0hy7Xymcl5TaTflwPwXNuCPLtzCuEE1iBkmBODj0JjAP58AwptJEGE8DjUwXV1NMBq8l0+2mX85HQwy3cD1bJkB6kqPZpzcaWd34oKqH4D1oaVnSUNK92sUmQ/lwt7/YWGVdwvi2MEqxPueM1S1JP4xBEB6Vf753+u/n3GBeGtZgKVVJYoyZEIg4HRL+ZWxfokUvhIyNvpX0KZEV6efYFyrBFaG/CsBlcANAS9PP/F8VOBuJWEuUQTGGSsVJXmXmanNgQp3hYH+2ADvd3ci6SX63z/rP0pqbP/X+TfOMOapf4QyFmVwqsIxcg7dAZEfjt18gySZ8XSkAEZC0CkgEcDklXpr2PlDv6Hsvz6UjdUgKfL3h7Ld8vAbAC/GbgpO6tfXVKnvc1K4Y6Bp/um4W02QZTsEiNRTdYORtiEqtLvycE4HiEyFdD+xcj4J+DRUKurxdT5Bts4nz2WKixMoQN+x8NMd+LeVhmdq9f5rKh17UGPYwkwVhStzuQ+mF7dxDRCSbrwfzYABlIDQDPgNCgW6DD9jmgAZs2mBZPP/azKhIHYv7vU2EJ3NhIp5vc0XiTPROwXxSozmgMnoMkyOaXpj7Jn6iokecWBqiup1O32LvmicifP6UNh7bW7T6QVR8jhpL+aI/bJXxjrdKnuDzYmeMg3HhnS1sf7IMLBDwbeUZocG1Oku8bh92Zp7llEFmvVJMT7xufbsjE+R0vrrj5LK/+h9wHK7VNouAAoMR7gNkNgGsi/oj9kCwg0jaTHYAjJ56kdzgaRgaCRRfWGALxyRttzrz4YjKOBdXQLPnI1wG0hr6fUnb4H3NMhjrzDfLaAoR9Op3hu1Ld0+/KDPiA0hI70vw7SZG2Rz9f7QVoqTpVZaSqyQ+SIYq49M5aMMLAtlG6/StmYsu1CZPT7bZz0am3UmX+vMsq1UTjKrvWqlls1mVfPB/lnJF6vU777NE3JH63RTj3JNTL4sxyl5kGnNlpnXgtHMVZavqDnUcrW+ldAKrwvhtWxW6r15XpXK43F5mrH6DaP5bq/LVjFHy4m9GMl0QrN/QnbeqOR7Fiy+qA1xU9US+VL3ufogOKHSoZZ9MbpwObCM3gMY5LbGMCfXevK89/BkfTw3k6+lrjycpx5277lWv5KYZHLZVD/zvJmNbD07uxqL61bWGmYri/WuWdASL+NNatV4mFYapfEqP9PX7+16T00knLUMFIX1JFrDMS9ezNVoH7wgyLyAnXC4kmCMobkc7cyZ1WYY+pU0rIjZ/X6M+jRilyMjdte+jd7al2WFaXaJvw/AZeSY+AAkPAKGB7aCOgBwMiJuxM76p2at+Q3Vjv00zy+qZxRNZtQa8fSCCO1/ibQ9r+V6N5XjXgCn6Ryy5H4PntDhiSEaWwzxzw9xMSQA2sQKbBQs319RQ4KNIn0v2ERHqSdUqqqXpx15UamKEGcqFVgT6ZXUJ+JEo4SlPtHnRhFTH+kcekmdFWy4jAol6EhKOMcadIkVSC9lnixLz3JnzsIejKfxVjC/iZs0Vtykaodh5JwYivQyOQyVFGPDVOKNMBX7KC1dLn7KMiZykXFtVQDljWRk6lrGa+CFipt3YYUn3jNNxHGDUYtgDdc19y/s+V4C/b0iLbUiA9Y+kpybiXqWvVlkBkIATtabUeMdSLspU+OVrvV8T70oy0H0PjAYCPHOAZmv5oKCesb4yLKwg/9Wua9aqnTv3XDSSZNJrb0zmuNyovRiKY1euz7WzYfcapouz2aFrfpZS1VuLI0HK5NodspD+0hO3FhP3de6fbncLzc2Wk98W5j95qA3bL2NFh8Jc2esd0PppWufUc4Me+WSc+5EMRSx6qgvY/smva383m7nhHK7Uy0Yj6q8MWuvz/mW807bYW+VrTelj27JSo8LidquuWlMc5llW3Kqu5SP4svgI1ezP5Z79bycng8bD0XDSj7ZF0PTcmqg6u/PRk8rVeo6StcLg8HsoT5/S42qTxvLqrw5L5aBD6/2WiWbuf520jS2m5mYzsv51GiuipUd6GrDl6JeXDUK63IhkapkJuv29K3bH5fWH7NpHlQKqbdK0XiqqsNtqq1PrPlwtMl1Unp12mlaVr5Q3z0txgOtss30N73JeDSxn5VTJmk0sD90kL3ypfRG6+uJBp9KKk3G5Ijr4+BQRkWl4/iM/6JqUnQMu9w79/dpZBihSXg8JrBGhmdf4FFMVhoZxJ4j+Whk+PmAg0ZGaZdWocv2eKhkzLqjCfcygKelYtfWu3NQu0hXWETgxibXP6d1pqI2nlb13LOc2MDeo7m4U+IVESQMJ4kRrig4QF2MK8zJhwwaxtr+OpA7ky49ghtGYmqBnbZCjGSSGn1t+PU9Z4EE9EEqLsfEBQowCazgmkFgKFBObyQHdPowIw7Sw5u3b3SY3RFfjmfZ5VxQRaY+Fw5MzcmhHNJlwtl1fICHAEASr0ojFY/x4NZuUCDxs3lYzZcTVPoLe5Y/4Reo6vkLxKtOd393tKZQAA9YSInqgJFyykxIU2MaKOXEIngvzLC5MbgDSo7InMdfWBZ50GSADldstDxRAXzpUYwZPar07b1e98NvFHW2DPtkYqoO4QzVYRaU5qtYuKTnT6Pxal0BAMJAM2wSCiBaEeNej6iplFNK4R7W2KQU/lJpMCrFU6XCinaSSvE7sdJ/Aa5E+Om/+AWSykEbcHkkaqbRmLGMJrLVKkIFt25B/dDwfKPQPCPgtmfAXPGL9WH8jbXzLIOf7+rT0XIM3ePtk+r4vT6wA5cz6YsBtNh7vSgtMa+FNQ84EjSRs5EjxQplADF9JGywC0BcFY0IZshX5hEWh6QvKGGs7QPPayvO0MHMfS7cy6pKHfN1bfu90wsiRBX2rhO6siSyszBEmW31BEMbI25AJtG1icuBDOGu76h87AieVYD8L5ARD+Qj8+firzG5rM4A9hTVBVE3pA/ZUKxEvWv0OOj2RbvhVO3o4o70FaOEHeknMh+vd1Xmq/vevyncvyncFzXDEnFd3g2hfVcON2LvHWaKLXR021uXnNK4XY3MH6XilWQFEBYgC53IDUSPjGnmqpvokTLu/Wb4BZCD6oY4uYedSResLB7GM0F/uSbOXONTAEFewCPFQlRvXT9WIgyynNV7fb0GQZ0G1zb1wqN3UZnwEq4o+YUJ8QtUnwtEPEhy4flckpLQBXO2f+2MXzvjC9+J2effbWewjzzRs1Dkv0Fjite0dUKbkMO2egQino4cUQ8PIOKCDPlpTHgaisRDYyJdxHWd4Jsf0x8ZqESrcI3SHpnWKBwbCMIMtygNY/9XtdrOhbLhrHpnaX8aOJ+yxno1jOnmHE04vNMY7ZYI8N1SZIXWUTyiIYf0/SL9WX/bvqgisS+UxstR7Qq1EJnclJRpy07TILbldHmi15RkzGxAiFwqhSI6AYse1dS1Yu9a4l94HjRNlnGLaRS2dZiEqx0BHTUh5Dx1vc62mJaDjPaMqGfgOQrl0TMQ2y6mMVzqb+OWIPfjmE8MW8It+90oYuYjK7iPmA+INvcBGCf2E/mx31WCjNtgRZlx2gIzDvueQQtiWOtbxhtV4plejIxv3FUrMs62ovfCOcfl/01xsKkoLmMczvITi2R1gNx8RDYpp64CdnpBdGI6QMYpb0tClfwtCepwLdzFxc7qCpClxCRKfT6Y5rm2xw7RG8BZhZW1gd+IaH7DCGcVmf7Cnu8l098rUlwGpG/gv8Y5QlUnvQPxAWPgpW2FQWMNyfLJyt9QJix9dbg5MZAcqlbYI3iElIuDR1ejm6+2Ga+GOzh4EUpiYBTE0mzE6Ori6ctPOl0ShVf7QHY968YZeVzeYoE8siZhOfiMevUp3KAmQo/NPfoabbRPPFURO7jZYxcnuFFJuLmuWfr3jIcIjTdAwLLxxIDtYi5v8YUPomBcf03nA9KNdRtwxqyQ8s7Jz3NnE7KFMxG7IkI44+Y1E5VQFdoe6ZQy+tWcLtWcYEgkU3HNKbopcfTlJ31pyWV71iWD7DGCGYYTZoDmFq1fW6F9uo/8zDNuve4UFGqCqcdwLuXyoZV/PciEba6nYBmkYkSZ3gqulfk5qfD38jkfbxCLnR+RMkbm7X0qY7mZ/T+XAmOJk8wKvJ1G8LIQRWMLzE3pBkaix80IGj56ZQcoGjvcVEIMNfTEzbjgHB6rVLR7FSOEwPoUbq8pzpxQ4fAPe7mItStKv8Yj7KAQXGywwzMDIb7Ywc2uc5Hib7br4godCN5LR+wuiIxgxLnv0W0FDJ6ixhHSv51fT+dxxg+XR35ttEUUrfo8lIPLY15HHnLpBHx8gMcTGcI4r29hkB7uqAnbRBrvWRo0VnbxID3lNGLMxVhSvAJxsTeW2DUBdBQeJJ4ufpy6idJ/PhlyiAai1GtqOk8hyq9+nylEUeNrWry0Ic2vu2jY8etB+9xf2w1Z9Blwg5/vV+mJYyDrXoB0DCSl/a0YfS4IMFDaRCSfZiMgJiSOuCUjwADRO955qQBgKiwtMRVSAAbgDMyuxI39/CePkRSXtwn7htaIQcUJvXolXvEHfEYUCt08ScBdNZFNZMO1dHheQBAXAB5aMqXlZOyDrgc+Z6EfSzI8XXUm9HqAbN4VDLyaZl+HgfdAkSLFQX98i5lJj4cfEby3kcrTyRcc7jA9HCLtHmtqwQzwiIIxuH+U99thlwDGQ3joLEJGUePuwWQZPZVUyAbiALcAaQTdZOkegXDt+2QE+Spxt5lDgrsEiPyywC4BHCzxjLeo2ypAghzrHfu702Y/thiCvCy8EAY1VKQb8ykG6Xj4jQgSqtgovPLjKqcxAQZC+Qk90wjXduw73QuK9vWPL06Q3rcbwAmXU2KIEwfNA3Czp1B0M8UvjHIeAOdeAOgUdDSeBT8SJFHmJttJhocZCU/1iCgmAURNoj4oWpcQ6UK4Adhi5hOKDrYUrBobr8+PEMVIkzcS9UcIkdflpRMJUqiayPDAdptWFRG3DD32HstoRxH1yFXx1oiMO57Tm1uRHoR6xf5e1KdxBjWXbVmAGnLrq27FZnPp8W/pUgzxbpHud59OP7j3g1k8VeRkNMdZasQE5WVNu9c0wpD9iobeCyr7VOP/7isfPRW7b1QSQeYhETyM83hLBJGldX57EoFbFTtbh/6tO+RCZ1vgLn/EuQerQlH7boDJWbZklETplMvvrsx+48DmEdaRM6osuLnpc6LAiKUBJOqconJ+YYnrfNQCymiUG0AMlgkCQBEwxGDj/zptoYOFYqJDE8qolWvRhG7FSAytGDlUfwtPuGKWFhozRYWoMgjfxQvvwhqwixczTYXi7Ii/g+rAW0w0FQjZ4g4HbOGUmHR5fI9PpoEvrrh44Z+PCWMFLAAIrJAFYk6VwwxFXnMooD+Nci8eQbiF+e3FIxJ7Z2c8fAux4yw8zhTeEsED+pwb1kmkO+oGbAWJmQvRafQrue1UYiykObU82CvtMW95EFgiu2waV9wgOscFxg2Ah8wjGpRgi37Mg8Ej1C2R5fO3YEmw7HmgADX+qBQgsdCdwb51wtZ+atnxzE+njoaJooZX3x/0ryOmFylMz2LgN31aEQW7bSKu7r+aS2toDsxZ28h8HcXQ++ucgmnO96s31i3rozraOTdpry3zdG09ulhdA/dEBVyEY8HPVviyK5XjM/9NChAdcBnn2/iG6AoPAiZzRMY4EvsUQO4jKOW4qSS4kyB0RjF+JxiwKp2VNJLp/ZDiCKteLaE5w6e7Qew6KTCgxntw9I8uuFnruDjlAh4p6u7iU7oWCKmh3p14SgR7q9uGoRvmYNmeOgrrEUGc/O2IUvwkSH+01Xt7IsclCqvp60DAoqFQkAiBAgBXVYxTeiDP7uyuruPbbguAeKWBE2OvwvbbQlhIDQR0V19uHKPT5/DodiJzcgWhECMFvAQbAjJfyXajdRB4h6DQTTG/ORIse/hvKvqAqqPFw38jM/PfCPdQYDtFOHpnjsw+MZWOK59YwARXQrXzDo8qN5ph8mNgRYEesJKJNawwnK9kM48YeyDh1cLwVmHkdhNK8IFEYRV0ADBVH3FOKJEp9eE3oKCwbRqIu1diDyycKsDZAYsmc67/pjW2oNr+UryQRcSTYMMGxiVM15ED5tNcbPpLEl2p8m64gV2g7rtZBf0lqk9zbq9fHqkzQqVw4I353AW/vveMWVTRArLowRMak6ClEgB+XRf1ytJn3ZHxz7LVqHTM4iCba/eHxjpdzPbes4quJZW31cTIbTalpaU09RTqJYeyMak1UeG5sP0D7fXNDjfFAbRGz1plU0GpR3mcGMyL/db7I9BSjaJehi0ZFda1511iBI3dxgRDQ5OSvW03mRm+FfVSN1d6amztOyVVSy2mIWgvW9XH1BNYme+76ktzk5e6/dFukyoIyH5cdpFKvlVfbC0gORqWEMrUOrnme+5JGqlr542kRTIP9aq2ee48qx+1rNVPtVGyUGvZKJHtiJ336uPzaPvY6ryiTn/Q3xiv9VezA+svs8psAEurbWJq36Vde7FPf+qmVPDWWdgHsplJpmCkej37M1LzYi1p1Gxwzm7S5XIiV02B9qJu72iyWJcXz93yYlhILhJG/iOVygC1lRjJhpBcpR/SqDRKLFrZlgaqiceFjHLFVi1XKNk/J1upV+1tShbGq+Jrq1jvpK1acfo+sHc+/a9/ZMCT0i/IwMDSnpTvDiS72iaHKa/RRZJdfoyJDNcw4yB8IFnAwnFyZCN96G8c+MUuvkCWz1+AO1guPV/hIvPJgpEKPfQeD6vpwOwM/C+qKp42wGJTVoho94zeoFIpc/AShQqxlz+mPw2eCqiobntvP1GEp9cGEEX216VpWsdbZv+sYdHsOUyR+T8=</diagram></mxfile>
\ No newline at end of file diff --git a/verilog/tbalu.cpp b/verilog/tbalu.cpp new file mode 100644 index 0000000..4351766 --- /dev/null +++ b/verilog/tbalu.cpp @@ -0,0 +1,342 @@ +// For std::unique_ptr +#include <memory> + +#include<iostream> +#include<bitset> + +// Include common routines +#include <verilated.h> + +// Include model header, generated from Verilating "top.v" +#include "Valu.h" + +#include "tbalu.h" + + +int shift_right_a(const std::unique_ptr<Valu> & dut, const std::unique_ptr<VerilatedContext> & contextp); +int shift_right_l(const std::unique_ptr<Valu> & dut, const std::unique_ptr<VerilatedContext> & contextp); +int shift_left(const std::unique_ptr<Valu> & dut, const std::unique_ptr<VerilatedContext> & contextp); +int add(const std::unique_ptr<Valu> & dut, const std::unique_ptr<VerilatedContext> & contextp); +int sub(const std::unique_ptr<Valu> & dut, const std::unique_ptr<VerilatedContext> & contextp); +int slt(const std::unique_ptr<Valu> & dut, const std::unique_ptr<VerilatedContext> & contextp); +int sltu(const std::unique_ptr<Valu> & dut, const std::unique_ptr<VerilatedContext> & contextp); + +int shift_right_a(const std::unique_ptr<Valu> & dut, const std::unique_ptr<VerilatedContext> & contextp) { + // Set Vtop's input signals + dut->A = 0x80080080; + dut->B = 0x00000000; + dut->OP = SRA; + + // Simulate until $finish + // while (!contextp->gotFinish()) { + int mistake = 0; + for (int i = 0; i < 32; i++) { + dut->B = i; + contextp->timeInc(1); + int A = (int) dut->A; + int B = (int) dut->B; + int D = (int) A >> B; + + dut->eval(); + if (D != dut->C) { + std::cout << "TEST FAILED SRA\n"; + std::bitset<32> x(dut->A); + std::bitset<32> y(dut->B); + std::bitset<32> z(dut->C); + std::bitset<32> a(D); + std::cout << "Current: " << x << " >>> " << y << " = " << z << '\n'; + std::cout << "Expected: " << x << " >>> " << y << " = " << a << '\n'; + mistake = 1; + } + } + + if(!mistake) { + std::cout << "PASSED SRA\n"; + } + return mistake; +} + +int shift_right_l(const std::unique_ptr<Valu> & dut, const std::unique_ptr<VerilatedContext> & contextp) { + // Set Vtop's input signals + dut->A = 0x80000000; + dut->B = 0x00000000; + dut->OP = SRL; + + // Simulate until $finish + // while (!contextp->gotFinish()) { + int mistake = 0; + for (int i = 0; i < 32; i++) { + dut->B = i; + contextp->timeInc(1); + unsigned int A = (unsigned int) dut->A; + unsigned int B = (unsigned int) dut->B; + unsigned int D = (unsigned int) A >> B; + + dut->eval(); + if (D != dut->C) { + std::cout << "TEST FAILED SRL\n"; + std::bitset<32> x(dut->A); + std::bitset<32> y(dut->B); + std::bitset<32> z(dut->C); + std::bitset<32> a(D); + std::cout << "Current: " << x << " >>> " << y << " = " << z << '\n'; + std::cout << "Expected: " << x << " >>> " << y << " = " << a << '\n'; + mistake = 1; + } + } + + if(!mistake) { + std::cout << "PASSED SRL\n"; + } + return mistake; +} + +int shift_left(const std::unique_ptr<Valu> & dut, const std::unique_ptr<VerilatedContext> & contextp) { + // Set Vtop's input signals + dut->A = 0x00000001; + dut->B = 0x00000000; + dut->OP = SLL; + + // Simulate until $finish + // while (!contextp->gotFinish()) { + int mistake = 0; + for (int i = 0; i < 32; i++) { + dut->B = i; + contextp->timeInc(1); + int A = (int) dut->A; + int B = (int) dut->B; + int D = (int) A << B; + + dut->eval(); + if (D != dut->C) { + std::cout << "TEST FAILED SL\n"; + std::bitset<32> x(dut->A); + std::bitset<32> y(dut->B); + std::bitset<32> z(dut->C); + std::bitset<32> a(D); + std::cout << "Current: " << x << " <<< " << y << " = " << z << '\n'; + std::cout << "Expected: " << x << " <<< " << y << " = " << a << '\n'; + mistake = 1; + } + } + + if(!mistake) { + std::cout << "PASSED SL\n"; + } + return mistake; +} + + +int add(const std::unique_ptr<Valu> & dut, const std::unique_ptr<VerilatedContext> & contextp) { + // Set Vtop's input signals + dut->A = 0x00000000; + dut->B = 0x00000000; + dut->OP = ADD; + + int mistake = 0; + for (int i = -(32 * 32); i < 32 * 32; i++) { + dut->A = i % 32; + dut->B = i / 32; + contextp->timeInc(1); + int A = (int) dut->A; + int B = (int) dut->B; + int D = (int) A + B; + + dut->eval(); + if (D != dut->C) { + std::cout << "TEST FAILED ADD\n"; + std::bitset<32> x(dut->A); + std::bitset<32> y(dut->B); + std::bitset<32> z(dut->C); + std::bitset<32> a(D); + std::cout << "Current: " << x << " + " << y << " = " << z << '\n'; + std::cout << "Expected: " << x << " + " << y << " = " << a << '\n'; + mistake = 1; + } + } + + if(!mistake) { + std::cout << "PASSED ADD\n"; + } + return mistake; +} + +int sub(const std::unique_ptr<Valu> & dut, const std::unique_ptr<VerilatedContext> & contextp) { + // Set Vtop's input signals + dut->A = 0x00000000; + dut->B = 0x00000000; + dut->OP = SUB; + + int mistake = 0; + for (int i = -(32 * 32); i < 32 * 32; i++) { + dut->A = i % 32; + dut->B = i / 32; + contextp->timeInc(1); + int A = (int) dut->A; + int B = (int) dut->B; + int D = (int) A - B; + + dut->eval(); + if (D != dut->C) { + std::cout << "TEST FAILED SUB\n"; + std::bitset<32> x(dut->A); + std::bitset<32> y(dut->B); + std::bitset<32> z(dut->C); + std::bitset<32> a(D); + std::cout << "Current: " << x << " + " << y << " = " << z << '\n'; + std::cout << "Expected: " << x << " + " << y << " = " << a << '\n'; + mistake = 1; + } + } + + if(!mistake) { + std::cout << "PASSED SUB\n"; + } + return mistake; +} + +int slt(const std::unique_ptr<Valu> & dut, const std::unique_ptr<VerilatedContext> & contextp) { + // Set Vtop's input signals + dut->A = 0x00000000; + dut->B = 0x00000000; + dut->OP = SLT; + + int mistake = 0; + for (int i = -(32 * 32); i < 32 * 32; i++) { + dut->A = i % 32; + dut->B = i / 32; + contextp->timeInc(1); + int A = (int) dut->A; + int B = (int) dut->B; + int D = (int) (A < B ? 1 : 0); + + dut->eval(); + if (D != dut->C) { + std::cout << "TEST FAILED SLT\n"; + std::bitset<32> x(dut->A); + std::bitset<32> y(dut->B); + std::bitset<32> z(dut->C); + std::bitset<32> a(D); + std::cout << "Current: " << x << " ? " << y << " = " << z << '\n'; + std::cout << "Expected: " << x << " ? " << y << " = " << a << '\n'; + mistake = 1; + } + } + + if(!mistake) { + std::cout << "PASSED SLT\n"; + } + return mistake; +} + +int sltu(const std::unique_ptr<Valu> & dut, const std::unique_ptr<VerilatedContext> & contextp) { + // Set Vtop's input signals + dut->A = 0x00000000; + dut->B = 0x00000000; + dut->OP = SLTU; + + int mistake = 0; + for (int i = -(32 * 32); i < 32 * 32; i++) { + dut->A = i % 32; + dut->B = i / 32; + contextp->timeInc(1); + unsigned int A = (unsigned int) dut->A; + unsigned int B = (unsigned int) dut->B; + unsigned int D = (unsigned int) (A < B ? 1 : 0); + + dut->eval(); + if (D != dut->C) { + std::cout << "TEST FAILED SLTU\n"; + std::bitset<32> x(dut->A); + std::bitset<32> y(dut->B); + std::bitset<32> z(dut->C); + std::bitset<32> a(D); + std::cout << "Current: " << x << " ?u " << y << " = " << z << '\n'; + std::cout << "Expected: " << x << " ?u " << y << " = " << a << '\n'; + mistake = 1; + } + } + + if(!mistake) { + std::cout << "PASSED SLTU\n"; + } + return mistake; +} + + + + + +int main(int argc, char** argv, char** env) { + // This is a more complicated example, please also see the simpler examples/make_hello_c. + + // Prevent unused variable warnings + if (false && argc && argv && env) {} + + // Create logs/ directory in case we have traces to put under it + Verilated::mkdir("logs"); + + // Construct a VerilatedContext to hold simulation time, etc. + // Multiple modules (made later below with Vtop) may share the same + // context to share time, or modules may have different contexts if + // they should be independent from each other. + + // Using unique_ptr is similar to + // "VerilatedContext* contextp = new VerilatedContext" then deleting at end. + const std::unique_ptr<VerilatedContext> contextp{new VerilatedContext}; + // Do not instead make Vtop as a file-scope static variable, as the + // "C++ static initialization order fiasco" may cause a crash + + // Set debug level, 0 is off, 9 is highest presently used + // May be overridden by commandArgs argument parsing + contextp->debug(0); + + // Randomization reset policy + // May be overridden by commandArgs argument parsing + contextp->randReset(2); + + // Verilator must compute traced signals + contextp->traceEverOn(true); + + // Pass arguments so Verilated code can see them, e.g. $value$plusargs + // This needs to be called before you create any model + contextp->commandArgs(argc, argv); + + // Construct the Verilated model, from Vtop.h generated from Verilating "top.v". + // Using unique_ptr is similar to "Vtop* top = new Vtop" then deleting at end. + // "TOP" will be the hierarchical name of the module. + const std::unique_ptr<Valu> dut{new Valu{contextp.get(), "ALU"}}; + + int test; + if (shift_right_a(dut, contextp)) { + return 0; + } + if (shift_right_l(dut, contextp)) { + return 0; + } + if (shift_left(dut, contextp)) { + return 0; + } + if (add(dut, contextp)) { + return 0; + } + if (sub(dut, contextp)) { + return 0; + } + if (slt(dut,contextp)) { + return 0; + } + if (sltu(dut,contextp)) { + return 0; + } + dut->eval(); + + + // Final model cleanup + dut->final(); + + // Return good completion status + // Don't use exit() or destructor won't get called + return 0; +} + diff --git a/verilog/tbalu.h b/verilog/tbalu.h new file mode 100644 index 0000000..9e010e6 --- /dev/null +++ b/verilog/tbalu.h @@ -0,0 +1,15 @@ +#ifndef ALUOP +#define ALUOP + +#define ADD 0b0000 +#define SUB 0b1000 +#define XOR 0b0010 +#define OR 0b0110 +#define AND 0b0111 +#define SLL 0b0001 +#define SRL 0b0101 +#define SRA 0b1101 +#define SLT 0b0010 +#define SLTU 0b0011 + +#endif diff --git a/verilog/tbdatapath.cpp b/verilog/tbdatapath.cpp new file mode 100644 index 0000000..ff7d3b8 --- /dev/null +++ b/verilog/tbdatapath.cpp @@ -0,0 +1,73 @@ +#include<memory> + +#include<iostream> +#include<iomanip> +#include<bitset> + +#include <verilated.h> + +#include "svdpi.h" + +#include "Vdatapath.h" +#include "Vdatapath__Dpi.h" + +#include "tbdatapath.h" + +int main(int argc, char** argv, char** env) { + + if (false && argc && argv && env) {} + + Verilated::mkdir("log_datapath"); + + const std::unique_ptr<VerilatedContext> contextp {new VerilatedContext}; + contextp->commandArgs(argc, argv); + contextp->debug(0); + contextp->traceEverOn(true); + contextp->randReset(2); + contextp->randReset(2); + + const std::unique_ptr<Vdatapath> top{new Vdatapath{contextp.get(), "TOP"}}; + + contextp->timeInc(1); + top->clk = 0; + top->rst = 1; + + top->eval(); + + contextp->timeInc(1); + top->clk = 1; + top->rst = 1; + + top->eval(); + + contextp->timeInc(1); + top->clk = 0; + top->rst = 0; + + top->eval(); + + for (int i = 0; i < 75; i++) { + contextp->timeInc(1); + top->clk = !top->clk; + top->eval(); + } + + const svScope scope = svGetScopeFromName("TOP.datapath.reg0"); + assert(scope); + svSetScope(scope); + + uint32_t reg_addr; + uint32_t reg_val; + for (int i = 1; i < 6; i++) { + reg_addr = i; + reg_val = 0; + top->get_reg_value(®_addr, ®_val); + std::cout << "Register: " << i << " Value: " << std::hex << reg_val << std::endl; + } + + top->final(); + + return 0; + + +} diff --git a/verilog/tbdatapath.h b/verilog/tbdatapath.h new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/verilog/tbdatapath.h |